One of the intended applications of the Xilinx XC6000 family is to be used as reconfigurable coprocessor to accelerate software. This approach has failed so far because of the lack of software support. First, there was no programming method similar to conventional coding. Second, there was no run time environment integrated in the operating system. Both will be presented in this paper.

Clostridium botulinum produces a binary toxin, which is composed of two separate proteins. The enzyme component, C2I, is an ADP-ribosyltransferase which modifies G-actin of eukaryotic cells. The proteolytically activated binding/translocation component, C2IIa, forms ring-shaped heptamers, which bind to cell receptors and mediate the transport of C2I into the cytosol of target cells. According to the current model, receptor-bound C2IIa serves as a docking platform for C2I on the cell surface. Following assembly of C2I, the toxin complex is taken up via receptor-mediated endocytosis, and finally, C2IIa facilitates translocation of C2I from acidic endosomes into the cytosol. Our data support an alternative scenario for the early steps of interaction of the C2 toxin and eukaryotic cells, due to the fact that C2IIa and C2I can interact prior to binding of the toxin to the cell surface. The C2IIa-C2I complex, which was formed in a cell-free system, was detected by native gel electrophoresis and subsequent immunoblot analysis or radiolabeling methods. The preformed C2 toxin complex ADP-ribosylated actin in vitro and induced cell rounding. The interaction of C2I with C2IIa did not enhance the binding of C2IIa to the cellular receptor. Intoxication of Vero cells and of human colon carcinoma cells (CaCo-2) was significantly enhanced when the preformed toxin complex was added to cultured cells as compared to addition of the single components.

In this paper the application of Instruction Set Emulation (ISE) for rapid prototyping of SoCs is presented. The emulation works in a way that both the software and the hardware behaviour of the emulated processor core is reproduced cycle accurately. This requires the use of hardware and software components. The hardware component consists of a board containing a VLIW processor and FPGAs. The software component is an instruction set simulator of the core running on the VLIW processor. The FPGAs are used for emulating the SoC bus of this processor core. This way the simulation of an instruction set of a processor core has been extended to a real emulation of this core that can be used for rapid prototyping.

The concept of a very long instruction word (VLIW) processor based system to emulate synthesized RT-level descriptions has often been presented. The RAVE System (RT-Architecture-VLIW-Emulator) overcomes many of the problems common to FPGA based emulation and prototyping systems. Particularly, these are area problems in conjunction with large data paths, long turnaround times and low emulation clock frequencies. This abstract briefly describes the hardware of the RAVE System

In [1] the concept of a very long instruction word (VLIW) processor based system to emulate synthesized RT-level descriptions has been presented. As described in [1] the RAVE System (RT-Architecture-VLIWEmulator) overcomes many of the problems common to FPGA based emulation and prototyping systems. Particularly, these are area problems in conjunction with large data paths, long turnaround times and low emulation clock frequencies. In this paper the hardware of the RAVE System and first results...

Describes techniques that allow VLIW architectures to be used for the behavioral emulation of RT-level descriptions. The starting point of the techniques is a behavioral description at the algorithmic level, e.g. VHDL. This description is transformed into RT-level descriptions of the datapath and controller. The controller is given as a finite state machine. We show how to map these descriptions onto assembly code that can be executed on a VLIW microprocessor. We found the Texas Instruments TMS320C6x series of DSP chips to be suitable candidates for the mapping.

Approaches to use FPGAs as reconfigurable coprocessors so far always suffered from two problems. First, the hardware required for communication with the host processor occupied an unacceptable large part of the resources available on the FPGA and second, this communication was so slow that the gained acceleration came to naught. The new Xilinx XC6200 family aims to solve both of these problems. The chips are accessed via an SRAM interface, i.e. the host sees them as part of its memory. Besides the configuration bits, which determine logical behaviour and routing, all internal hip-hops of the XC6200 are accessible for reading as well as for writing. This ensures a high performance, since a 32 bit input or output value can be exchanged between the host and the coprocessor by a single load or store operation. In order to make use of the hardware features of the new Xilinx chip series in workstations and PCs easily, a system is presented which synthesizes hardware out of threads coded in C. The threads are part of the C-program running on the host processor. In this paper this system is referred as the Hardware Thread System (HTS). The run time environment required is called the Universal Coprocessor System (UCS). As hardware platform, a specially designed PCI card is used. Besides the reconfigurable coprocessor XC62xx, it consists of the controller (XC4013e) and buffer/data RAM. The RAM of the card can be mapped into the memory address space of the host; nontheless the controller can transfer data between reconfigurable coprocessor and buffer RAM without disturbing the host.

The popularity of non-tricyclic antidepressants, especially in outpatient treatment, is based on the generally better tolerability of these medications, particularly with respect to anticholinergic side-efTects. However, many c1inicians are cautious when it comes to prescribing these drugs, especially in severe cases of depression, because they are convinced on the basis of c1inical experience, that these drugs, or at least some of them, are not so efTective as the traditional tricyclic antidepressants ( Woggon and Angst, 1978; CordingTömmel and von Zerssen, 1982). We tried to test this contention through an analysis ofthe controlled comparison studies involving amitriptyline.