Aiming at the low precision of the tooth profile caused by the excessive cutting force during the machining of thin-walled ring gears, the geometric parameters of the gear shaping cutter are one of the factors affecting the size of the cutting force.The paper proposes to optimize the geometry parameters of the gear shaper to reduce the cutting force and improve the accuracy of the tooth profile. UG is used to model the gear ring and gear shaper, and the model is imported into ABAQUS to simulate and analyze the gear shaping process, and obtain the cutting force during the gear shaping process. The geometric parameters of the gear shaping cutter are used as input variables, and the cutting force of the gear shaping process is taken as the output response. The sample points are designed by optimizing the Latin hypercube experimental method, the mathematical model is established by the response surface approximation model, and the multi-island genetic algorithm is used for different interpolations. The geometric parameters of the tooth cutter are optimized. The experimental results show that the response surface model can effectively fit the functional relationship between the geometric parameters of the gear shaper cutter and the slotting force, and through multi-island genetic algorithm optimization, the slotting force is reduced by 34.87%, and the optimization effect is significant. Excessive slotting force causes the problem of low ring gear tooth profile accuracy, which is of great significance.

Abaqus finite element simulation technology and BP neural network and genetic algorithm are applied to the study on the optimization of the cutting parameters of the thin-walled ring gear. A simulation model of ring gear shaping was established by Abaqus finite element analysis software, a cutting force prediction model was built using BP neural network. With the help of the BP neural network and genetic algorithm function extreme value optimization feature, the gear ring gear shaping parameter optimization model was established, and the Abaqus simulation model was used to test it. The relevant slotting parameters, namely the slotting speed, the amount of back-cutting and the circumferential feed speed have been successfully optimized, and the slotting force has been reduced. The experimental results show that the parameter optimization model of ring gear shaping based on BP neural network and genetic algorithm can effectively realize the optimization of slotting parameters.

A 2P3R robot for CNC load-unload material was designed in self-creating. In the paper, the kinematics equation was established by D-H method. The mathematical model of robot pedestal, member bar and end effector was established. By numerical analysis method and collision detection algorithm, the workspace was analyzed and the collision-free cloud chart of pedestal, member bar and end effecter was got. These are theoretical basis for the robot control and path planning. The method is simple and intuitionistic, and pinpoint robot workspace edge was acquired. It has some reference value for other robot mechanism kinematics and workspace analysis.

Via built-in sensor information, using advanced data processing technology and characteristic obtaining methods, NC machine tool slideway inclination angular was tested, and the slideway inclination angular sensorless testing was achieved.Compared with the traditional testing instrument, the method can be used not only under no-load, but also in machining process.Moreover, the built-in sensor signal has more high signal noise ratio than external sensor signal.

在高速发展的电子技术领域中，传统的教学模式已显得力不从心，本文对电子技术课程从理论教学、实验内容和课程设计三个方面进行全面改革。理论教学手段、方法多样化，实践教学突出综合性、设计性和创新性，全面培养高素质创新型工程技术人才，使我校的电子技术课程教学水平跃上一个新台阶。

The relation between fixing misalignment of NC machine tool driving system motor encoder coupling and machine tool control precision was researched. The misalignment mechanism was analyzed,and the misalignment vibration model was built. The misalignment effects on motor output torque and the machine tool servo driving error were discussed.

The DA(distributed algorithm) is the key of FIR filter implementation based on FPGA, compared with the traditional multiply-add structure, DA has the characteristics of parallel data processing and efficient operation. This paper shows that the design method of a 16 order FI R filter based on FPGA is studied, using VHDL language. Simulation experiments and time series analysis are carried out in EDA platform of ALTERA, the design is verified by being downloaded to the EPF10K10LC84-3 FPGA chip. The design of FPGA has practical applications in digital signal processing; it has certain directive significance to the reform of electronic technology practice teaching.

With the development of modern manufacturing, it is obvious that traditional numerical control system is bad in compatibility and is expanded uneasily in function and is not flexible in human-machine interface. The open numerical control system has become the research mainstream of numerical control technology. Therefore, the open motion controller based on PC is developed in the paper. In addition, the components and design method of system are introduced in detail.

In the paper, the liquid level control system of double-tank is built, which bases on MCGS configuration software. Taking the liquid levels of double-tank as control object, the mathematics model is built, which is used for experiment and research. Moreover, the liquid level PID adjustor of single tank is designed, and P, PI and PID experiments are done in the step signal, which has important practical significance and reference value.

An improved image encryption algorithm based on chaotic logistic map is designed. First, after two initial values of Logistic chaotic map are pretreated, two of the modified initial values are obtained, according to which two chaotic sequences are generated. Next, two chaotic sequences are operated by cos-1 function. Last, image is encrypted combining the method of the gray value substituting. Results and analysis of simulation show that the proposed scheme has higher security.

In this paper we reform digital electronic technology curriculum in the university.We introduce EDA technology and FPGA concept,in view of the theory courses,experiment course,curriculum design,We put forward the corresponding reform scheme coming up with different teaching methods according to different profession so that the students can contract basic course theory knowledge with the actual design to improve the effect of the basic course teaching.

The new image encryption algorithm based on Logistic chaotic map is designed. First, after two initial values of Logistic chaotic map are pretreated, two of the modified initial values are obtained based on which two chaotic sequences are generated. Next, taking the first n-gray value of the original image in turn, pixel gray value (n is odd and even) is respectively encrypted by the chaotic sequence generated by two key. Results and analysis of experiment show that the proposed scheme has higher security.

在电子技术高速发展的今天,新器件、新设备不断出现,由于实验条件的限制,我国很多高等院校电子技术实验室无法及时满足各种电路设计和实验项目要求,而采用EDA技术仿真软件进行电子技术实验教学,不仅可以弥补实验仪器、元器件短缺以及规格不符合要求等不足,还能通过软件中提供的各种分析方法,帮助学生更快、更好地掌握教学内容,加深对课堂知识的理解,培养学生的创新能力,并使学生了解了通过EDA软件进行电子产品设计的基本过程。

近十年由于超大规模集成电路和软件技术的快速发展,使数字系统集成到一片集成电路内成为可能,Altera、Xilinx、AMD等公司都推出了非常好的CPLD和FPGA产品,并为这些产品的设计配备了设计、下载软件,这些软件除了支持图形方式设计数字电路外,还支持设计多种数字电路的设计语言,使数字系统设计起来更加容易,可以说数字电子技术的设计进入了一个新时代。作为一个电类专业的毕业生应该熟悉VHDL语言和CPLD、FPGA器件的设计,目前很多高校教材也加入了VHDL语言方面的内容,可见使用VHDL语言将数字系统集成到一块集成电路中是现代数字电子技术教学的重要内容。

时高校电子技术的相关课程进行了一定的改革,在有关课程中广泛地使用了EDA辅助教学,使基础理论课的教学更容易理解,并为学生后续的专业课程的学习提供了更好的理论基础。

This paper analyzes deficiency of conventional digital electric technology course design mode,and introduces reform of the course design mode.The practice indicates that the new course design mode based on EDA technology can improve teaching quality obviously,and play an important role in cultivating capability of innovation and engineering design,as well as enhancing comprehensive quality of students.

In this paper, using an example explained the skill ofcreating and modifying datawindow in PowerBuilder.

The composition and working scheme of a 16-counter with enable port and clear port were introduced in this paper,the designing idea and implementation process based on VHDL and FPGA were also described,the functions of the counter are implemented by Max+Plus Ⅱ 10.1 and the box of EDA. With the analysis of the experimental outcome,the correct designing was proved.