Verification is a serious bottleneck in the industrial hardware design cycle, routinely requiring person-years of effort. Practical verification relies on a "best effort" process that simulates the design on test inputs. This suggests a new research question: Can this simulation data be exploited to learn a continuous representation of a hardware design that allows us to predict its functionality? As a first approach to this new problem, we introduce Design2Vec, a deep architecture that learns semantic abstractions of hardware designs. The key idea is to work at a higher level of abstraction than the gate or the bit level, namely the Register Transfer Level (RTL), which is somewhat analogous to software source code, and can be represented by a graph that incorporates control and data flow. This allows us to learn representations of RTL syntax and semantics using a graph neural network. We apply these representations to several tasks within verification, including predicting what cover points of the design will be exercised by a test, and generating new tests that will exercise desired cover points. We evaluate Design2Vec on three real-world hardware designs, including an industrial chip used in commercial data centers. Our results demonstrate that Design2Vec dramatically outperforms baseline approaches that do not incorporate the RTL semantics, scales to industrial designs, and can generate tests that exercise design points that are currently hard to cover with manually written tests by design verification experts.

Constrained random verification (CRV) in industrial settings involves manual parameterized test generation, a costly and inefficient process. We formulate test parameter configuration as a blackbox optimization problem and we introduce Smart Regression Planner (SRP), an approach that automatically configures the tunable test parameters to better explore the input space and accelerate convergence towards coverage. The optimizer in SRP can drive the parameters update with twomethods: a light-weight random search, and a Bayesian optimization technique that uses coverage from nightly regressions as feedback. Our experimental evaluation on open-source as well as larger industrial designs demonstrates that frequent perturbation and optimization of test parameters leads to higher coverage than the human baseline. Importantly, it converges to coverage milestones significantly faster than the human baseline. With high-level test parameter optimization, we introduce a problem space and an opportunity to achieve categorically higher coverage in industrial settings with very low overhead.

Huang and Zhang [4] have introduced the concept of cone metric space where the set of real numbers is replaced by an ordered Banach space. Shojaei [9] has obtained points of coincidence and common fixed points for s-Contraction mappings which satisfy generalized contractive type conditions in a complete cone metric space. In this paper, the notion of complete cone metric space has been introduced. We have defined s − φ-contractive and obtained common fixed point theorem for a mapping f, s which satisfies s − φcontractive.

Huang and Zhang cite{Huang} have introduced the concept of cone metric space where the set of real numbers is replaced by an ordered Banach space. Shojaei cite{shojaei} has obtained points of coincidence and common fixed points for s-Contraction mappings which satisfy generalized contractive type conditions in a complete cone metric space.In this paper, the notion of complete cone metric space has been introduced. We have defined $s-phi$-contractive and obtained common fixed point theorem for a mapping $f,s$ which satisfies $s-phi$-contractive.

Huang and Zhang [4] have introduced the concept of cone metric space where the set of real numbers is replaced by an ordered Banach space. Shojaei [9] has obtained points of coincidence and common fixed points for s-Contraction mappings which satisfy generalized contractive type conditions in a complete cone metric space.In this paper, the notion of complete cone metric space has been introduced. We have defined s - phi-contractive and obtained common fixed point theorem for a mapping f,s which satisfies s - phi-contractive.

In this paper we introduced complete cone metric spaces and we proved some common fixed point theorems of scontraction mappings, by using coincidence point and weakly compatible condition two mappings on complete cone metric spaces.

In this paper, we introduce and investigate two new subclasses of the functions class $ Sigma $ of bi-univalent functions defined in the open unit disk, which are associated with the Aghalary-Ebadian-Wang operator. We estimate the coefficients $|a_{2} |$ and $|a_{3} |$ for functions in these new subclasses. Several consequences of the result are also pointed out.

Park introduced and discussed in [11] a notion of intuitionistic fuzzy metric space which is based both on the idea of intuitionistic fuzzy set due to Atanassov [1], and the concept of a fuzzy metric space given by George and Veeramani in [5] and [9]. We show an application and some examples of intuintionistic fuzzy metric spaces.

Common fixed point results for new classes of non-commuting self-maps and non-expansive. Within the class of all self-maps f and T of a w -starshaped subset. M of X where f is affine or w -affine. We apply them to obtain several invariant approximation results which unify, extend, and complement well-known results.

Many combinatorial optimization problems in the embedded systems and design automation domains involve decision making in multidimensional spaces. The multidimensional multiple-choice knapsack problem (MMKP) is among the most challenging of the encountered optimization problems. MMKP problem instances appear for example in chip multiprocessor runtime resource management and in global routing of wiring in circuits. Chip multiprocessor resource management requires solving MMKP under real-time constraints, whereas global routing requires scalability of the solution approach to extremely large MMKP instances. This article presents a novel MMKP heuristic, CPH (for Compositional Pareto-algebraic Heuristic), which is a parameterized compositional heuristic based on the principles of Pareto algebra. Compositionality allows incremental computation of solutions. The parameterization allows tuning of the heuristic to the problem at hand. These aspects make CPH a very versatile heuristic. When tuning CPH for computation time, MMKP instances can be solved in real time with better results than the fastest MMKP heuristic so far. When tuning CPH for solution quality, it finds several new solutions for standard benchmarks that are not found by any existing heuristic. CPH furthermore scales to extremely large problem instances. We illustrate and evaluate the use of CPH in both chip multiprocessor resource management and in global routing.

We show common fixed point theorem for generalized non-expansive and uniformly subweakly commuting mappings satisfying a more uniformly asymptotically regular condition in Hausdorff locally convex space.

In this paper, we introduce E.A. property on fuzzy 2-metric spaces and prove common fixed point theorem for a pair of weakly compatible maps under E.A. property on fuzzy 2-metric spaces.

Local nets are a major contributing factor to mismatch between the global routing (GR) and detailed routing (DR) stages. A local net has all its terminals inside one global cell (gcell) and is traditionally ignored during global routing. This work offers two contributions in order to estimate and manage the local nets at the GR stage. First, a procedure is given to generate gcells of non-uniform size in order to reduce the number of local nets and thus the cumulative error associated with ignoring or approximating them. Second, we approximate the resource usage of local nets at the GR stage by introducing a capacity for each gcell in the GR graph. With these two complementary approaches, we offer a mathematical model for the congestion-aware GR problem that captures local congestion with non-uniform gcells along with other complicating factors of modern designs including variable wire sizes, routing blockages, and virtual pins. A practical routing procedure is presented based on the mathematical model that can solve large industry instances. This procedure is integrated with the CGRIP congestion analysis tool. In the experiments, we evaluate our techniques in planning for local nets during GR while accounting for other sources of congestion using the ISPD11 benchmarks.

This paper presents a collaborative procedure for multiobjective global routing. Our procedure takes multiple global routing solutions, which are generated independently (e.g., by one router that runs in different modes concurrently or by different routers running in parallel), as input. It then performs multiobjective optimization based on Pareto algebra and quickly generates multiple global routing solutions with a tradeoff between the considered objectives. The user can control the number of generated solutions and the degree of exploring the tradeoff between them by constraining the maximum allowable degradation in each objective. This paper then considers the following three multiobjective case studies: 1) minimization of interconnect power and wirelength; 2) minimization of routing congestion and wirelength; and 3) minimization of wirelength with respect to the (finite-capacity) routing resources. The maximum allowable degradation in wirelength is specified in all cases. Our multiobjective procedure runs in only a few minutes for each of the International Symposium on Physical Design 2008 benchmarks, even the unroutable ones, which imposes a tolerable overhead in the design flow. In our simulations, we demonstrate the effectiveness of our procedure using five modern academic global routers.

BACKGROUND: Increasing of oxygen consumption in fast- growing broiler chickens is associated with the more pronounced occurrence of right ventricular hypertrophy and ascites. While, rearing of susceptible chickens in dark condition could reduce the metabolic rate of birds and hence the incidence of ascites. OBJECTIVES: The present study was designed to investigate a comparative study on the influence of different dark-length schedules on the incidence of ascites and metabolic parameters in fast growing broiler chickens. METHODS: A total of 1000 day-old (Pure Sir Broiler Line Arian) chickens were obtained and subjected to four different lighting programs. Dead birds were autopsied for the lesions of ascites. Weekly growth performance of chickens was determined and blood samples were taken, on days 7, 12, 21, 28, 35 and 42 of age for hormonal analysis. RESULTS: The incidence of ascites was clearly higher in birds subjected to normal lighting program compared with those of dark exposed chickens. Control chickens showed significantly higher body weight compared to the dark exposure group birds at day 21 of age, while it did not differ at days 28, 35 and 42 of age. Such differences was accompanied with the lower levels of plasma T3 and T4 concentrations in dark group chickens than to control chickens at the earlier age (days 12 and 21). CONCLUSIONS: This phenomenon indicated a reduction of metabolic rate and oxygen consumption in dark group chickens that had been led to reducing of ascites incidence. Our data proves that increasing dark-length instead of continuous lighting may be beneficial for rearing of broiler chickens, especially, when the risk of ascites incidence is higher.

BACKGROUND: Several regulatory proteins are involved in Salmonella invasion. The key regulator of SPI-1 (Salmonella pathogenicity island 1 ) is hilA, a transcriptional activator encoded on SPI-1 that regulates the expression of the SPI-1 secretion system. OBJECTIVES: Importance of hilA mutation on S. enteritidis colonization and shedding in layer hens was evaluated in a long-term experiment. METHODS: Two groups of layer hens were orally inoculated with 1010 CFU of hilA and parent strains of S. enteritidis, consequently. At days 2, 7, 14, 21 and 35 post-inoculation samples were taken from cloaca and different parts of digestive and reproduction systems of euthanized birds. RESULTS: In the birds infected with parent strain, the higher numbers of colonizing bacteria in the liver, spleen, caecum, small intestine and cloaca-vagina were observed. Fecal shedding in this group was also higher than the hilA group. However, no significant differences were observed for the colonization of bacteria in magnum, isthmus and infundibulum of both groups. Using PCR method, hilA gene was only detected in tissues of parent group hens. CONCLUSIONS: This study has shown that the hilA mutant is able to colonize in internal organs; an implication of this is the possibility that genes other than hilA, or at least other mechanisms, might be involved in the invasion of S. enteritidis to the internal organs of birds.

Cloud computing for EDA requires a client to send problem instances containing confidential design information to an untrusted distributed network. To preserve the design information in such a framework, this work focuses on obfuscating the global routing problem modeled as an Integer Linear Program (ILP) for large industry benchmarks. Multiple transformations are introduced in a proposed framework in which the client masks the ILP instance before it is sent to the cloud. The cloud solves the masked instance and the client unmasks the generated solution. No approximations are involved in this process. The masked instance is shown to be substantially more immune to various introduced attacks. Otherwise layout statistics and even detailed connectivity information can easily be deciphered. When applying the transformation, the increase in immunity can be traded off with the induced runtime overhead.

We present and describe Torc - ( Tools for Open Reconfigurable Computing ) - an open-source infrastructure and tool set, provided entirely as C++ source code and available at http://torc.isi.edu. Torc is suitable for custom research applications, for CAD tool development, and for architecture exploration. The Torc infrastructure can (1) read, write, and manipulate generic netlists - currently EDIF, (2) read, write, and manipulate physical netlists - currently XDL, and indirectly NCD, (3) provide exhaustive wiring and logic information for commercial devices, and (4) read, write, and manipulate bitstream packets (but not configuration frame contents ). Torc furthermore provides routing and unpacking tools for full or partial designs, soon to be augmented with BLIF support, and with packing and placing tools. The architectural data for Xilinx devices is generated from non-proprietary XDLRC files, and currently supports 140 devices in 11 families: Virtex, Virtex-E, Virtex-II, Virtex-II Pro, Virtex4, Virtex5, Virtex6, Virtex6L, Spartan3E, Spartan6, and Spartan6L. We believe that Altera architectures and designs could be similarly supported if the necessary data were available, and we have successfully used Torc internally with custom architectures.

This work presents a fast and flexible framework for congestion analysis at the global routing stage. It captures various factors that contribute to congestion in modern designs. The framework is a practical realization of a proposed parameterized integer programming formulation. The formulation minimizes overflow inside a set of regions covering the layout which is defined by an input resolution parameter. A resolution lower than the global routing grid-graph creates regions that are larger in size than the global-cells. The maximum resolution case simplifies the formulation to minimizing the total overflow which has been traditionally used as a metric to evaluate routability. A novel contribution of this work is to demonstrate that for a small analysis time budget, regional minimization of overflow with a lower resolution allows a more accurate identification of the routing congestion hotspot locations, compared to minimizing the total overflow. It allows generating a more accurate congestion heatmap. The other contributions include several new ideas for a practical realization of the formulation for industry-sized benchmark instances some of which are also improvements to existing global routing procedures. This work also describes coalesCgrip, a simpler variation of our framework which was used to evaluate the ISPD 2011 contest.