This paper demonstrates a 10-bit low-power lowcomplexity successive approximation register analog-to- digital converter (SAR ADC) suitable for biomedical applications. The architecture of the proposed SAR ADC includes a low-distortion CMOS bootstrap sample and hold (S/H) switch, a pair of PMOS with double-tail single-ended dynamic latch comparator, a bridge binary weighted capacitor array digital to analog converter (DAC) with an efficient-energy switching scheme, and a modified successive approximation register (SAR) controller logic. The proposed converter is implemented using TSMC 65nm CMOS technology, 1.2 V supply voltage with a sampling rate of 500 KS/s. According to the post-simulation results, the proposed SAR ADC consumes 3.353 mu W and achieves a spurious-free dynamic range (SFDR) of 59.4 dB without supplementary calibration. The ADC core occupies an active area of 0.007 mm(2) with a figure of merit (FoM) of 15.8 fj/conv.step.

A successive approximation register analog-to-digital converter (SAR ADC) is a promising approach used in biomedical applications due to its energy-efficiency architecture with less complex hardware implementation. The core building blocks of SAR ADC are sample-and-hold switch (S/H), comparator, logic control register, and digital-to-analog converter (DAC). To enhance the overall performance, a high-isolation CMOS bootstrap S/H switch has been used. The SFDR of proposed ADC has increased by up to 2.2 dB. Also, we propose a double-tail single-ended dynamic latch comparator with extra pair PMOS transistors that save power by up to 7.5% as compared to the traditional double-tail dynamic comparator. Moreover, after adding these pair of transistors into conventional double tail dynamic comparator without any calibration cost, the SNDR has increased by more than 2 dB and 0.3bit improvement of ENOB. Furthermore, a synchronous modified SAR logic control register based on low-power D flip-flops (FFs) is proposed. A metal-isolator-metal capacitor (MIM) with a modified capacitance reduction configuration is used to improve the active area of the capacitive DAC (CDAC) compared to the conventional CDAC with 36.7% saving power. The proposed ADC has been implemented using a 65-nm TSMC CMOS process, 1.2 V supply voltage with a sampling rate of 1 MS/s. An active area of 0.00585 mm2 with a total post-result power consumption of 5.75 µW has been accomplished for the proposed fully integrated ADC.

Graphene and reduced graphene oxide act as promising materials in various applications, especially electronic applications. In this study, graphene oxide (GO) was chemically synthesized using the improved Hummers method, followed by thermal reduction at 750°C in ambient air at a relatively rapid heating rate to obtain thermally reduced graphene oxide (TRGO). To characterize the TRGO sample, various techniques such as X-ray diffraction (XRD), Raman spectroscopy, and scanning electron microscopy (SEM) were used. These techniques provided valuable insights into the structural, morphological, and chemical properties of these graphitic samples. A high-quality factor (Q) of 0.24 was calculated for the TRGO sample. The electrical conductivity of the prepared TRGO sample was investigated and found to be 7.788 S/cm, indicating favorable conductivity for electronic applications. Furthermore, the detectivity range and the optical energy band gap of the TRGO sample were measured, revealing an exceptionally high absorbance level in the near-infrared band and an energy band gap equal to 0.74 eV. This aligns well with the future application of the TRGO sample as an infrared (IR) detector based on reduced graphene oxide.

Recently, reduced graphene oxide (RGO) has been considered a very interesting material for many electronic devices. In this paper, graphite powder (G) was used as a core starting material for the preparation of RGO powder samples. Graphite was first oxidized using the improved Hummers method to produce graphite oxide. Graphite oxide was then exfoliated into graphene oxide (GO) by stirring the samples with distilled water mixed with hydrogen peroxide at low temperatures. The reduction process for GO was carried out using various methods, including ascorbic acid (AA) with and without sonication and ultraviolet irradiation, to finally produce reduced graphene oxide powder (RGOs). The synthesized RGO samples were characterized by X-ray diffraction (XRD), Raman spectroscopy, X-ray photoelectron spectroscopy (XPS), scanning electron microscopy (SEM), and Fourier transform infrared spectroscopy (FTIR) techniques. Electrical conductivity measurements were performed for the RGO samples. A comparative study was performed between the synthesized samples and other published works. A new quality factor (Q) [1] is established based on the characterization results of the Raman spectroscopy and X-ray diffraction measurements. Electrical conductivity as high as 5.6 × 10− 3 S/cm was obtained for RGO-3 sample, and a quality factor of 0.0945 was calculated, which is comparable to other published works.

A Schottky -photodiode and pn-photodiode were fabricated based on a SiC/MoS2 composite semiconductor material using a physical vapour deposition (PVD) method. The surface topology and structural features of the nanostructured SiC/MoS2 thin films were investigated using scanning electron microscope (SEM), Fourier Transform Infrared spectroscopy (FTIR), and grazing incidence X-Ray diffraction (GIXRD) analysis. The two-dimensional nature of these materials enables easiness integration for vertical device design with novel properties. The performance parameters of the fabricated devices were characterized. The electrical performance of the fabricated MoS2/SiC Schottky and pn photodiodes were investigated according to their current-voltage (I-V) characteristics within a bias voltage range from -2 to 2 volts. Here, we report highly efficient photocurrent generation from vertical MoS2/SiC composite device fabricated using asymmetric metal contacts, exhibiting an external quantum efficiency (EQE) of up to 14.68% for pn -photodiode and 6.68% for Schottky -photodiode. Evaluated to in-plane MoS2 devices, the vertical design of these devices has a much larger junction area which is essential for achieving highly efficient photovoltaic devices. As well as spectral responsivity of 28.25 mA/W and 63.22 mA/W for Schottky and pn-photodiodes respectively also, response time of 1 ms for Schottky-photodiode and 977.5 μs for pn-photodiode were measured and discussed.

In this study, we present the fabrication and characterization of a thin film based on 1 T-MoS 2 pn photodiode for the purpose of quick response photodetection application. The photodiode was fabricated using RF-sputtering process. The scanning electron microscopy (SEM) and Fourier-transform infrared spectroscopy (FTIR) techniques were employed to investigate the surface topology and structural characteristics of the nanostructured MoS 2 thin film. The electrical properties of the photodiode that was produced were examined by conducting measurements of its current–voltage (I-V) characteristics across a range of bias voltages spanning from − 2 to + 2 V. The external quantum efficiency (EQE) of the pn photodiode that was produced was determined to be as high as 9.8%. Additionally, the internal quantum efficiency (IQE) was found to be as high as 10.5%. Furthermore, a time response of 1.748 ms was observed. The findings of this study illustrate the capability of MoS 2 photodiodes in facilitating rapid response photodetection applications.

This paper presents a single-substrate microstrip rectenna for dedicated radio frequency energy harvesting applications. The proposed configuration of the rectenna circuit is composed of a clipart moon-shaped cut in order to improve the antenna impedance bandwidth. The curvature of the ground plane is modified with a simple U-shaped slot etched into it to improve the antenna bandwidth by changing the current distribution; therefore, this affects the inductance and capacitance embedded into the ground plane. The linear polarized ultra-wide bandwidth (UWB) antenna is achieved by using 50 Ω microstrip line and build on Roger 3003 substrate with an area of 32 × 31 mm2. The operating bandwidth of the proposed UWB antenna extended from 3 GHz to 25 GHz at −6 dB reflection coefficient (VSWR ≤ 3) and extended from both 3.5 to 12 GHz, from 16 up to 22 GHz at −10 dB impedance bandwidth (VSWR ≤ 2). This was used to harvest RF energy from most of the wireless communication bands. In addition, the proposed antenna integrates with the rectifier circuit to create the rectenna system. Moreover, to implement the shunt half-wave rectifier (SHWR) circuit, a planar Ag/ZnO Schottky diode uses a diode area of 1 × 1 mm2. The proposed diode is investigated and designed, and its S-parameter is measured for use in the circuit rectifier design. The proposed rectifier has a total area of 40 × 9 mm2 and operates at different resonant frequencies, namely 3.5 GHz, 6 GHz, 8 GHz, 10 GHz and 18 GHz, with a good agreement between simulation and measurement. The maximum measured output DC voltage of the rectenna circuit is 600 mV with a maximum measured efficiency of 25% at 3.5 GHz, with an input power level of 0 dBm at a rectifier load of 300 Ω.

This study presents a survey of the most promising reported SAR ADC designs for biomedical applications, stressing advantages, disadvantages, and limitations, and concludes with a quantitative comparison. Recent progress in the development of a single SAR ADC architecture is reviewed. In wearable and biosensor systems, a very small amount of total power must be devoured by portable batteries or energy-harvesting circuits in order to function correctly. During the past decade, implementation of the high energy efficiency of SAR ADC has become the most necessary. So, several different implementation schemes for the main components of the SAR ADC have been proposed. In this review study, the various circuit architectures have been explained, beginning with the sample and hold (S/H) switching circuits, the dynamic comparator, the internal digital-to-analog converter (DAC), and the SAR control logic. In order to achieve low power consumption, numerous different configurations of dynamic comparator circuits are revealed. At the end of this overview, the evolutions of DAC architecture in distinct biomedical applications today can make a tradeoff between resolution, speed, and linearity, which represent the challenges of a single SAR ADC. For high resolution, the dual split capacitive DAC (CDAC) array technique and hybrid capacitor technique can be used. Also, for ultralow power consumption, various voltage switching schemes are achieved to reduce the number of switches. These schemes can save switching energy and reduce capacitor array area with high linearity. Additionally, to increase the speed of the conversion process, a prediction-based ADC design is employed. Therefore, SAR ADC is considered the ideal solution for biomedical applications.

Humidity sensing has been offering a noticeable contribution in different industrial, medical, and agricultural activities. Here, graphene quantum dots doped with polyaniline (PANI) and MnO2 were successfully prepared. The synthesized system is exposed to a set of structural, morphological, and optical investigations. The apparent crystallite size is less than 30 nm, reflecting the nanoscale of the structure, and thus validating the preparation route as evident on XRD pattern. SEM images show a fibrous structure where polyaniline dominates and covers most of the structure’s surface. The evident bands of the FTIR spectrum are designated to the component used in synthesis confirming the chemical structure of the fabricated system. The humidity sensing study of the synthesized structure is carried out through a wide range of relative humidity (RH) levels range of 11–97%. The response and recovery times of the fabricated structure are found to be around 120 and 220s, respectively.

This paper presents an extensive literature review on Binary Neural Network (BNN). BNN utilizes binary weights and activation function parameters to substitute the full-precision values. In digital implementations, BNN replaces the complex calculations of Convolutional Neural Networks (CNNs) with simple bitwise operations. BNN optimizes large computation and memory storage requirements, which leads to less area and power consumption compared to full-precision models. Although there are many advantages of BNN, the binarization process has a significant impact on the performance and accuracy of the generated models. To reflect the state-of-the-art in BNN and explore how to develop and improve BNN-based models, we conduct a systematic literature review on BNN with data extracted from 239 research studies. Our review discusses various BNN architectures and the optimization approaches developed to improve their performance. There are three main research directions in BNN: accuracy optimization, compression optimization, and acceleration optimization. The accuracy optimization approaches include quantization error reduction, special regularization, gradient error minimization, and network structure. The compression optimization approaches combine fractional BNN and pruning. The acceleration optimization approaches comprise computing in-memory, FPGA-based implementations, and ASIC-based implementations. At the end of our review, we present a comprehensive analysis of BNN applications and their evaluation metrics. Also, we shed some light on the most common BNN challenges and the future research trends of BNN.

Laser processing of supercapacitor electrodes is a simple, accurate and fast method for planner, binder-free and flexible devices fabrication. In this context, two nanosecond lasers of 355 and 1064 nm were applied to process graphene oxide separately in a single step and successively in subsequent two step. The injection of Ar gas during laser writing enables maximum reduction with a minimal thinning effect. Energy Dispersive X-ray spectroscopy (EDX) measurement showed a high reduction degree and oxygen contents of nearly zero due to high deposited laser power and induced plasma for the 1064 nm laser. Moreover, two step laser writing promoted a highly crystalline layered graphene despite the applied ambient conditions. The electrochemical characterization was applied via 2 and 3-electrodes setup in H2SO4 (1 M) electrolyte, laser-induced graphene (LIG) electrodes ach-ieved 633.3 and 345.5 mF/cm2 at 0.5 and 5 mA/cm2, respectively. Besides, energy and power densities of about 88 mu Wh/cm2 (at 0.5 mA/cm2) and 2500 mu W/cm2 (at 5 mA/cm2), respectively. These values are several orders of magnitudes higher than previous reports of laser-processed crude graphene thanks to nanosecond laser in-teractions. The retention of capacitance was 114 % after 2000 cycles due to H2SO4 electrolyte doping process. In addition, different laser processing interactions and subsequent application impact on electrochemical perfor-mance were studied. LIG samples were examined via scanning electron microscopy, EDX, Raman spectroscopy and x-ray diffraction, Brunauer-Emmett-Teller, high-resolution transmission electron microscope. This LIG's outstanding electrochemical performance will enable near-battery energy values when considering a faradic additive.

Supercapacitor (SC) with a wide operation voltage window in an aqueous electrolyte is a critical key for boosting energy, overcoming safety and fabrication cost obstacles. Thus, tin dioxide/graphene (SGO) was synthesized using one-pot method for easy and hybrid metal oxide decoration on graphene sheet. Laser writing (LW) technique was employed to enhance SGO active material's electrochemical performance through high-power laser irradiation of two different optical ranges 355 and 1046 nm. Photothermal laser processing achieved ternary Sn-SnO2-RGO composition of specific capacitance to similar to 872 and 385 F/g at 5 mV/s and 1 A/g, respectively. Nanosecond laser pulses induced extensive SGO exfoliation and redistribution of reduced tin metal on graphene sheets' edges. Laser-processed SGO SCs offer a battery-like energy density of 173 Wh/Kg at 1 A/g coupled with high power of 283 kW/Kg at 80 A/g. Interestingly, the retention at a high current of 80 A/g is nearly >99.6 %, which suggests a strong coupling between tin metal/tin dioxide and graphene 3D conductive networking. LW impact on capacitive performance was deliberately guarded by photothermal and photochemical interactions. SGO-based SCs binder-free electrodes were conducted to Raman spectroscopy, X-ray diffraction, different electron imaging, elemental analysis and extensive electrochemical characterization.

The growing development of inter-networking devices and internet-of-things (IoT) are required to make use of all possible energy sources for different types of sensor. Ambient renewable energy resources are needed and received more attention this era especially those present at all the day and not depend on moving, wind or sunlight. The ambient electromagnetic field as radio frequency (RF) is constantly present, even with a very small amplitude, a reliable alternative to supply the system with a low power rate. This paper presented a split ring resonator shaped monopole antenna circularly polarized to resonate at different resonant on low cost FR4 substrate size of Universal Serial Bus (USB) integrated with multiband rectifier circuit by using high frequency structure simulator (HFSS) ver. 15. The proposed antenna is circularly polarized could be used at any orientation to be used as portable RF energy harvesting device with dimensions 15 × 35 mm2. The −10 dB impedance matching bandwidth of the proposed monopole antenna start to resonate from 2 GHz up to 10 GHz with band notches extended from 2.5 GHz to 3.5 GHz, hence the antenna resonates at most of wireless communication. In addition, the single stage of voltage doubler rectifier (VDR) is added and designed to convert the RF into direct current (DC) signal with wideband of operation extended from 2 GHz up to 10 GHz with overall size of the rectifier is 9.2 × 20 mm2. A pair package of SMS 7630 Schottky diode is used with a voltage drop of 0.34 V. The matching circuit is optimized using Advanced Design System (ADS) simulation tool such for maximum DC output signal through the frequency band of operation. The maximum DC output voltage is 0.94 V for 5 kΩ load resistance with 60% power conversion efficiency at −5 dBm input signal.

The researchers used the oxidative chemical polymerization of aniline to prepare the polyaniline/polyvinyl alcohol (PANI/PVA) blend and its nanocomposites loaded with cadmium sulfide and Titanium dioxide nanoparticles (CdS-NPs & TiO2-NPs) were synthesized by aniline oxidative chemical polymerization. CdS and TiO2 were incorporated into the prepared nanocomposite to reinforce the mechanical and electrical energy storage performance. XRD revealed the presence of CdS NPs & TiO2 NPs in the polymer matrix; meanwhile, SEM confirms they are well dispersion in the polymer matrix and are dispersed well on the superficies of the synthesized nanocomposites. The presence of characteristic peaks in the Fourier transforms infrared proved the compatibility of the investigated nanocomposite. This study demonstrates how stable the synthesized samples are, with residual material for TiO2/PANI/PVA exceeding 60% even at 800 °C and for CdS/PANI/PVA exceeding 33% at 800 °C. The capacitance of CdS/PVA/PANI nanocomposites (492.29 F.g−1) at 1 A.g−1. The CdS/PVA/PANI and TiO2/PVA/PANI nanocomposites possesses the maximum Es of 2343.65 Wh.kg−1 and 373.17 Wh.kg−1. The CdS/PVA/PANI nanocomposites had the highest energy storage and power density among these binary hybrids. A broadband dielectric spectroscopy was used to examine the electrical and dielectric properties of the prepared samples over a broad range of frequencies and at four selected temperatures. The growth in dc caused by the rise in temperature from 25 to 150 °C (from 10−12 to 10−7 S cm−1) was around five decades as well as the second nanocomposite, TiO2/PANI/PVA, has slightly higher conductivity. The study shows that the blend behaves similarly to its two nanocomposites in the activation plot. However, the blend has higher dc-conductivity by about four orders of magnitude, and an electrode polarization is developed accompanied by apparently colossal ε′ values. This makes it very promising for applications in many fields of advanced microelectronics.

This paper demonstrates an on–off keying (OOK) super-regenerative quenching transmitter operating in 402–405 MHz MICs band applications. To reduce power consumption, the transmitter is controlled by a novel digital quenching signal controller that generates a digital control signal to start transmitter operation when a baseband signal is input to the transmitter. The digital signal controller consists of an envelope detector, a comparator, and a quench timer designed using a state machine to synchronize the operation between the digital controller and the input baseband signal. The transmitter consists of a Colpitts oscillator operating in double operating frequency followed by a frequency divider by 2; this configuration reduces system area and improves phase noise and signal spectrum. The proposed transmitter is implemented using UMC 130 nm CMOS technology and a 1.2 V supply. Simulation shows that the proposed transmitter can meet MICS band mask specifications with data rates up to 1 Mbps and total power dissipation of 537 uW.

A single layer microstrip diode rectifier circuit with a flexible thin film schottky diode is proposed. A compact half wave rectifier with a shunt-diode configuration is designed and implemented using off-shelf SMS-7630 low barrier Schottky diode tuned for a centre frequency of 10 GHz and fabricated one using 0.81 mm Rogers (RO4003c) substrate. The rectifier circuit with the commercial diode has a maximum conversion efficiency of 41% with 300 Ω load resistance. Al-doped-ZnO (AZO) semiconductor nanoparticle ink is used to fabricate a flexible thin film Schottky diode (TFSD). The proposed TFSD device consists of 3 layers, Ag/AZO/Cu and fabricated by deposition of a thin film of nanoparticle-ink AZO on a flexible copper tape substrate then applying an Ag electrode on the AZO to obtain the Schottky barrier diode with an active area of 1 mm2. Measurements shows that the 280 nm thickness device has the maximum forward current density up to 0.28 A/cm2 at 2 V. Also the measurements show that proposed rectifier has a maximum conversion efficiency 35% with 300 Ω load resistance which is smaller than that of the commercial diode because of the commercial diode is more conductive than the proposed thin film schottky diode. The overall size of the two rectifiers is 13.3 × 8.2 mm2. The rectifier is simulated using an electromagnetic simulator with good agreement for both simulation and measurements.

Graphene is known as the miracle material of the 21st century for the wide band of participating applications and epic properties. Unlike the CVD monolayer graphene, Reduced graphene oxide (RGO) is a commercial form with mass production accessibility via numerous numbers of methods in preparation and reduction terms. Such RGO form showed exceptional combability in supercapacitors (SCs) where RGO is participated to promote flexibility, lifetime and performance. The chapter will illustrate 4 critical milestones of using graphene derivatives for achieving SC’s superior performance. The first is using oxidized graphene (GO) blind with polymer for super dielectric spacer. The other three types are dealing with electrolytic SCs based on RGO. Polyaniline (PANI) was grown on GO for exceptionally stable SCs of 100% retention. Silver decoration of RGO was used for all-solid-state printable device. The solid-state gel electrolyte was developed by adding GO to promote current rating. Finally, laser reduced graphene is presented as a one-step and versatile technique for micropatterning processing. The RGO reduction was demonstrated from a laser GO interaction perspective according to two selected key parameters; wavelength and pulse duration.

This paper reported a pioneering 5G multiband microstrip line fed patch antenna for IoT, wireless power transfer (WPT) and data transmission. The proposed antenna is accomplished using a triple L-arms patch antenna responsible for the multiband response. A diamond-shaped ground slot is added to control and increase the bandwidth of the resonant frequency. The antenna is designed to resonate at 10, 13, 17 and 26 GHz with 10 dB impedance bandwidths of 0.67, 0.8, 2.45 and 4.3 GHz respectively. The proposed antenna is fabricated using microstrip technology with total area of 16.5x16.5 mm(2). The 5G multiband antenna has sufficient realized gain of 4.95, 5.72, 4.94 and 7.077 dB respectively. The antenna is designed and simulated using the CST Microwave Studio Suite (Computer Simulation Technology). Measurements show good agreement with simulations in all frequencies of operation.

This work proposes a dual-mode radio frequency (RF) power amplifier (PA) for the 4.8 GHz multi-standard applications using a 130 nm CMOS technology. The proposed RF power amplifier (PA) consists of two stages (driver and power). By changing the driver and the power stages bias voltages any mode of PA (class-AB\F) can be achieved. The class-AB or linear mode power amplifier design is appropriate for IoT, LTE, 5G, and multi-standard RF transmitters. Whereas the class-F or switching mode PA is suitable for IoT-LPWAN and Bluetooth applications. The class-AB mode has a saturated output power of 23 dBm at 4.8 GHz, a power-added efficiency (PAE) of 29.5 %, an output third-order intercept point (OIP3) equals 18 dBm, and for LTE 15MHz channel bandwidth the adjacent channel power ratio (ACPR) is -36 dBc. On the other hand, the maximum PAE is 28% and the output power equals 22.3 dBm for the class-F mode. The proposed power amplifier occupies 0.88 mm(2) of the chip area where the active area equals 0.53 mm(2). The power dissipation is 136 mW or 26 mW in the proposed class-AB or class-F PA modes, individually.