Precise and damage-free doping of two-dimensional semiconductors is essential for advancing their use in nano-electronic and optoelectronic devices. Here, we present a controllable strategy for n-type doping and phase engineering of monolayer MoS2 by tuning sulfur vacancy formation using energy-controlled Ar+ ion treatment. This method enables selective top-layer sulfur removal without disrupting the underlying lattice, leading to enhanced n-type conductivity. Extended plasma exposure induces a phase transition from the semiconducting 2H phase to the metallic 1T phase, as confirmed by Raman, photoluminescence, and X-ray photoelectron spectroscopy. Doped devices exhibit improved electrical and optoelectronic performance, including higher on-current, carrier mobility, and photoresponsivity. Additionally, selective formation of 1T contacts at the source/drain regions further reduces contact resistance and boosts injection efficiency. Al2O3 encapsulation is shown to suppress surface oxidation during O2 plasma exposure, maintaining device stability. This work demonstrates that plasma-assisted defect and phase control offers a practical and scalable pathway to tailor the electronic properties of 2D semiconductors.
The integration of ferroelectricity and the photoelectric effect offers substantial potential for the realization of optoelectronic-based artificial neural networks (ANNs) and biomimetic systems. Despite their potential, the application of ferroelectric field-effect transistors (FeFETs) in optoelectronic neuromorphic devices, where light regulates synaptic activation, remains largely unexplored. Here, we report InGaZnO/Zr-doped HfO2 (IGZO/HZO) artificial synapses for the emulation of optoelectronic ANNs and optogenetic-inspired neural functions. Particularly, by simultaneously optimizing the post-deposition annealing (PDA) process for the stabilization of HZO ferroelectric phase and activation of IGZO channel, high-performance FeFETs exhibiting a memory window of similar to 1 V and endurance up to 10(4) cycles were achieved. Spectroscopic analyses correlated PDA temperature-dependent dynamic transitions in electrical properties with hydrogen relocation, oxygen vacancy formation, zinc vaporization, and film densification. The IGZO/HZO synapses successfully emulated synaptic functions such as spike-amplitude and spike-duration-dependent plasticity, using both electrical (E) and optical (O) stimulation. Furthermore, dual E/O stimulus activation of IGZO/HZO synapses, combined with polarization state modulation, was employed to emulate optogenetic-inspired neural functions. We also demonstrated that dual E/O stimulus activation of artificial synapses enhanced ANN image recognition accuracy from 86 % to 90 %, outperforming the performance achieved with a single E-stimulation. We envision that these findings can provide a process protocol for IGZO/HZO FeFETs to achieve stable phasic control and realization of optoelectronic neuromorphic devices.
A defect engineering strategy based on controlling sulfur vacancies enables precise tuning of the doping concentration, which systematically transforms the properties of MoS 2 from semiconducting to metallic.
In this study, the effects of an Al2O3 interfacial layer (IL) on the characteristics of ferroelectric field-effect transistors (FeFETs) with Hf0.5Zr0.5O2 (HZO) gate dielectrics on Si substrates were investigated. FeFETs with HZO gate dielectrics have gained considerable attention owing to their compatibility with modern fabrication processes and scalability. However, during HZO deposition on Si substrates, an ultrathin metal silicate IL with a low dielectric constant is formed in an uncontrolled manner, leading to a significant voltage drop and the generation of interface traps during device operation. To address this issue, an ultrathin Al2O3 IL with a thickness less than 2 nm was introduced between the HZO film and Si substrate via in situ atomic layer deposition. The impact of this IL on a memory window (MW) and endurance characteristics was evaluated by comparing the devices with and without an intentional Al2O3 IL. The obtained results revealed that the Al2O3 IL effectively suppressed the interface trap generation, expanded the MW, and enhanced the transistor endurance characteristics. This described approach can be potentially used for improving the reliability of FeFETs fabricated on Si substrates.
AbstractA steep‐slope In‐Ga‐Zn‐O (IGZO) field‐effect transistor (FET) monolithically integrated with an Ag/Ti/Hf0.8Zr0.2O2 atomic threshold switch (ATS) device is presented, which allows switching below the Boltzmann limit of 60 mV dec−1 at room temperature (25 °C). The low‐temperature processable IGZO FET is combined with the Hf0.8Zr0.2O2‐based ATS device, which featured initialization‐free and low‐voltage switching, to achieve an ultra‐low power device solution with back‐end‐of‐line process compatibility (≤400 °C). To further assess the potential of the ATS‐IGZO FET devices for circuit applications, they are applied to logic and memory integrated circuits. Inverter ring oscillator simulations are performed to investigate the relationship between switching speed and power consumption. In addition, static random‐access memory simulations are performed to verify that ATS‐IGZO FETs can achieve a stable noise margin along with low standby power consumption. This comprehensive evaluation provides an in‐depth assessment of the applicability of ATS‐IGZO FETs for ultra‐low power logic and memory applications, highlighting their potential for substantial performance improvements.
The integration of ferroelectric HfO2 films into two-dimensional layered-material-based devices is expected to provide significant functionality for future electronics. In this study, Hf0.5Zr0.5O2 (HZO) films are directly grown on single-crystalline MoS2 flakes by atomic layer deposition (ALD) with varying deposition temperatures using H2O or O3 oxidants. According to density functional theory calculations and Raman measurements, O3-based ALD oxidizes the MoS2 surface at the atomic layer level, in contrast to the H2O-based ALD process, thus facili-tating the conformal deposition of an HZO film (10 nm) without any surface treatment of MoS2 at an elevated ALD temperature of 260 degrees C. Annealing the O3-based HZO film with a Mo capping layer at 600 degrees C significantly improves the ferroelectric properties with a symmetrical hysteresis loop on MoS2. However, distinct S out -diffusion accompanied by Hf, Zr, and O diffusion toward the Mo capping layer occurs because of the thermal dissociation of MoS2 at an additional atomic layer level, thereby leading to the subsequent reduction of weak HZO bonds by the released S atoms along the grain boundaries.
The realization of next-generation gate-all-around field-effect transistors (FETs) using two-dimensional transition metal dichalcogenide (TMDC) semiconductors necessitates the exploration of a three-dimensional (3D) and damage-free surface treatment method to achieve uniform atomic layer-deposition (ALD) of a high-k dielectric film on the inert surface of a TMDC channel. This study developed a BCl3 plasma-derived radical treatment for MoS2 to functionalize MoS2 surfaces for the subsequent ALD of an ultrathin Al2O3 film. Microstructural verification demonstrated a complete coverage of an approximately 2 nm-thick Al2O3 film on a planar MoS2 surface, and the applicability of the technique to 3D structures was confirmed using a suspended MoS2 channel floating from the substrate. Density functional theory calculations supported by optical emission spectroscopy and X-ray photoelectron spectroscopy measurements revealed that BCl radicals, predominantly generated by the BCl3 plasma, adsorbed on MoS2 and facilitated the uniform nucleation of ultrathin ALD-Al2O3 films. Raman and photoluminescence measurements of monolayer MoS2 and electrical measurements of a bottom-gated FET confirmed negligible damage caused by the BCl3 plasma-derived radical treatment. Finally, the successful operation of a top-gated FET with an ultrathin ALD-Al2O3 (∼5 nm) gate dielectric film was demonstrated, indicating the effectiveness of the pretreatment.
As the electron mobility of two-dimensional (2D) materials is dependent on an insulating substrate, the nonuniform surface charge and morphology of silicon dioxide (SiO2) layers degrade the electron mobility of 2D materials. Here, we demonstrate that an atomically thin single-crystal insulating layer of silicon oxynitride (SiON) can be grown epitaxially on a SiC wafer at a wafer scale and find that the electron mobility of graphene field-effect transistors on the SiON layer is 1.5 times higher than that of graphene field-effect transistors on typical SiO2 films. Microscale and nanoscale void defects caused by heterostructure growth were eliminated for the wafer-scale growth of the single-crystal SiON layer. The single-crystal SiON layer can be grown on a SiC wafer with a single thermal process. This simple fabrication process, compatible with commercial semiconductor fabrication processes, makes the layer an excellent replacement for the SiO2/Si wafer.
A low‐temperature one‐step growth method for few‐layer MoS2 using an atomic layer deposition scheme with MoCl5 and H2S precursors is systematically studied by introducing an ultrathin Al seed layer. First, to optimize the deposition conditions, the effects of the deposition (200–420 °C) and MoCl5 canister (100–160 °C) temperatures on the MoS2 growth behavior are investigated. On the SiO2 surface, increasing the deposition temperature reduces the growth rate while favoring more lateral growth. However, an increase in the MoCl5 sublimating temperature, which is beneficial to improve the film quality, sharply reduces the growth rate, probably owing to the pronounced self‐etching effect of MoCl5. To compensate for the reduced deposition rate while maintaining the MoS2 quality, an ultrathin Al seed layer (≈5 nm) is introduced, which promotes the surface adsorption of MoCl5 molecules at an early growth stage according to density functional theory calculations. Thus, a polycrystalline mono‐to‐bilayer MoS2 film with negligible amounts of residual contaminants (particularly Cl and Al) is successfully synthesized using the proposed Al seeding approach.
A novel selective atomic layer deposition (ALD) process for depositing MoS2 using MoCl5 and H2S precursors is proposed. On the surface of SiO2, the prolonged introduction of MoCl5 vapor by increasing the MoCl5 pulsing time rapidly suppresses the subsequent MoS2 growth due to the intense self‐etching effect of MoCl5, that is, the detachment of weakly bonded surface adsorbates (MoClx*). In contrast, the surface of Al allows more facile adsorption of MoCl5 than in the case of the SiO2 surface, and thus effectively compensates for the reduced deposition rate. By optimizing the MoCl5 pulsing time, the self‐aligned growth of MoS2 on predefined Al (5 nm) patterns (circular and letter patterns) on a SiO2 substrate with a negligible selectivity loss is demonstrated.