Electron scattering factors are analyzed for GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) using gate-biased Hall-effect measurements. The fabricated MOSFETs and Hall devices have AlSiO/AlN/p-type GaN gate structures formed on bottom p(+)/n(+) GaN junctions. Because the capacitance of the bottom p(+)/n(+) junction is much greater than the gate capacitance, the p-type body layer and the substrate electrode are short-circuited. Thus, the body potential is controlled by the substrate bias (V-sub). To investigate Coulomb scattering due to Mg dopants, MOSFETs with Mg-doped and undoped body layers are prepared. Comparing the sheet carrier densities N-s estimated from a capacitance-voltage curve and the Hall effect reveals that almost all electrons contribute to conduction in both channels. In the plot of Hall-effect mobility as a function of N-s, Coulomb scattering components are proportional to N-s(gamma). If Coulomb scattering is mainly caused by bulk impurities, gamma should be unity. However, gamma < 1 is obtained, indicating the existence of Coulomb scattering centers other than Mg atoms. The effective electric field perpendicular to the channels is essentially different between both channels, resulting in differences in the scattering magnitudes. V-sub allows control of the effective channel field independent of the gate bias. The effective channel field in the Mg-doped channel at V-sub = 0 V is almost equivalent to that in the undoped channel at -40 V. Then, the Hall-effect mobilities are almost equal. We conclude that Coulomb scattering centers are mainly located near the interface between the gate insulator and the channel.

Gap states at AlSiO/GaN interfaces with and without an AlN interfacial layer (IL) have been investigated by the sub-bandgap-light-assisted capacitance-voltage (C-V) method. The thickness of the crystalline AlN IL was 0.8 nm, which is below the critical thickness. The metal-oxide-semiconductor structures formed on n-type GaN were used for the investigation. In sub-bandgap-light-assisted C-V measurements, the bias voltage was swept from the negative bias end to the positive bias end after the monochromatic sub-bandgap light was irradiated at the negative bias end and turned off. The AlN IL showed a reduced interface state density (D-it) especially around the midgap, which is clarified by sub-bandgap-light-assisted C-V measurements with the irradiation time fixed. On the basis of the irradiation time dependence of sub-bandgap-light-assisted C-V characteristics, we investigated the behavior of near-interface traps (NITs). The flatband shift (Delta V-FB) of C-V characteristics in the backward direction was dependent on irradiation time. In the sample without the AlN IL, the irradiation time dependence of Delta V-FB indicated the Fowler-Nordheim tunneling injection of holes into NITs at the 2.2 and 2.6 eV photon energies of the irradiated monochromatic light. Upon the insertion of the AlN IL, however, the irradiation time dependence of Delta V-FB was negligible for the 2.2 eV light irradiation and completely different from the Fowler-Nordheim tunneling injection for the 2.6 eV light irradiation, indicating a possibility that a portion of photoinduced holes accumulated at the AlSiO/AlN interface.

Donor-like defects induced by Si-ion implantation and subsequent annealing cause an excess net donor concentration (ND) in GaN, which makes precisely controlling ND in devices difficult. To clarify the origin of the donor-like defects, this study investigates ND distributions in GaN layers implanted with various neutral or donor elemental ions before the samples are annealed. The implantation of Al ions as neutral species in GaN resulted in an increase in ND along the implantation profile after annealing at 1100 degrees C, similar to the effect of Si-ion implantation. This suggests that donor-like defects originate from intrinsic defects rather than from impurities. By contrast, excess ND was suppressed near the concentration peaks for N and O ions that mostly substitute at N sites in GaN. These results suggest that N vacancies are presumably responsible for the excess ND and that their formation is suppressed by implantation of ions substituting at N sites.

A technique for inserting a thin crystalline AlN interfacial layer (AlN-IL) at the oxide/p-type GaN interface is investigated to enhance the channel mobility in GaN metal-oxide-semiconductor field-effect transistors (MOSFETs). In this study, the negative-bias temperature instability (NBTI) for AlSiO/p-type GaN MOSFETs with and without an AlN-IL is discussed. Capacitance-voltage analyses revealed a high density of interface states at energy levels of 1 and 0.8 eV above the valence-band maximum for GaN in the MOSFETs with and without an AlN-IL, respectively. In the MOSFET without an AlN-IL, the threshold voltage (V-th) rapidly shifted to negative and subsequently remained unchanged, even when a stress voltage was applied. In addition, the shift was reduced at high temperatures, likely because of thermal emission of holes from the interface states. By contrast, the V-th shift for the MOSFET with an AlN-IL gradually increased with increasing applied bias stress time. When the AlN-IL thickness was reduced to 0.8 nm, the V-th shift decreased compared with that for the MOSFET without an AlN-IL. However, the negative V-th shift was enhanced and proportional to the logarithm of the stress time at a temperature of 100 degrees C, indicating a tunneling process. The increase in the V-th shift at 100 degrees C is likely caused by hole tunneling to the band discontinuity at AlSiO/AlN through the polarization-field-induced triangular potential in the AlN-IL. Thus, engineering of band alignment is a key for NBTI control in an AlSiO/AlN/p-type GaN MOSFET with high channel mobility.

A metal-oxide-semiconductor (MOS) gate structure has an advantage of the enough gate overdriving compared to the junction gate, which is an important point for high-power applications such as in-vehicle inverters. There are two major types in vertical GaN MOS field-effect transistors (MOSFETs); a trench-gate MOSFET having a m-plane channel and double-implanted MOSFET having a c-plane channel. Using AlSiO/AlN/GaN structure to enhance the channel mobility [1], this study fully compares both channel planes in terms of the channel mobility, the availability of E-mode operation, and the bias- and temperature-dependent threshold voltages ($V_{\mathrm{th}}$).

Annealing behaviors of vacancy-type defects in low-dose ion-implanted GaN are studied by positron annihilation. N+, Al+, and Si+ ions are implanted with a dose of 1 x 1012 cm-2. For Al- and Si-implanted GaN after annealing at 1100 degrees C, the depth profiles of the net donor concentration (N D) are close to those for implanted impurities, but N D is 2-3 times higher than Al or Si concentrations. N D of N-implanted GaN is higher than that of an unimplanted sample but is lower than that of the Al- and Si-implanted samples. The origin of donor-like defects introduced by ion implantation is expected to be N-vacancy-related defects. A comparison between depth profiles of vacancy-type defects and N D reveals that Ga-vacancy (VGa)-type defects play a significant role in the annealing behavior of N D. Photoexcitation of VGa-type defects and their electron detrapping phenomena are also studied.

Bias instability is a critical issue for metal–oxide–semiconductor field-effect transistors (MOSFETs). This study demonstrates suppression of the positive bias instability of the threshold voltage (Vth) in a GaN MOSFET by insertion of a thin crystalline AlN interlayer (AlN-IL) formed by plasma-enhanced atomic layer deposition. The gate stacks were composed of an AlSiO/AlN/p-type GaN structure having a high channel mobility of greater than 170 cm2 V−1 s−1. When the AlN-IL was inserted, the Vth shift under an oxide electric field of 3.9 MV cm−1 was strongly suppressed from 0.72 V to less than 0.12 V. This suppression was attributed to an increase in the effective barrier height associated with oxide traps in the AlSiO for inversion channel electrons as a result of the insertion of the polarized AlN-IL. The key to this approach is adequate control of the AlN-IL thickness. The insertion of a 0.8-nm-thick AlN-IL led to a low interface state density (Dit) and a minimized positive bias instability, whereas an AlN-IL thicker than 2.3 nm led to an increase in both Dit and a Vth shift. The effective barrier height should increase with increasing AlN thickness; however, an increase in a Vth shift instead occurred. This indicates that defects that capture electrons are additionally introduced when the thickness of the AlN-IL on GaN layers exceeds the critical thickness. The results clearly suggest that Vth instability can be minimized by controlling the thickness of a thin AlN-IL deposited at an AlSiO/p-type GaN interface and simultaneously providing high channel mobility.

The factors limiting channel mobility in AlSiO/p‐type GaN metal‐oxide‐semiconductor field‐effect transistors (MOSFETs) were examined by performing Hall‐effect measurements in conjunction with a gate bias, with and without a thin AlN interlayer. In the absence of this interlayer, the free carrier concentration associated with the Hall effect was significantly reduced compared with the net gate charge density estimated from capacitance–voltage data, indicating that electrons were trapped to a significant extent at the MOS interface. These interface traps were found to have an energy approximately 20 meV above the Fermi level in strong inversion based on temperature‐dependent Hall effect data. The insertion of a 0.8 nm thick AlN interlayer eliminated charge trapping such that almost all gate charges were mobile. The mobility components could be divided into types based on their effect on the effective electric field perpendicular to the channel. Coulomb scattering centers resulting from interface states were evidently reduced by inserting the AlN interlayer, which also enhanced the channel mobility to over 150 cm2/Vs. This article is protected by copyright. All rights reserved.

Direct extraction of gap states from a metal-oxide-semiconductor field-effect transistor (MOSFET) in which inversion electrons and holes in a p-type body coexist is challenging. We demonstrate gap-state extraction in lateral-type GaN MOSFETs with high channel mobilities using multi-terminal capacitance–voltage (C–V) methods. The gate stack of the MOSFET was composed of AlSiO/AlN/p-type GaN formed on a p+/n+ GaN tunnel junction structure. The substrate electrode was short-circuited to a p-type body layer through the tunnel junction. The MOSFET was equipped with gate, source, drain, body, and substrate electrodes. When the gate was the high side and the other electrodes were the low side in the AC circuit, a V-shaped C–V curve was obtained because of electron inversion and hole accumulation. When the body/substrate electrodes were connected to the ground level (i.e., split C–V method), the inversion electrons between the gate and source/drain electrodes could be evaluated. We proposed a “reverse” split C–V method in which the source/drain electrodes are grounded and the body/substrate electrodes are connected to the low side. This method enabled extraction of gap states near the valence-band maximum of GaN, with exclusion of the overlap capacitance and the capacitance due to inversion electrons. The proposed method demonstrated overall gap states in the GaN MOSFET with a wide bandgap. The results suggest that hole traps with discrete energy levels caused negative bias instability (NBI) in the GaN MOSFET. Furthermore, NBI and discrete gap states were consistently suppressed by Mg doping at >1018 cm−3 into a p-type body.

For rooting the development of GaN-based optoelectronic devices, understanding the roles of midgap recombination centers (MGRCs), namely, nonradiative recombination centers and deep-state radiative recombination centers, on the carrier recombination dynamics is an essential task. By using the combination of time-resolved photoluminescence and positron annihilation spectroscopy (PAS) measurements, the origins of major MGRCs in the state-of-the-art GaN epilayers, bulk crystals, and Mg-implanted layers were identified, and their concentrations were quantified for deriving the capture coefficients of minority carriers. In this article, potential standardization of the room-temperature photoluminescence lifetime for the near-band-edge emission (τPLRT) as the concentration of major MGRCs well below the detection limit of PAS is proposed. For n-GaN substrates and epilayers grown from the vapor phase, τPLRT was limited by the concentration of carbon on N sites or divacancies comprising a Ga vacancy (VGa) and a N vacancy (VN), [VGaVN], when carbon concentration was higher or lower, respectively, than approximately 1016 cm−3. Here, carbon and VGaVN act as major deep-state radiative and nonradiative recombination centers, respectively, while major MGRCs in bulk GaN crystals were identified as VGa(VN)3 vacancy clusters in Na-flux GaN and VGa or VGaVN buried by a hydrogen and/or VGa decorated with oxygen on N sites, VGa(ON)3–4, in ammonothermal GaN. The values of τPLRT in n-GaN samples are compared with those of p-GaN, in which τPLRT was limited by the concentration of VGa(VN)2 in Mg-doped epilayers and by the concentrations of VGaVN and (VGaVN)3 in Mg-implanted GaN right after the implantation and after appropriate activation annealing, respectively.

The polarization in a III-nitride system enhances conductivity in a MOS channel, while reduces the threshold voltage $(V_{\mathrm{t}\mathrm{h}})$ and causes its temperature dependence. To simultaneously obtain a high channel mobility and a stable E- mode operation, the gate insulator composed of an amorphous AlSiO and a crystalline AlN are applied to the m- plane GaN channel using a trench gate structure. By inserting a 1.1 nm thick AlN, interface traps on a $m$-plane MOS channel are minimized, resulting in the effective mobility over 180 cm2 V−1s−1. Different from a MOSFET on a c-plane, the $V_{\mathrm{t}\mathrm{h}}$ value does not depend on the AlN thickness and is approximately 1 V for the acceptor doping at 1017 cm−3. Furthermore, the $V_{\mathrm{t}\mathrm{h}}$ on the m-plane GaN channel exhibits little temperature dependence in the range of 223 to 473 K because of no pyroelectric effect.

Abstract This review focuses on controlling interface charges and traps to obtain minimal channel resistance and stable enhancement-mode operation in GaN MOSFETs. Interface traps reduce the free electron density and act as Coulomb scattering centers, thus reducing the channel mobility. Oxide traps cause instability of threshold voltage (V th) by trapping electrons or holes under gate bias. In addition, the V th is affected by the overall distribution of interface charges. The first key is a design of a bilayer structure to simultaneously obtain good insulating properties and interface properties. The other key is the optimization of post-deposition annealing to minimize oxide traps and interface fixed charges. Consequently, the gate structure of an AlSiO/AlN/p-type GaN has been designed. Reductions in V th as a result of polarization charges can be eliminated using an m-plane trench channel, resulting in a channel mobility of 150 cm2 V–1s–1 and V th of 1.3 V.

An undefined bound exciton line (UDX) with a photon energy 0.6 meV lower than the Si-donor bound exciton line was observed by photoluminescence in gallium nitride (GaN) layers annealed at 1100 degrees C after electron beam (EB) irradiation at an energy of 137-2000 keV. The UDX was not observed in samples not subjected to EB irradiation or annealing but was found in a sample annealed after EB irradiation at an energy of 137 keV, where only nitrogen atoms are displaced in GaN. The origin of the UDX was presumably formed by a thermal reaction of defects containing nitrogen-displacement-related defects.

Polarization engineering by AIN interlayers (AlN-ILs) deposited via plasma-enhanced atomic layer deposition was demonstrated in AlSiO/p-type GaN MOSFETs. Transmission electron microscopy observations revealed that the AlN-ILs were grown on GaN epitaxially and therefore could induce polarization charges, similar to AlGaN/GaN. The decrease in the threshold voltage (V th ) with increasing AIN-IL thickness corresponded to the polarization charge density. In addition, insertion of the AIN-IL suppressed the positive bias instability by less than 0.05 V. By controlling the AIN-IL thickness and the channel p-type doping, we controlled the V th the range from −3 to 5 V and achieved enhanced channel mobility compared with that for the corresponding MOSFET without an AIN-IL.

Si ions were implanted at a dose of 1 × 10 10 cm −2 into a homoepitaxial n-type GaN layer with a net donor concentration ( N D ) of 3–8 × 10 15 cm −3 . The N D in the implanted region increased by 1–3 × 10 15 cm −3 after annealing at a temperature greater than 900 °C compared with that for the as-grown homoepitaxial layer. The increase in N D was considerably larger than the peak concentration of implanted Si ions (3 × 10 14 cm −3 ). No increase in N D was observed for an as-grown sample after annealing. These results clearly suggest that donor-like defects were introduced by implantation of Si ions and a subsequent annealing process.

We demonstrate the advantage of post-implantation annealing (PIA) in NH3/N2 for a p-n diode (PND) fabricated by the implantation of Mg and N ions into an n-type GaN layer by comparison with that annealed in N2. The leakage current for the PND with a reverse bias was lower in the case of NH3/N2 annealing. The cathodoluminescence spectrum measured for NH3/N2 annealing indicated a reduction in the densities of non-radiative recombination centers and nitrogen vacancy complexes. PIA in NH3/N2 is thus effective to suppress the density of implantation induced defects as leakage current sources.

Si ions were implanted into homoepitaxial n-type GaN at a peak concentration of 3 × 10 14 cm −3 with subsequent annealing, and the associated formation of electron traps was investigated in detail using deep-level transient spectroscopy. A major electron trap was identified as 0.26 eV below the conduction band minimum and this trap concentration increased with increasing post-implantation annealing temperature, to a value of 6–8 × 10 15 cm −3 . Significant increases in the net donor concentration ( N D ) were also observed within the implanted region. The profile of the electron trap concentration was correlated with these increases in N D , suggesting that these traps acted as donors.