A pico-watt voltage reference (VR) for IoT systems is proposed in this paper. By employing a pre-regulation technique, the proposed VR achieves an ultra-high performance of line regulation (LR) and PSRR. Based on a standard 0.18-μm CMOS process, the temperature-independent characteristics of this design are obtained by taking advantage of the threshold voltage (V TH ) differences for 5 V and 1.8 V PMOS transistors. Simulation results show that the proposed VR achieves a temperature coefficient (TC) of 16 ppm/°C over the temperature range of 0 °C to 120 °C with a 1.2 V supply voltage. The total current consumption is 110 pA at 27 °C with an LR of 170 ppm/V over the supply voltage ranges of 1.2 V to 2.7 V while the corresponding PSRR is -77 dB at 100 Hz.

An ultra-low power subthreshold voltage reference (VR) with a high performance of line regulation (LR) and power supply rejection ratio (PSRR) based on leakage current characteristics of MOSFETs is designed using only one type of MOSFETs. Evaluation results show that the proposed VR achieves an ultra-high line regulation of 250 ppm/V and a PSRR level of -74 dB at 100 Hz while the supply voltage ranges from 1.6 V to 2.8 V. The minimum temperature coefficient (TC) is 58.5 ppm/°C while the temperature ranges from 0 °C to 120 °C. The current consumption is only 73 pA with a minimum supply voltage of 1.6 V at room temperature (27 °C).

MBIST(Memory Built-In Self-Test) technology has extensive application in the memory test. In view of the traditional BIST controller register transfer level description language design process is relatively complicated, special flexibility EDA tools to define algorithm flexibility is poor, and the circuit structure is fixed, this paper proposes the use of high-level synthesis tools BIST controller design method. This paper takes SRAM as the object, describes the MARCH algorithm in C language, and uses port allocation, pipeline optimization and array segmentation to optimize the design. Finally, with the tools of the FPGA platform it verifies and evaluates the function reliability and scle controllability of the high-level synthesis synthesized RTL code level circuit. Compared with the two traditional methods, the limitation of algorithm implementation and circuit structure is eliminated, and the implementation period of the algorithm is reduced.

Based on the traditional first-order compensation bandgap reference analysis, this paper proposes a novel high-order compensation technique and uses this technique to design a curvature compensation voltage reference with a low temperature coefficient over a wide temperature range. The circuit structure proposed in this paper is designed and simulated based on the VIS 0.15 μm BCD technology. The simulation results show that the average output voltage of the reference circuit is 539 mV and the temperature coefficient is 1.40 ppm/℃ in the wide temperature range(-60 ℃~120 ℃), the line regulation of output voltage at 27 ℃ is 0.001 9% under the power supply from 1.3 V to 2.1 V, and the power supply rejection is greater than 84 dB at 100 Hz.