CMOS image sensors (CISs) in high-end mobile devices require wide dynamic range and superior image quality under extremely low light conditions [1]. To implement high-resolution sensors that meet market demand, a back-illuminated stacked sensor with front deep-trench isolation (FDTI) has proven to be effective in implementing submicron pixel sensors with excellent full-well capacity (FWC) and signal-to-noise ratio (SNR) [2, 3]. However, the main risk of FDTI is deterioration of dark temporal noise (TN) as the channel area of in-pixel amplifiers shrinks. In general, in-pixel transistor size is restricted by the presence of high-aspect-ratio DTI. Furthermore, phase-detection auto-focus (PDAF) of the entire imaging area is in high demand for mobile cameras in terms of its high speed and accurate focus, particularly under low-illumination conditions [4, 5]. In this work, a 50Mpixel sensor that satisfies the various characteristics and functions described above is reported. The sensor consists of a quad-PD (Q-cell) with a 0.5μm unit pixel sharing an inter-PD overflow (IPO) path through an intersection of DTIs between neighboring PDs. This shared structure plays an important role in: 1) increasing FWC required for wide dynamic range, 2) increasing conversion gain (CG) by simplifying metal routing of floating diffusion (FD) nodes at DTI intersections, 3) increasing the area of amplifiers in pixels, and 4) increasing sensitivity by removing the doped polysilicon of DTI on an optical axis. In this paper, we present an optimized pixel design and several solutions suitable for deep-submicron pixel sensors that achieve competitive FWC, TN and, sensitivity.

As the automotive and AI industries are expanding rapidly, global-shutter (GS) image sensors are playing a more significant role in the perception system. More specifically, GS image sensors are required in various fields involving IR, including the face-ID in mobile devices, the driver monitoring system in automotive applications, and factory automation. GS image sensors are necessary for these applications because they can capture freeze-frame images without motion distortion due to their advantage in the pixel operation method. The simultaneous pixel exposure and in-pixel storing capability allow GS image sensors to achieve high-quality imaging, while the sequential pixel exposure and readout of rolling-shutter (RS) image sensors results in image distortion known as the jello effect. For mobile and automotive applications, a small form factor while maintaining a low parasitic light sensitivity (PLS) and low noise is crucial. In conventional backside illuminated (BSI) charge-domain GS image sensors, a light-shielding structure over the storage area must be formed in order to suppress the influence of parasitic light during the readout operation. Therefore, the introduction of such a light-shielding structure reduces the effective photodiode area, which results in a loss of full-well capacity (FWC), light sensitivity of the sensor, and pixel scalability.

We present photonics technology based on a bulk-Si substrate for cost-sensitive dynamic random-access memory (DRAM) optical interface application. We summarize the progress on passive and active photonic devices using a local-crystallized Si waveguide fabricated by solid phase epitaxy or laser-induced epitaxial growth on bulk-Si substrate. The process of integration of a photonic integrated circuit (IC) with an electronic IC is demonstrated using a 65 nm DRAM periphery process on 300 mm wafers to prove the possibility of seamless integration with various complementary metal-oxide-semiconductor devices. Using the bulk-Si photonic devices, we show the feasibility of high-speed multidrop interface: the Mach–Zehnder interferometer modulators and commercial photodetectors are used to demonstrate four-drop link operation at 10 Gb/s, and the transceiver chips with photonic die and electronic die work for the DDR3 DRAM interface at 1.6 Gb/s under a 1∶4 multidrop configuration.