Aging infrastructures require constant monitoring to prevent major disasters. Accurate tilt detection is vital in determining the instability of bridges and foundations; however, existing systems depend on batteries, cables, and periodic calibration. We present a battery-free wireless tilt sensor based on a dual-band microwave structure that allows self-calibration against varying environmental effects and distance ambiguity. The sensor uses harvested energy from signals transmitted by a reader and integrates sensing, communication, and antenna functionalities into one device. The measurement results show that tracking the phase difference between two bands mitigates environmental factors. A 36° phase shift over a tilt range of -10° to +10° is observed, corresponding to a sensitivity of 1.8° of measured phase per 1° of actual tilt. The system is fully integrated, IoT-ready, and facilitates easy integration into a sensor network. It also creates a reliable platform for monitoring critical infrastructures in real-time to ensure rapid measurement of tilts from multiple sensors.
Design of integrated power converters capable of operating with a wide input voltage range in standard CMOS technologies is challenging due to the low breakdown voltage of modern transistors. This article presents a fully integrated, fully soft-switched resonant modular multilevel converter (IRMMC), designed in standard 180 nm CMOS with nominal supply voltage of 1.8 V, that enables high-efficiency power conversion over a wide input voltage range of 2-5.5 V-well beyond the safe operating limits of scaled CMOS devices. The proposed architecture combines multilevel voltage division, resonant energy conversion, and modular reconfiguration to simultaneously support wide input adaptability, inherent flying-capacitor voltage balancing, and continuous output voltage regulation. A dynamically reconfigurable multilevel converter, utilizing an additional sub-module and control logic, enables seamless mode transitions and capacitor self-balancing without the need for complex sensing or control loops. An integrated LLC resonant tank, using a 0.8 nH in-package series inductor, along with an active rectifier, achieves output regulation from 0.4-1.2 V and ensures full zero-voltage switching (ZVS) for all power mosfets across the entire operating range. The prototype converter delivers a maximum output power of 2 W with a peak efficiency of 88%, demonstrating its suitability for compact, energy-efficient power delivery in integrated system-on-chip applications.
This paper presents a dual-mode equilateral triangular resonator (DETR) sensor with a slit, which is theoretically analyzed and experimentally validated. In line with the theoretical analysis, the dual modes are the result of the rotation and superposition of the fundamental mode. A circuit model was developed tovalidate the theoretical analysis and good agreement was observed through a comprehensive comparison of results from full-wave simulations, theoretical calculations, and circuit model predictions. The proposed DETR operates in the industrial, scientific, and medical (ISM) band (902-928 MHz) and offers a unique communication link (or calibration) capability, making it a promising candidate for various applications. As a proof-of-concept, a prototype was designed, fabricated, and experimentally measured that confirmed the reliability of the sensor for material characterization. The results show that the higher frequency remains unaffected by distance changes between the sensor and receiver, whereas the lower frequency exhibits robust responses to various materials.
This article presents a microwave sensor for liquid permittivity measurement, using substrate integrated waveguide (SIW) resonators. The proposed design consists of two SIW cavities linked via an iris window, with two microstrip ports connected to the upper SIW cavity through a grounded coplanar waveguide (GCPW) transition. To enable sensitivity to permittivity variation, seven rectangular holes are etched into the iris between the cavities. The sensor exhibits a dual-band response: the first band is sensitive to changes in hole permittivity, making it suitable for liquid permittivity detection, while the second band remains fixed and serves as a reference to compensate for environmental variations. The self-calibration mechanism is achieved by comparing the two bands, which ensures that any environmental changes are compensated. The sensor was designed for the ultrahigh-frequency (UHF) industrial, scientific, and medical (ISM) band and validated using ethanol-water mixtures as test liquids. The measured results show that the first resonant frequency shifts from 903.3 to 910.5 MHz as the ethanol volume fraction increases from 0% to 100%. The proposed sensor is highly promising for direct radio frequency (RF) sensing applications because of its environmental interference resistance, ease of integration with other planar circuits, simple design, low-cost fabrication, and enclosed structure, making it ideal for direct liquid contact applications.
The increasing demand for real-time health monitoring has driven significant advancements in wireless implantable medical devices, particularly for organ-specific applications such as kidney diagnostics. These systems use implantable antennas to establish biotelemetry communication between the internal device and external monitoring units. However, designing antennas suitable for implantation has several challenges, especially in complex anatomical regions like the abdomen. High signal attenuation, size limitations, restricted gain, and adherence to safety regulations are among the constraints. This work mainly presents the design and characterization of a compact, low-profile, high-gain implantable antenna optimized for kidney applications operating in the 2.4-2.5GHz ISM band. Initially, the antenna was designed with a coaxial feed placed at its center. Four L-shaped slots are etched to obtain the resonant frequency. Two shorting pins are employed to improve the impedance matching. Four circular slots are used on the ground to further enhance the gain of the antenna. The antenna is simulated in a human tissue phantom model representing realistic abdominal conditions. The measured fractional impedance bandwidth of 31.42%, simulated gain of -24 dBi, and acceptable SAR have been obtained. The antenna has a compact, low profile and is suitable for wireless biotelemetry in arteriovenous grafts.
The concept of the corrugated via-wall substrate-integrated waveguide (CV-WSIW) reported by the same authors earlier has now been extended to the mm-wave frequency range, and the transitions for this category of SIWs from microstrip line (ML) are presented in this work. A new design of enhanced CV-WSIW for 18-40 GHz frequency range is proposed. The design includes a tapered section of the microstrip line and two rows of metallic vias with the gap between them. They are providing a better impedance match and reduced overall loss. The proposed design offers improved performance in terms of broadband, return loss (RL), insertion loss (IL), and total loss (TL). The laboratory prototypes are developed, and the obtained simulation results show a close agreement with the measured results. The experimental results show the minimum RL of 22dB, IL of 0.22-0.42dB, a fractional bandwidth of 75.80%, a figure-of-merit of 967.9, and the TL below 20% for ML/CV-WSIW transition within 18-40GHz range. Three additional ML/CV-WSIW transitions were also designed and tested, so that four tested transitions cover 8-60GHz range; an additional fifth transition was simulated only in 60-140GHz range.
Non-uniform sampling techniques enhance the efficiency of data acquisition systems by operating at a sub-Nyquist sampling rate while maintaining a comparable output quality. These techniques aid in building data acquisition systems that are aware of the signal characteristics so that the limited power budget can be consumed only on certain valuable sampling points at certain signal events, rather than a fixed set of points uniformly sampled at the Nyquist rate. This paper provides a tutorial review of various proposed non-uniform sampling schemes detailing their underlying mechanisms, potential analog circuitry implementations, and the impact of non-idealities on their performance. The paper presents a comprehensive performance comparison between these methods focusing on key metrics such as power consumption, accuracy, and design complexity. A thorough comparison is achieved through analysis of reported performance in the literature and the conducting of simulations. This review aims to guide readers on choosing the appropriate non-uniform sampling scheme that best fits the application requirements, and on their analog implementations and limitations.
This brief presents a novel ultra-low-power (ULP) time-domain level-crossing (TD-LC) analog-to-digital converter (ADC) with an adaptive sampling rate. By integrating a non-uniform LC sampling technique, the proposed TD-LC ADC further reduces power consumption compared to conventional TD ADCs. A voltage-to-time converter (VTC) is employed to convert the input voltage signal into a time signal, which is then subtracted from a time signal generated by a digital-to-time converter (DTC), converting the digital output from the previous digital output. The time residue determines the necessary adjustment for the digital output. Consequently, the proposed TD-LC ADC achieves 6-bit resolution using only a 3-bit time-to-digital converter (TDC). Fabricated in TSMC's 0.13- mu m CMOS process, the proposed TD-LC ADC achieves SNDR of 35.4 dB and SFDR of 45.25 dB at 518.31 KHz of BW, and SNDR of 33.59 dB and SFDR of 39.66 dB at 2.07 MHz of BW. The minimum power consumption is 206 nW with a supply voltage of 0.5 V.
In this paper, we present the design, simulation, fabrication, and characterization of a high-performance all-optical filter. It consists of three cascaded microring resonators and four integrated grating couplers, developed for precise wavelength selection within the telecom band (1500-1600 nm). The device was fabricated on a silicon-on-insulator platform using high-resolution electron beam lithography and encapsulated with a silica cladding layer to enhance mechanical robustness and increase the effective refractive index, resulting in superior optical performance. A fundamental aspect of the proposed design is systematic geometrical tailoring of critical parameters, including ring radius, waveguide width, coupling gap, coupling length, and the number of cascaded resonators, to allow precise control over the filter's spectral characteristics. The fabricated filter achieves an ultra-narrow passband of 1.99 nm, a resonance power transfer efficiency exceeding 56%, and a Q-factor up to 804. The free spectral range (FSR) is shown to be design-dependent, varying between 27 nm and 37 nm as a function of ring radius, thus enabling flexible specification during the design phase. Experimental characterization using tunable lasers showed strong agreement with finite-difference time-domain simulations, validating the filter design. Extensive parametric studies were conducted to evaluate the influence of structural variations on key performance metrics, including resonance wavelength, Q-factor, transmission efficiency, and FSR. The proposed filter demonstrates outstanding spectral resolution, low insertion loss, and excellent efficiency, establishing it as a promising solution for advanced optical communications, high-precision photonic signal processing, and emerging nanophotonic systems.
This article proposes a high-efficiency radio frequency energy harvester (RFEH) design that implements gate and body biasing techniques to decrease the threshold voltage of the transistors in their conduction phases and increase it in their reverse-biasing phases. The proposed scheme simultaneously reduces conduction and leakage losses to achieve higher power conversion efficiency (PCE) for the RFEH. The biasing voltages at the gate and body terminals are generated by amplifying the input signal using passive components, which avoids additional power consumption. To verify the efficacy of the proposed technique, the RFEH system is designed and fabricated using TSMC's 130 nm standard complementary metal-oxide-semiconductor (CMOS) process for two input power levels: -20 and -10 dBm. The design process of the proposed topology is provided to find the optimum values of passive components of the biasing circuits and the matching network. The measured PCE of the proposed gate-body-biased RFEH systems is 42.9% and 57.9% at input power levels of -20 and -10 dBm, respectively.
This work proposes a broadband transition from tapered microstrip line-to-substrate-integrated waveguide (SIW) using parallel half-mode SIW (HMSIW) for C/X-band applications. The proposed transition comprises four sections: a microstrip feed, tapered microstrip line, tapered parallel HMSIWs, and a waveguide section (SIW). Placing the parallel HMSIWs section between the tapered microstrip line section and the SIW part improves the S-parameters characteristics of the near-cut-off frequency. The HMSIWs section has a lower cut-off frequency than the SIW part, about 4.6 GHz. The lower cut-off- frequency is obtained by gradually altering the electromagnetic field mode to reduce reflection. Which helps convert from TEM mode to TM conversion. The proposed transition is designed, simulated, fabricated, and experimentally verified in order to compare between simulated and experimental results. For the back-to-back laboratory prototype of the transition, the experimental return loss results are less than 20 dB in the 4.6 to 11 GHz frequency range. At the same time, the measured minimum insertion loss is lower than 0.37 dB (maximum: 1.51 dB).
This article presents and demonstrates a voltage feedback-based technique to implement a power management integrated circuit (PMIC) for piezoelectric energy harvesting. It is analytically shown that the conducting time interval of a rectifying diode at the maximum power point is a fixed ratio of the vibration period. Thus, it can be used as a feedback to track the maximum power without measuring the output current/power. The technique can be tailored to various interface circuits, including full-bridge (FB), voltage doubler, and synchronized switch harvesting on an inductor. The micro-fabricated PMIC includes a FB rectifier, a digital maximum power point tracking (MPPT) controller, and a zero-current-switching (ZCS) integrated buck converter that uses two off-chip inductor and rectifying capacitor. The proposed technique enables the implementation of robust and power-efficient PMICs for MPPT of piezoelectric energy harvesters. To evaluate the performance of the technique, a PMIC using 130-nm CMOS technology is implemented and tested with a low power ( < 0.5 mW) piezoelectric energy harvester. The results show that the PMIC effectively tracks the maximum power point at different vibration frequencies and amplitudes while the power consumption of its control circuitry is less than 0.001 mW.
This article details the principle of operation, design process, and characterization of $W$ -band silicon micromachined evanescent-mode (EVA) waveguide switches. This work includes a detailed analysis of the ON-state response of EVA waveguide switches as well as the design of transitions to standard waveguide connector feeds. The first ever switching speed and power handling characterization of silicon micromachined EVA waveguide switches is also presented. Photogenerated plasma in silicon posts placed inside an EVA channel results in large impedance mismatch, allowing very high isolation to be achieved in the switch’s OFF-state with low optical power. In the ON-state, the unexcited silicon posts behave as shunt capacitors, allowing signal propagation through the switch in the form of a coupled resonator bandpass filter response. The design of both two-pole and three-pole filter responses in single pole single throw (SPST) and single pole double throw (SPDT) switch configurations is detailed in this article. The fabricated two-pole SPST switch achieves a 30-dB isolation with just 178 mW of optical excitation. For the three-pole SPST switch, only 111 mW is required. The extracted insertion loss (IL) of the two-pole and three-pole switching elements in SPDT configurations is just 0.16 and 0.32 dB, respectively. Furthermore, experiments presented in this article show that < 4- $\mu \text{s}$ switching speeds are realized by this technology, and that the switching elements are able to handle at least +32 dBm of continuous power at 85 GHz.
This article introduces a novel ultra-low-power reference-based low-noise amplifier (LNA) designed to reduce performance variations due to process, voltage, and temperature (PVT) when operating in the subthreshold region. The LNA is embedded within a reference circuit that directly controls the performance of the LNA over PVT variations. By combining the LNA with a reference, the PVT variations of the LNA are suppressed through the closed-loop feedback mechanism of the reference circuit while reducing the power overhead needed for separate reference and biasing circuits. This reduces the complexity of compensating for PVT variations compared with methods proposed by other works. Fabricated in TSMC's 130-nm CMOS process, the experimental results show the proposed LNA is the least sensitive LNA to PVT variations while having the largest operating range with S-21 and noise figure (NF) having a voltage and temperature coefficient of 2157 ppm/(VC)-C-degrees over PVT variations and 1991 ppm/(VC)-C-degrees over voltage and temperature variations, respectively. The proposed LNA achieves a gain of 13.96 dB with 4.51-dB NF while consuming 300 $\mu$ W with the bias circuit at nominal operating conditions.
This article presents a clockless nonuniform sampling scheme to enhance the energy efficiency of Internet of Things (IoT) applications. The proposed scheme employs a derivative-dependent mechanism that provides enhanced accuracy compared to other nonuniform sampling schemes while minimizing power consumption. By continuously monitoring the change in the derivative of the input signal, the proposed scheme identifies the most significant points of the signal, valuable for retention and conversion for effective signal reconstruction. In this scheme, the change in the derivative of the signal is compared to tunable threshold references, enabling adjustability to obtain the desired level of accuracy and adaptability to a variety of IoT applications. The proposed scheme is implemented in low- and high-speed systems that target low- and high-frequency applications, respectively. Fabricated using TSMC's 0.13- mu m CMOS technology, the performance is evaluated through experimental results in real-world scenarios. The proposed clockless derivative dependent sampling (CL-DDS) system can be integrated into the data acquisition system of an IoT device/sensor to save its critical power budget, while the threshold references are tuned to achieve the desired accuracy. The maximum power consumption of the proposed low- and high-speed CL-DDS designs is 1.15 mu W (@1 MHz) and 8.81 mu W (@20 MHz), respectively.
This article presents a novel broadband transition from coaxial line to substrate-integrated waveguide (SIW). The SIW wall includes three rows of metallic vias, where the vias of smaller diameter are squeezed between vias of larger diameter. This modification results in a corrugated via-wall SIW (CVWSIW) providing lower loss. Three versions of stubs (rectangular, semicircular, and triangular) are designed around the coaxial line launch on the top metal plane of the SIW. All transition versions are fabricated and tested, and the measurement results are in a good agreement with simulations. The measured more than 14-dB return loss (RL) and fractional bandwidth (FBW) of 75%, 79.4%, and 44.6% (10-dB FBW: 97.14%, 90.5%, and 78.26%) in these versions for the 9-26-GHz frequency range were obtained, respectively. The insertion loss (IL) is less than 0.63, 0.91, and 0.68 dB; the total loss is below 20%, 30%, and 25% for these versions for the same frequency band, respectively.
In this article, a cell-level differential power processing integrated circuit (IC) is presented to perform maximum power point tracking on photovoltaic cells under mismatch conditions, such as partial shading. To reduce the form-factor of the design, a bidirectional Cuk-based converter is implemented by integrating magnetics on the packaging bond wires. Using variable frequency TCM, a novel closed-loop soft switching controller is proposed to guarantee zero voltage switching (ZVS) for a wide operating range, regardless of process and component variations. To evaluate the stability and performance of the proposed nonlinear soft switching controller, a detailed analysis is provided using the phase plane portrait. In addition, a modified low-drop bootstrap circuit is presented to provide the floating voltage supply for the high-side switches in low-voltage applications. The proposed differential power processing IC is implemented in a 130 nm complementary metal-oxide semiconductor (CMOS) with an area of 3 by 3mm(2). Simulation and experimental results are provided to validate the performance of the circuit, and a system efficiency above 93% is achieved for mismatch currents up to 3 A.
In this paper, a circularly polarized (CP) substrate-integrated waveguide (SIW)-based H-plane horn antenna with broader impedance bandwidth and higher peak realized gain (PRG) for armature satellite services (X-band, 8-12 GHz) and broadcast satellite (Ku-band, 12-18 GHz) applications is presented. A tapered microstrip transition is used in the feeding section to obtain the broadband characteristics. In addition, the feeding component of the antenna utilizes three quarter-wave transformers to enhance impedance matching and widen the bandwidth. To generate the CP, two rows of rectangular slots are etched from both the top and bottom metal surfaces of the design. The antenna is designed, fabricated, and tested. The measured fractional impedance bandwidth of 41.6%, the 3-dB axial ratio bandwidth of 3.8 GHz, the maximum PRG of 6.95 dBic, the maximum radiation efficiency (simulated) of 87%, and the cross-polarization level below -40 dB have been achieved at the center frequency of 13.2 GHz.
In this paper, a substrate-integrated waveguide (SIW)-based H-plane horn antenna with a broader impedance bandwidth and high peak realized gain (PRG) for broadcast satellite (Ku/K band, 12.5-26.5 GHz) and fixed satellite (K band, 18-26.5 GHz) services applications is presented. A tapered microstrip transition is used in the feeding section to obtain the broadband characteristics. In addition, the multistrip transition also helped to enhance the fractional impedance bandwidth (FIBW), radiation characteristics and to improve the PRG. This mechanism of bandwidth increase can be explained by applying the coupled resonators theory. The antenna is designed, fabricated, and tested. The measured FIBW of 16.3%, the PRG of 10.56 dBi at the end-fire direction, the maximum radiation efficiency of 88.56%, and the cross-polarization level below - 35 dB have been achieved at the center frequency of 19 GHz.
This paper proposes a non-iterative method for the design of Radio Frequency Energy Harvesters (RFEHs) with maximum power conversion efficiency (PCE) at any given input power level. Because of the non-linear interdependency of the rectifier’s input impedance and its input voltage to matching network’s and rectifier’s parameters, the design of an RFEH with maximum efficiency requires numerous lengthy transient simulations of the entire energy harvester. Splitting the design space into two separate spaces which only interact with each other through the input voltage of the rectifier, the design goal can now be redefined to finding an optimum input voltage amplitude that maximizes the efficiency of the rectifier while enabling maximum power transfer from antenna to the input of the rectifier at the same time. Using the proposed method, the number of the required simulations to find optimum design values is significantly reduced compared to all previous methods reported in the literature, which also has been experimentally verified by designing three battery-loaded RFEHs at different input power levels in TSMC’s 130nm CMOS process. To further accelerate the design process, closed-form equations to calculate the efficiency and the input resistance of the rectifier are derived for the battery-loaded Dickson charge pump rectifiers.