Fan-out wafer level packages (FOWLP) have been widely used in IC packaging industries but the associated asymmetric warpage in the process may affect the process integrity and final product yields. Such a concern should be reduced through proper design based on adequate analysis and efficient and process simulation. The full-scale FEM simulations, although accurate, are inadequate for early-stage design analysis due to high computational cost. In this work, essential semi-analytical models for bifurcation prediction and efficient process emulators are developed to fully address the needs by modeling a comprehensive reconstituted wafer as a bi-layer-equivalent anisotropic structure for estimating key performances index such as bifurcation temperatures and processing warpages. Various material equivalence models are compared, and their effectiveness and accuracy have been evaluated and the virtual tensile testing approach is finally adapted. In comparison with the corresponding fully 3D FEM, the simplified model shows that a slight sacrifice on the achieved accuracy could reduce computational cost significantly based on the same hardware and this implies that a more thoughtful software DOE could be conducted for design optimization in the future. Subsequently, the standard chip-first and chip-last process emulators are then developed for predicting the wafer warping behavior throughout the entire processing and to perform parametric study to elucidate the applications of this work in packaging design analysis.

This research tackles asymmetric warpage in wafer-level packaging and aims to develop an efficient prediction model to mitigate backend process issues and yield reduction caused by this problem. The study introduces a novel "AI training AI’ approach, using step-by-step dimensional increases in training to reduce data collection needs and improve efficiency. The research employs equivalent bi-layer finite element method simulations for data collection and develops an artificial neural network to predict bifurcation temperature. Through systematic research, this study is able to increase the model accuracy. Additionally, the study creates a data-efficient warpage prediction model that reduced 67% data needed in consideration of two parameters changed and integrates these models into a user-friendly graphical user interface. This comprehensive solution improves prediction for industrial on asymmetric warpage packaging concerns.

With the advances in cyber physical integration, digital twin technology has been proving to be an essential component in modern digital manufacturing. Most smart factories are essentially constituted by workshops containing machine tools, robot manipulators, and logistic transporters such as automatic guided vehicles, thus a versatile digital twin module aiming for describing their interaction would be essential as the first step toward full factory digitalization and for further optimizing the module performance. In this work, a highly integrated web-based DT framework for a simplified factory unit containing the above-mentioned machines was constructed for feasibility demonstration and future applications. By integrating third-party software and domain knowledge through standardized APIs and data exchange protocols, the module enables smooth interaction across different systems. Its virtual model communicates with the physical counterpart for real-time status monitoring and task planning, and an integrated web platform was then developed incorporating functions such as mechanical simulation and dynamic scheduling to showcase cross-domain integrations. Finally, the system was evaluated in a factory scenario for task scheduling and preventive dispatching. Results indicate that the proposed system offers strong integration, scalability, and flexibility, effectively supporting production and logistics management. The results thus provide a practical reference and foundational framework for future DT applications in smart factories and related industries.

Fan-Out Panel-Level Packaging faces critical warpage issues due to CTE mismatch. While traditional finite element analysis is computationally expensive for complex FOPLP structures, this work proposes an efficient methodology integrating a four-layer equivalent model with an Artificial Neural Network. By simplifying the heterogeneous structure, the number of input variables and required training data are significantly reduced. Data was generated using finite element simulation through automated Python scripts. Results show that the ANN effectively validates finite element simulations, maintaining error percentages below 5%. This approach substantially minimizes computational resources and data acquisition costs while ensuring high prediction accuracy, offering a robust solution for rapid FOPLP design optimization.

With the advancing in Industry 4.0 and the increasing needs of factory automation, the indoor position information of factory modules and products become highly demanded for enterprise resource planning, machine scheduling, and task planning. Among all localization techniques, Ultra-wideband (UWB) provides a potential technology that satisfies the needs for localizing autonomous ground or aerial robots for logistics. It offers advantages of high data transfer rate, high-level accuracy, and high penetration for anti-disturbance relative to other approaches. Based on the concept of capturing the time of flight (TOF) and trilateration with regression, the position of the tag can be estimated. However, the signal transmission could be affected by environmental setup to cause signal reflection and absorption, and the real achievable performance should be evaluated before integrating into specific applications. In this paper, both experimental and analytical approaches are performed for addressing the achieved performance such as localization resolution for UWB localization. Both 1-D and 2-D experiments are performed and demonstrated for evaluating the localization accuracy in various environments for mimicking the real scenarios in factory for evaluating the localization performance of moving vehicles under noisy environment and different moving conditions. Based on the investigation, the localization accuracy could be within 0.5m with a range of 100-meter space and should be feasible for factory logistics. Other AI-based assisting techniques such as KNN are currently investigated to further improve the localization algorithm for related IIOT applications in logistics.

This paper presents a novel viscoelastic process emulator for Fan-out Wafer Level Packaging (FOWLP) that enhances the accuracy of warpage and residual stress predictions. The emulator incorporates the viscoelastic behavior of epoxy mold compounds (EMC) using a hybrid Time-Temperature Superposition (TTS) approach. A step-by-step finite element model that integrates EMC material properties obtained from a three-point bending test and fitted with the Prony series. The proposed TTS hybrid method balances simulation efficiency and accuracy by reducing computation time by 10% while maintaining a minimal warpage error of 0.5% compared to full viscoelastic analysis. Simulation results highlight the importance of accounting for viscoelastic effects, as static models overestimate warpage by 31%. Though the hybrid approach requires further refinement, its preliminary application demonstrates significant potential for efficient and accurate multi-process warpage prediction in FOWLP.

Fan-out wafer level packages (FOWLP) are widely used in IC packaging industries. However, the asymmetric warpage in the process may affect the final yield and reliability of products. Since this process involves numerous temperature ramping up/holding/ and ramping down cycles and all process steps virtually influence the final wafer warpage, thus it is necessary to perform process emulation for examining the effects of individual factors. In this work, an efficient process emulator is designed to fully address the above needs by modeling a comprehensive reconstituted wafer as a bi-layer-equivalent anisotropic structure. Predictions on both bifurcation temperature and wafer warpage after key processing stages agree with that from highly meshed 3D finite element simulation well. Subsequently, the standard chip-first and chip-last process emulators are then developed for predicting the wafer warping behavior throughout the entire processing. In comparison with highly meshed 3D FE models, the prediction errors are within +/- 5% and the computational cost could be reduced from approximately 10 days (100%) to 3 hours (2%) based on the same hardware. The saving of computational cost implies that a more thoughtful software DOE could be conducted for optimization. In the future, the model would be further improved to reduce the deviation but maintains the computational efficiency for achieving an effective emulator.

Cascaded positioning stages offer a systematic design approach for achieving larger dynamic range and more degrees of freedom (DOFs). Designs such as 1-DOF coarse-fine stages and 2-DOF cascaded stages can be alized effectively. However, due to the coupling resulting from inertial forces caused by the interaction tween sub-stages, the dynamic performances are ally limited, and it is desired to study the interaction tween sub-stages and develop controllers to reduce coupling. Here, a single-axis heterogeneous cascaded stage is designed and realized to serve as the platform for addressing the concerns. This novel stage integrates a rubber bearing positioning stage as the upper, a compliant metallic positioning stage as the bottom components. Through modeling and dynamic testing, the stage dynamics are established, and controller signs based on loop transmission shaping method implemented. The motion due to inertial coupling then studied, and the motion can be effectively pressed after optimizing the controller design by sidering the coupling dynamics and positioning-axis ror. In summary, the loop transmission shaping trol scheme is successfully developed for controlling motion and reducing the coupling of this cascaded sitioning stage. In the future, the stage can be used test platform for developing other control schemes further enhancing the performance of precision motion stage.

Silicon carbide coated graphite is the main structural materials semiconductor processing equipment under both high temperature and corrosive environment. However, their deformation and integrity during processing would impose severe structural design concerns. For achieving reliable design, both elastic and fracture properties of the materials should be provided. This work presents the effort and results on the room temperature elastic moduli characterization of both SiC and graphite, and hardness, residual stress, and toughness of SiC using various approaches. The obtained properties would then be served as the basic of thermo-structural design of a novel MOCVD coater, where the thermal warpage and delamination should be avoided for coating performance and machine longevity consideration. In addition, the concomitant method for SiC elastic modulus characterization also provides a more reliable approach to evaluate material properties to enhance the confidence level. Thus the results and method presented should be useful for optimizing both structural and processing parameters on machine design and for setting a rational flow for material properties characterization in related applications.

Stress and warping analyses are frequently required in modern semiconductor and packaging processing. Accurately predicting the structural stress and warping topology is crucial for improving processing reliability. Simple analytic models and their revised forms are typically used for quick estimation. However, these revised analytical forms often rely on considering just a single modification factor, which may not align with practical semiconductor and electronic packaging scenarios and lack appropriate analytical solutions. Consequently, extensive and costly 3D finite element simulations are commonly conducted. In theory, machine learning could offer an effective gray-box estimation solution for such problems. Nevertheless, the performance and impact on parameter settings must be justified and evaluated. To address these concerns, we use typical substrate/film stress/warpage problems as examples to demonstrate the effectiveness of data-driven mechanics prediction. This approach integrates the Stoney equation as the kernel and utilizes an artificial neural network to predict the correction factor based on practical considerations. We apply this approach to three cases of substrate-film structures, including multi-layered film, thicker film, and viscoelastic film, to assess its feasibility and performance. Furthermore, we concurrently address all three practical concerns using the same artificial intelligence scheme. Our findings indicate that the machine-learning prediction can achieve a successful rate of up to 99% for accuracy better than 95%. With the feasibility demonstrated, we propose a scheme that combines this data-driven approach with Green’s function to address the warpage of substrates with discrete film segments. Additionally, we have developed a topology reconstruction method by extending the proposed machine-learning approach for general 3D warpage prediction in related packaging engineering applications.

Multilayer ceramic capacitors (MLCCs) are essential passive elements for circuit boards and could be treated as metal/ceramic laminated structures. Due to thermo-mechanical mismatch and the high temperature experienced during fabrication, considerable stress could be induced. Consequently, structural failures such as delamination between layers or crack propagation in ceramics are frequently reported due to the brittle nature of materials. In this work, essential structural integrity assessment flow for characterizing fracture properties of MLCC are developed and the corresponding fracture properties characterization are conducted after different processing conditions in prior to serve for device longevity design based on indentation techniques. Elastic modulus and hardness, and consequently, the dependence of both fracture toughness and residual stress w.r.t. sintering temperatures are obtained. The results should be useful for optimizing processing parameters such as sintering temperatures and durations for both performance improvement and carbon emission reduction.

In mass production, good and stable quality control and inspections are crucial. However, up to recent, LCD inspection process still highly relies on manually visual inspection from experienced works and could possibly be biased due to subjective judgement. Recently, automated optical inspection (AOI) has been adopted to LCD inspection for years, but defect classification and overall quality assessment still relies on human inspectors, which is inevitably biased by the physical and psychological conditions and a more objective manner and a rational flow should be developed based on computerized inspections. In particular, LCD inspections should accomplish both local defect classification and global mura defect quantification simultaneously and this represents a bottleneck for preventing LCD inspection automation. Thus, this work focuses on proposing a rational flow for addressing the above needs from classification and to quantify the possible LCD defects by using convolutional neural network and image processing to realize an objective defect classification based on both CNN and image thresholding. In addition, a novel quality evaluation index has also been proposed by adding the information of defected area, defected gradient, and average brightness of defected zone, to improve the existed SEMI index based on ergodic experiments. In summary, the flow presented in this work has achieved better and objective evaluations than that performed by human inspection. In the future, based on the flow outlined, it is expected that a more substantial defect classification and evaluation model suitable could be realized. This would benefit to LCD industries.

In modern smart manufacturing, machine condition monitoring is essential. To achieve the goal, the associate status monitoring system needs to have several features such as data acquisition from sensors, edge computing for generating effective index, and user interface to display information and communicate with the host. To accomplish these abilities, this work hires a M487 micro controller (MCU) and a R-Pi single-board computer (SBC) to develop the associate status monitoring system for both computational versality and cost-saving considerations. The microcontroller is responsible for data acquisition and edge computing, while the single-board computer would handle the data transmission and user interface issues. The entire system is modulized for ease of carry and modification in any factory equipment. The module could extract key sensor indexes in both time and frequency domains per 30 seconds for signals from 12 channels and has been operated for approximately one month continuously in a local LCD panel manufacturing company for diagnosing possible abnormal conditions. In comparison to other modules, the designed module is far more flexible and powerful for practical industrial needs and should be very useful for cyber-physical system realizations.