Recent trends in processor power for the next generation devices point clearly to significant increase in processor heat dissipation over the coming years. In the desktop system design space, the tendency has been to minimize system enclosure size while maximizing performance, which in turn leads to high power densities in future generation systems. The current thermal solutions used today consist of advanced heat sink designs and heat pipe designs with forced air cooling to cool high power processors. However, these techniques are already reaching their limits to handle high heat flux, and there is a strong need for development of more efficient cooling systems which are scalable to handle the high heat flux generated by the future products. To meet this challenge, there has been research in academia and in industry to explore alternative methods for extracting heat from high-density power sources in electronic systems. This talk will discuss the issues surrounding device cooling, from the transistor level to the system level, and describe system-level solutions being developed for desktop computer applications developed in our group at Stanford University.

Understanding the boiling process and two-phase flow behavior in microchannels is the key to developing microchannel heat sinks for high-power microprocessors. We conducted experiments in micromachined silicon channels with a range of 27–171μm hydraulic diameters and varying surface roughnesses. Bubble nucleation, flow patterns, wall temperature, as well as transient pressure fluctuations were recorded and analyzed. We observed both typical nucleate boiling and eruption boiling with large amounts of wall superheat in these channels, and recorded up to 138kPa transient pressure fluctuations due to bubble nucleation. We found the boiling mechanism is strongly dependent on the wall surface roughness, and we explained the boiling mechanism in sub-150μm diameter channels with Hsu’s model.

While the modeling and optimization of single-phase liquid microchannel heat sinks have been extensively studied [2.11–2.14, 4.1–4.3], the more complicated physics of boiling flow in microchannels is relatively poorly understood. Unlike in the single-phase forced convective flow, the two-phase convective coefficient is no longer a constant for fully developed conditions, but closely coupled with local flow conditions. Depending on how the vapor and liquid mixture moves in the channel, two basic flow models have been used for pressure drop simulations. The homogeneous model assumes that the liquid and vapor move at the same velocity at every position along the flow direction. The other approach, the annular model, assumes that a thin, slow-moving liquid film surrounds a rapidly moving vapor core. For saturated boiling heat transfer in macroscale horizontal tubes, the most widely accepted heat transfer correlation is Kandlikar’s correlation, which has relatively good agreement with data for a broad spectrum of fluids over a wide range of conditions [4.4]. Other correlations include the Shah correlation, the Chen correlation, the Schrock and Grossman correlation, the Gungor and Winterton correlation, and the Bjorge, Hall and Rohsenow correlation, each of which is based upon certain two-phase heat transfer data [4.4]. Since all flow models and heat transfer correlations are determined by the flow conditions, it is important to understand the microchannel flow behavior as well as to obtain reliable heat transfer data as a reference to select the appropriate model.

Forced convective internal flow is extensively used in heat exchangers in space heating, power production, and chemical processing. The heat transfer theories for both single- and two-phase internal flows have been well established. However, when the dimension scales down to tens of micrometers in microchannels, due to possible change in dominant forces, the flow behavior can be very different. Questions such as whether or not traditional theories break down need to be answered.

This paper studies the nucleate boiling conditions and mechanisms in plasma etched silicon microchannels below 150 /spl mu/m hydraulic diameter. Boiling regimes and the wall superheat in microchannels with various DI water surface tensions and wall surface roughness are discussed. The experiments show that wall superheat in microchannels is primarily due to the lack of active nucleation sites rather than limited channel space or a high liquid surface tension. By creating small cavities in the channel walls, superheat can be eliminated from as small as 28 /spl mu/m hydraulic diameter silicon channels.

Two-phase microjet impingement cooling is a potential solution for removing heat from high-power VLSI chips. Arrays of microjets promise to achieve more uniform chip temperatures and very high heat transfer coefficients. This paper presents the design and fabrication of single-jets and multijet arrays with circular orifice diameters ranging from 40 to 76 mum, as well as integrated heater and temperature sensor test devices. The performance of the microjet heat sinks is studied using the integrated heater device as well as an industry standard 1 cm(2) thermal test chip. For single-phase, the silicon temperature distribution data are consistent with a model accounting for silicon conduction and fluid advection using convection coefficients in the range from 0.072 to 4.4 W/cm(2)K. For two-phase, the experimental results show a heat removal of up to 90 W on a 1 cm(2) heated area using a four-jet array with 76 mum diameter orifices at a flowrate of 8 ml/min with a temperature rise of 100 degreesC. The data indicate convection coefficients are not significantly different from coefficients for pool boiling, which motivates future work on optimizing flowrates and flow regimes. These microjet heat sinks are intended for eventual integration into a closed-loop electroosmotically pumped cooling system.

The increasing heat generation rates in VLSI circuits motivate research on compact cooling technologies with low thermal resistance. This paper develops a closed-loop two-phase microchannel cooling system using electroosmotic pumping for the working fluid. The design, fabrication, and open-loop performance of the heat exchanger and pump are summarized. The silicon heat exchanger, which attaches to the test chip (1 cm/sup 2/), achieves junction-fluid resistance near 0.1 K/W using 40 plasma-etched channels with hydraulic diameter of 100 /spl mu/m. The electroosmotic pump, made of an ultrafine porous glass frit with working volume of 1.4 cm/sup 3/, achieves maximum backpressure and flowrate of 160 kPa and 7 ml/min, respectively, using 1 mM buffered de-ionized water as working fluid. The closed-loop system removes 38 W with pump power of 2 W and junction-ambient thermal resistance near 2.5 K/W. Further research is expected to strongly reduce the thermal resistance for a given heating power by optimizing the saturation temperature, increasing the pump flowrate, eliminating the thermal grease, and optimizing the heat exchanger dimensions.

Two-phase microchannel heat sinks are promising for VLSI chip cooling, but little is known about their ability to minimize the impact of chip hotspots (regions of very high heat generation). The wall temperature distribution is governed in part by the coupling between the pressure drop and the saturation temperature, whose distributions will change in the vicinity and downstream of a region of high heat generation. This study theoretically examines the heat transfer and fluid flow characteristics of two-phase flow in microchannels with hydraulic diameters of 150/spl sim/450 micrometers for strongly varying wall heat flux conditions. The theory developed aims to help minimize the pressure drop in the two-phase region and to provide the foundation for optimizing channel dimensions to reduce temperature variations. The results suggest that a two-phase microchannel heat sink should be arranged so that downstream is located near the hotspot to minimize the pressure drop in two-phase flow region and maximum wall temperature. This work is particularly promising for a practical closed loop microchannel cooling system that competes directly with heat pipe technology and is based on an electroosmotic pump.

The trend towards higher speed and greater integration of modern ICs requires improved cooling technology. This paper describes the design and characterization of a two-phase microchannel heat sink in an electrokinetic VLSI chip cooling system. The heat sink achieves a thermal resistance of 1 K/W for a 1.2 cm x 1.2 cm silicon thermal test chip under an open-loop operation with a water flowrate of 5 ml/min. Preliminary tests show that a closed-loop EK-pumped system running at 1.2 ml/min and 12 psi removes 17.3 W, with heat rejection at an aluminum fin array. Further optimization of the microchannel dimensions and the operating pressure of the working fluid are expected to lower the resistance below 0.25 K/W.

Two-phase microchannel heat exchangers can achieve very large heat removal rate due to the phase change of the coolant. However, the design of two-phase microchannel heat exchangers has not yet considered the change of boiling regimes in microchannels under 150 µm, while the boiling regime has significant impact on convective heat transfer coefficient. This paper presents our study of boiling regimes in these microchannels as well as the transient pressure fluctuation caused by nucleation. These results will provide quantitative information to others designing small-diameter parallel channel heat exchangers.

Impingement cooling is an attractive method for individual IC cooling because of the uniformity and high values of the expected heat transfer coefficient. This paper presents spatially-averaged temperature measurements for DI water impingement from single micro jets with diameters smaller than 50 μm. The jets are circular orifices plasma etched into silicon. A heater chip is fabricated to simulate a high power IC while simultaneously measuring the temperature distribution around the impingement region. A hydrodynamic model is proposed for determining the pressure drop associated with jet formation. With a single 50 μm diameter DI water jet at 3.5 ml/min flow rate, up to 45 W/cm2 heat flux has been removed with 80 °C chip temperature rise. This research provides the first study of microscale liquid impingement cooling down to 14 μm diameter jets.

Two-phase forced convective flow in microchannels can be used as an effective means of cooling microelectronics. However, the number of studies on boiling in microchannels with dimensions smaller than 100 microns is limited. Particularly, the impact of small dimensions on bubble formation and the critical heat flux have received little attention. This work develops single and multi-channel silicon test devices with integrated heaters and thermometers, in an effort toward precisely determining the flow condition, the temperature distribution, and the heat transfer coefficients within microchannels. Rectangular channels with hydraulic diameter below 100 microns and varying aspect ratios were fabricated. The test devices have channel walls with widths below 350 microns, which minimizes solid conduction along the test section and reduces variations in the heat flux boundary condition. A semiconductor resistor strip measures the wall temperature distribution along the channel during phase change. A thermal resistance model has been developed to estimate the heat loss from the system. Down to hydraulic diameters as small as 25 microns, nucleation boiling under 5 °C of wall superheating was observed in plasma etched silicon microchannels.