VCOs fully integrated in an SiGe preproduction technology are presented. By cutting interconnection lines a wide frequency range can be covered, up to 88.4 GHz. Special effort has been made to meet the demands for 77 GHz automotive radar. In the corresponding tuning range from 75.3 to 79.6 GHz, an output power of about 11 dBm (with -2.2 dBm potential measurement uncertainty) was achieved for each of the two complementary outputs, i.e. in total 14 dBm. The phase noise is about -94 dBc/Hz at 1 MHz offset frequency.

Multipurpose VCOs with wide tuning range and oscillation frequencies up to 74 GHz (on wafer) and 69 GHz (mounted chip, with output buffer), respectively, have been fully integrated in a commercial SiGe production technology. To the best of the authors' knowledge these are record values for commercially available Si-based technologies, despite the moderate transistor f/sub T/ (62 GHz). The oscillation frequency can easily be dropped down to 41.5 GHz by cutting interconnection lines in the upper metallization layer. The phase noise obtained depends on the frequency range chosen and is sufficiently low for the intended applications.

Modern interconnect schemes will be using copper instead of aluminum as metallization material due to its better electrical conductivity and its superior electromigration resistance. Using a production worthy BICMOS process it could be revealed that especially for this kind of application a copper dual damascene metallization offers serious advantages versus an aluminum RIE/tungsten plug approach. Interconnect parameters which are very helpful for high-performance RF technologies like line and via resistances can be reduced showing equal leakage current properties. Current density can be increased and up to now no impact on Bipolar and only slight influence on CMOS devices, which needs to be investigated in more detail, is detected.

The properties of Ta and TaN barrier layers were evaluated on porous silicon oxide films with about 70% porosity and a k-value of 2.1. The porous oxide films were partly covered with a protecting PECVD SiO2 cap layer of varying thickness and partly used without this cap layer. The results were compared to those on conventional PECVD SiO2 films as reference. The Ta and TaN layers deposited onto the capped porous silicon oxide show comparable properties to the reference with respect to electrical resistivity, sheet resistance uniformity, and reflectivity. A sheet resistance increase was observed for barrier films deposited directly onto the porous oxide film. This behaviour was caused by an increased oxygen and carbon content in the TaN barrier film, especially at the interface to the porous material. The formation of Ta carbide and Ta oxide has been detected. A cap layer of 50 or 100 nm PECVD SiO2 is able to prevent these interactions. For TaN films no nitrogen penetration into the porous material was detected by AES analysis. Cu seed layers for Cu ECD and full Cu metallization (Cu seed and ECD Cu) deposited onto the Ta or TaN on capped and noncapped porous oxide revealed the same properties compared to reference films on conventional PECVD SiO2.

MIM dielectrics are deposited using plasma enhancement due to temperature limitations in the BEOL. This type of dielectrics has different characteristics compared to gate oxides or thermally deposited dielectrics, The different aspects of the dielectric reliability assessment strategy developped for gate oxides (cumulative distribution function, voltage, temperature, thickness and area scaling) and the underlying models are critically reviewed. Similiar to gate oxides, the charge to breakdown for nitride MIM dielectrics is only weakly dependent on voltage, temperature and thickness. Together with the observation, that the dominant current conduction mechanism is well described by Poole-Frenkel theory, this leads to the rootE model: t(BD)=tau(exp)(-GammarootE), where iota(BD) is the time to breakdown during constant voltage stress and E is the applied electric field. The reliability limits of thickness and voltage scaling will be discussed by comparing the experimental results with the above model. Nitride as MIM dielectric is more reliable than oxide when compared at the same specific capacitance.

Due to its excellent electrical, mechanical, thermal and chemical properties the Oxazole Dielectric OxD is highly suitable for low k interlayer dielectric applications. The compatibility of OxD with single and dual damascene copper technology is proven. Electrical measurements after the successful integration yielded the anticipated values.

For integration of thin nitride films as a diffusion barrier in Cu metallization, the standard PE-CVD nitride process must be modified to allow for a sufficiently low deposition rate. Diffusion experiments and reliability measurements demonstrate improved nitride properties. Application of the PE-CVD nitride processes on Cu surfaces, however, was impeded by the formation of silicide particles due to a reaction between SiH4 and Cu. It is shown that a reduced deposition temperature or a moderate oxidation of the Cu surface, e.g. by exposure to N2O, can help to avoid this detrimental effect.

Two types of copper seed layers deposited by MOCVD and long throw sputtering (LTS) onto a tantalum barrier layer were used for electroplating (EP) of copper in the forward pulsed mode. MOCVD and PVD copper seed layers were compared with respect to step coverage, electrical resistivity, texture and adhesion behaviour. The different properties induce different electroplating fill attributes, including grain size and adhesion behaviour. MOCVD Cu seed layers show high step coverage, but do not adhere to the Ta barrier after the Cu EP. LTS Cu reveal strong (111) texture and excellent adhesion before and after Cu EP. Therefore, a CMP process could only be performed on patterned wafers with PVD/EP copper to obtain electrical data. The fabricated Cu lines show a high yield with respect to opens and shorts and standard deviations of the line resistance across the wafer.

Copper (Cu) will be used to replace aluminum in the next generation metallization due to its low resistivity and high electromigration resistance. However, copper is a fast diffuser in silicon and silicon dioxide, and it is detrimental to the devices if it gets into the active region. We have investigated several approaches to contaminating with Cu the back surface of a fully processed BiCMOS wafer in order to study its effect on devices. In order to estimate the amount of Cu driven to the active region, a simulated drive-in diffusion experiment is used. Vapor Phase Decomposition--Atomic Absorption Spectrometry is used to measure Cu on the front surface of the wafer after annealing. In a fully processed BiCMOS wafer, the internal gettering: oxygen precipitation occurs at the initial high temperature process steps. This oxygen precipitation acts as trapping centers and an intrinsic barrier that prevents impurities that may be driven from the back surface of the wafer. The effectiveness of the internal gettering of a simulated BiCMOS processed wafer is measured in comparison to a monitor wafer which has no internal gettering. Electrical measurement shows an increase in the base current in a Gummel Plot measurement of the Bipolar device after Cu contamination. This effect is most visible for a wafer that has been annealed at 550 degree(s)C for 30 minutes.