Accurate noise characterization is essential for reliable quantum computation. Effective Pauli noise models have emerged as powerful tools, offering a detailed description of the error processes with a manageable number of parameters, which guarantees the scalability of the characterization procedure. However, a fundamental limitation in the learnability of Pauli eigenvalues impedes a full high-accuracy characterization of both general and effective Pauli noise models, thereby restricting, e.g., the performance of noise-aware error mitigation techniques. We introduce multilayer cycle benchmarking (MLCB), an enhanced characterization protocol that improves the learnability associated with effective Pauli noise models by jointly analyzing multiple layers of Clifford gates. We show a simple experimental implementation and demonstrate that, in realistic scenarios, MLCB can reduce unlearnable noise degrees of freedom by up to 75%, improving the accuracy of sparse Pauli-Lindblad noise models and boosting the performance of error mitigation techniques like probabilistic error cancellation. Our results highlight MLCB as a scalable, practical tool for precise noise characterization and improved quantum computation.
Enhancing the performance of noisy quantum processors requires improving our understanding of error mechanisms and the ways to overcome them. A judicious selection of qubit design parameters plays a pivotal role in improving the performance of quantum processors. In this study, we identify optimal ranges for qubit design parameters, grounded in comprehensive noise modeling. To this end, we also analyze the effect of a charge-parity switch caused by quasiparticles on a two-qubit gate. Due to the utilization of the second excited state of a transmon, where the charge dispersion is significantly larger, a charge-parity switch will affect the conditional phase of the two-qubit gate. We derive an analytical expression for the infidelity of a diabatic controlled-Z gate and see effects of similar magnitude in adiabatic controlled-phase gates in the tunable coupler architecture. Moreover, we show that the effect of a charge-parity switch can be the dominant quasiparticle-related error source of a two-qubit gate. We also demonstrate that charge-parity switches induce a residual longitudinal interaction between qubits in a tunable-coupler circuit. Furthermore, we introduce a performance metric for quantum circuit execution, encompassing the fidelity and number of single- and two-qubit gates in an algorithm, as well as the state preparation fidelity. This comprehensive metric, coupled with a detailed noise model, enables us to determine an optimal range for the qubit design parameters, as confirmed by numerical simulation. Our systematic analysis offers insights and serves as a guiding framework for the development of the next generation of transmon-based quantum processors.
Improving the speed and fidelity of quantum logic gates is essential to reach quantum advantage with future quantum computers. However, fast logic gates lead to increased leakage errors in superconducting quantum processors based on qubits with low anharmonicity, such as transmons. To reduce leakage errors, we propose and experimentally demonstrate two new analytical methods, Fourier ansatz spectrum tuning derivative removal by adiabatic gate (FAST DRAG) and higher-derivative (HD) DRAG, both of which enable shaping single-qubit control pulses in the frequency domain to achieve stronger suppression of leakage transitions compared to previously demonstrated pulse shapes. Using the new methods to suppress the ef transition of a transmon qubit with an anharmonicity of -212 MHz, we implement R-X(pi/2) gates achieving a leakage error below 3.0x10(-5) down to a gate duration of 6.25 ns without the need for iterative closed-loop optimization. The obtained leakage error represents a 20-fold reduction in leakage compared to a conventional cosine DRAG pulse. Employing the FAST DRAG method, we further achieve an error per gate of (1.56 +/- 0.07)x10(-4) at a 7.9-ns gate duration, outperforming conventional pulse shapes both in terms of error and gate speed. Furthermore, we study error-amplifying measurements for the characterization of temporal microwave control-pulse distortions, and demonstrate that non-Markovian coherent errors caused by such distortions may be a significant source of error for sub-10-ns single-qubit gates unless corrected using predistortion.
Quantum computing has tremendous potential to overcome some of the fundamental limitations present in classical information processing. Yet, today's technological limitations in the quality and scaling prevent exploiting its full potential. Quantum computing based on superconducting quantum processing units (QPUs) is among the most promising approaches towards practical quantum advantage. In this article the basic technological approach of IQM Quantum Computers is described covering both the QPU and the rest of the full-stack quantum computer. In particular, the focus is on a 20-qubit quantum computer featuring the Garnet QPU and its architecture, which we will scale up to 150 qubits. We also present QPU and system-level benchmarks, including a median 2-qubit gate fidelity of 99.5 Greenberger-Horne-Zeilinger (GHZ) state.
While the power of quantum computers is commonly acknowledged to rise exponentially, it is often overlooked that the complexity of quantum noise mechanisms generally grows much faster. In particular, quantifying whether the instructions on a quantum processor are close to being unitary has important consequences concerning error rates, e.g., for the confidence in their estimation, the ability to mitigate them efficiently, or their relation to fault-tolerance thresholds in error correction. However, the complexity of estimating the coherence, or unitarity, of noise generally scales exponentially in system size. Here, we obtain an upper bound on the average unitarity of Pauli noise and develop a protocol allowing us to estimate the average unitarity of operations in a digital quantum device efficiently and feasibly for mid-size quantum systems. We demonstrate our results through both experimental execution on IQM Spark (TM), a 5-qubit superconducting quantum computer, and in simulation with up to 10 qubits, discussing the prospects for extending our technique to arbitrary scales.
A crucial task to obtain optimal and reliable quantum devices is to quantify their overall performance. The average fidelity of quantum gates is a particular figure of merit that can be estimated efficiently by Randomized Benchmarking (RB). However, the concept of gate-fidelity itself relies on the crucial assumption that noise behaves in a predictable, time-local, or so-called Markovian manner, whose breakdown can naturally become the leading source of errors as quantum devices scale in size and depth. We analytically show that error suppression techniques such as Dynamical Decoupling (DD) and Randomized Compiling (RC) can operationally Markovianize RB: i) fast DD reduces non-Markovian RB to an exponential decay plus longer-time corrections, while on the other hand, ii) RC generally does not affect the average, but iii) it always suppresses the variance of such RB outputs. We demonstrate these effects numerically with a qubit noise model. Our results show that simple and efficient error suppression methods can simultaneously tame non-Markovian noise and allow for standard and reliable gate quality estimation, a fundamentally important task in the path toward fully functional quantum devices.
Tunable coupling of superconducting qubits has been widely studied due to its importance for isolated gate operations in scalable quantum processor architectures. Here, we demonstrate a tunable qubit-qubit coupler based on a floating transmon device which allows us to place qubits at least 2 mm apart from each other while maintaining over 50 MHz coupling between the coupler and the qubits. In the introduced tunable-coupler design, both the qubit-qubit and the qubit-coupler couplings are mediated by two waveguides instead of relying on direct capacitive couplings between the components, reducing the impact of the qubit-qubit distance on the couplings. This leaves space for each qubit to have an individual readout resonator and a Purcell filter needed for fast high-fidelity readout. In addition, the large qubit-qubit distance reduces unwanted non-nearest neighbor coupling and allows multiple control lines to cross over the structure with minimal crosstalk. Using the proposed flexible and scalable architecture, we demonstrate a controlled-$Z$ gate with $(99.81 \pm 0.02)\%$ fidelity.
Digital-Analog Quantum Computation (DAQC) has recently been proposed as an alternative to the standard paradigm of digital quantum computation. DAQC creates entanglement through a continuous or analog evolution of the whole device, rather than by applying two-qubit gates. This manuscript describes an in-depth analysis of DAQC by extending its implementation to arbitrary connectivities and by performing the first systematic study of its scaling properties. We specify the analysis for three examples of quantum algorithms, showing that except for a few specific cases, DAQC is in fact disadvantageous with respect to the digital case.
Large-scale quantum computation requires a fast assessment of the main sources of error in the implemented quantum gates. To this aim, we provide a learning based framework that allows to extract the contribution of each physical noise source to the infidelity of a series of gates with a small number of experimental measurements. To illustrate this method, we consider the case of superconducting transmon architectures, where we focus on the diabatic implementation of the CZ gate with tunable couplers. In this context, we account for all relevant noise sources, including non-Markovian noise, electronics imperfections and the effect of tunable couplers to the error of the computation.
The exact microscopic structure of the environments that produces $1/f$ noise in superconducting qubits remains largely unknown, hindering our ability to have robust simulations and harness the noise. In this paper we show how it is possible to infer information about such an environment based on a single measurement of the qubit coherence, circumventing any need for separate spectroscopy experiments. Similarly to other spectroscopic techniques, the qubit is used as a probe which interacts with its environment. The complexity of the relationship between the observed qubit dynamics and the impurities in the environment makes this problem ideal for machine learning methods - more specifically neural networks. With our algorithm we are able to reconstruct the parameters of the most prominent impurities in the environment, as well as differentiate between different environment models, paving the way towards a better understanding of $1/f$ noise in superconducting circuits.
Liquid crystals (LCs) form an extremely rich range of self-assembled topological structures with artificially or naturally created topological defects. Some of the main applications of LCs are various optical and photonic devices, where compared to their solid-state counterparts, soft photonic systems are fundamentally different in terms of unique properties such as self-assembly, self-healing, large tunability, sensitivity to external stimuli, and biocompatibility. Here we show that complex tunable microlasers emitting structured light can be generated from self-assembled topological LC superstructures containing topological defects inserted into a thin Fabry-Pérot microcavity. The topology and geometry of the LC superstructure determine the structuring of the emitted light by providing complex three-dimensionally varying optical axis and order parameter singularities, also affecting the topology of the light polarization. The microlaser can be switched between modes by an electric field, and its wavelength can be tuned with temperature. The proposed soft matter microlaser approach opens directions in soft matter photonics research, where structured light with specifically tailored intensity and polarization fields could be designed and implemented.