Wafer charging effects in an Applied Materials 9500 implanter were studied for high current As and BF2 implants with EEPROM-based sense and measurement devices (CHARM(R)-2) and transistor structures (SPIDER). The operational modes of the implanter were deliberately driven non-optimal states in order 60 test the sensitivity of the wafer-level monitors. Good correlation was found between data from the CHARM and SPIDER monitors as well as from machine-based indicators, such as the wheel current. A broad and stable operating window was seen for operation under normal conditions
The mechanism responsible for charging damage to integrated circuit device insulators is treated as a plasma phenomenon, in which the beam/plasma drives potential differences on the process surface. J−V data obtained with the CHARM2 diagnostic in a high current implanter (flood OFF) are fit with a plasma probe model. The fit indicates plasma buildup over the wafer surface. A cold plasma flood is suggested as a means of limiting potential differences during ion implantation.
Studies of the charging effects during implantation with 9200 and 9500 tools using EEPROM-based sensors, CHARM-2, are reported for 60 keV As beams.
A new, powerful, easy-to-use tool (CHARM-2) for characterizing wafer charging during wafer processing in ion-based and plasma-based IC processing equipment has been developed. The technique uses dedicated, pre-fabricated 6 inch wafers populated with sensors which monitor the driving forces behind charging damage: peak surface-substrate potentials; peak current densities impinging on a wafer; and total integrated UV dose. The CHARM-2 sensors measure these variables in terms of volts, amps/cm2, and photon flux. The measurement technique consists of pre-conditioning the CHARM-2 wafers on a tester, placing them in the process chamber, performing the given process, and testing the wafer again. Wafer maps of surface-substrate potentials, fluxes of ions, electrons, and UV photons, are generated in a matter of minutes, providing the user with a 'fingerprint' of the charging characteristics of the process/equipment. The CHARM-2 wafers are also re-usable, and thus more economical than test wafer techniques which use oxide breakdown or transistor stress characteristics. The ability to empirically characterize the J-V characteristics of charging sources using the CHARM-2 monitor wafers also opens the way for prediction of failure rates of oxides subjected to specific processes, if the oxide Qbd distributions are known.