In this review, we summarize recent progress achieved in on-surface bottom-up growth of graphene nanoribbons (GNRs) with well-defined edges. First, we show the simulation results suggesting that a GNR backward diode with GNR heterojunction can outperform the state-of-the-art diodes owing to their negligible junction capacitance. The major challenge required for achieving high-performance GNR diodes is low contact resistance and well-defined GNR heterojunction. The second part of this review is dedicated to our recent works on GNR heterojunctions by modifying electronic states by edge-functionalization. It was revealed that the important design policies for precursors are as follows : molecular design avoiding intramolecular steric hinderance upon polymerization, precursor design considering dehydrogenation path, and precursor design considering intramolecular side reaction. We also demonstrate our preliminary results of GNR-FET, which suggest that wider GNRs with narrower band gap is required for the electronic devices.

We propose and analyze a heterojunction backward diode for millimeter- or terahertz-wave detection using edge-modified graphene nanoribbons (GNRs). According to the electron-affinity difference between a hydrogen-terminated GNR and a fluorine-terminated GNR, it is possible to construct a staggered-type lateral heterojunction diode. First-principles calculations reveal that because of band-to-band tunneling, the diode has a nonlinear current of the order of kA/m. The small junction area contributes to the reduction of the intrinsic junction capacitance. Equivalent-circuit analyses show that when the total capacitance is reduced below 100 aF, the diode exhibits a voltage sensitivity of 3.79 × 103 V/W at 300 GHz.

The electronic properties of NH4-adsorbed N = 7 armchair graphene nanoribbons (AGNRs) were theoretically investigated using self-consistent atomistic simulations to explore the feasibility of AGNRs as a gas sensing material. Whereas a pristine AGNR has a finite band gap and is an intrinsic semiconductor, an NH4-adsorbed AGNR exhibits heavily doped n-type properties similar to a graphene sheet with the molecules adsorbed. The electric characteristics of a back-gated AGNR gas sensor were also simulated and the drain current changed exponentially with increasing number of adsorbed molecules. We may conclude that an AGNR is promising as a highly sensitive gas-sensing material with large outputs.

Graphene has been employed as gate electrodes of n-channel silicon transistors. When the graphene gate is exposed and gas molecules adsorb on the graphene surface, the work function of graphene changes depending on the gas species and concentrations, thus changing the threshold of the silicon transistor. This novel graphene-gate sensor exhibits sensitivities more than one order of magnitude higher than those of the conventional resistivity-based graphene gas sensors, easily detecting 7 ppb of NO2. The selectivity of several gases also exist. Furthermore, the work function of graphene-gate can be controlled by intentionally depositing proper doping materials on graphene, changing the threshold by up to 620 mV without degrading the subthreshold properties.

The short-channel effect (SCE) in a MOSFET with an atomically thin MoS2 channel was studied using a TCAD simulator. We derived the surface potential roll-up, drain-induced barrier lowering (DIBL), threshold voltage, and subthreshold swing (SS) as indexes of the SCE and analyzed their dependency on the channel thickness (number of atomic layers) and channel length. The minimum scalable channel length for a one-atomic-layer-thick MoS2 MOSFET was determined from the threshold voltage roll-off to be 7.6 nm. The one-layer-thick device showed a small DIBL of 87 mV/V at a 20 nm gate length. By using high-k gate insulator, an SS lower than 70 mV/dec is achievable in sub-10-nm-scale devices.

Graphene transistors were fabricated by a wafer-scale “top-down” process using a graphene sheet formed by the chemical vapor deposition (CVD) method. The devices have a dual-gated structure with an ion-irradiated channel, in which transistor polarity can be electrostatically controlled. We demonstrated, at room temperature, an on/off operation of current and electrostatic control of transistor polarity. By combining two dual-gated transistors, a six-terminal device was fabricated with three top gates and two ion-irradiated channels. In this device, we demonstrated an inverter operation.

The performance limits of monolayer transition metal dichalcogenide (TMDC) field-effect transistors (FETs) with isotropic biaxial strain were examined with the “top-of-the-barrier” ballistic MOSFET model. Using a first-principle theory, we calculated the band structures and density of states of strained monolayer MoS2 and WS2, and used the results in model calculations. Introducing strain moves the positions of the conduction band minimum and valence band maximum in k-space with resultant variation in the effective mass and population of carriers. Introducing 2% tensile strain into n-type MoS2 FETs decreases the electron effective mass and, at the same time, increases energy separation between the lower and the higher valleys in the conduction band, resulting in 26% improvement of the ON current up to 1260 A/m. Whereas compressive strain results in complicated effects, −2% strain also improves the ON current by 15%. These results suggest that introducing artificial strain is promising to improve TMDC FET performance.

Nanometer-scale, single-gate graphene nanoribbon Schottky barrier field-effect transistors (FETs) were theoretically investigated using self-consistent atomistic simulation. The device geometry was determined by referring to the International Technology Roadmap for Semiconductors. The target performance levels were the requirements specified in the roadmap for 2024, particularly a maximum leakage current of 0.1 A/m, an on-current of 2017 A/m, and a delay time of 0.13 ps. The device conditions needed to meet these requirements were found to be a bandgap larger than 1.1 eV, a supply voltage of 0.6 V, and a gate length of 7 nm.

Graphene was synthesized on a Cu film by chemical vapor deposition (CVD) and its grain size was analyzed by using dark-field transmission electron microscopy. The grain size was mainly controlled by changing the partial pressure of hydrocarbons in H2/Ar. The grain size increased as the partial pressure of C2H4decreased, but eventually leveled off. The size saturation may be related to the long growth time at a low partial pressure. It was also revealed that growth using CH4provided graphene with larger grain sizes than that using C2H4at the same partial pressure. Back-gate transistors were then fabricated using graphene with various grain sizes, and the dependence of field-effect mobility on the grain size was investigated. The mobility roughly scales with the grain size, but the intergrain angles and/or small holes at grain boundaries also seem to affect the carrier mobility. It was also found that low mobility was often caused by fractures and/or wrinkles in graphene channels.

We propose a new graphene field-effect transistor structure with local channel width modulation (modulated channel width, MCW-GFET). The channel has notches at the source side under the gate to increase the electric field. We simulate its electrical properties for the first time using the Monte Carlo particle method. Compared with that in the conventional GFET, the local mean velocity in the MCW-GFET can be twice higher, leading to a 30% shorter transit time and a 50% shorter local transit time near the source region without changing the threshold voltage of the FET. Therefore, developing GFETs with various structural designs seems promising for high-performance devices. (C) 2012 The Japan Society of Applied Physics

Graphene was synthesized on SiO2/Si wafers as large as 200 mm in diameter by thermal chemical vapor deposition (CVD) using Fe or Cu films as catalyst, and top-gated field-effect transistors (FETs) were fabricated directly on the wafer using a graphene-transfer-free process. For transistor fabrication, graphene was synthesized on patterned Fe films. The iron was subsequently etched after both ends of the graphene were fixed by source and drain electrodes (Au/Ti), resulting in the graphene channels bridging the electrodes all over the wafer. Top-gated FETs were then formed after covering the channels with HfO2 by the atomic layer deposition (ALD) method. The fabricated transistors exhibit ambipolar behavior and can sustain a high-density current. Dependence of graphene growth on catalyst types and various growth parameters was also investigated.

We are trying to employ nano-carbon materials, such as graphene and carbon nanotubes (CNTs), as channel and interconnect materials to realize low-power-consumption large-scale integrated circuits (LSIs). In this paper, we first explain our recent progress on the application of graphene to transistor channels. Graphene synthesis on a 200-mm Si wafer by chemical vapor deposition (CVD) and electrical properties of CVD-graphene transistors are described. Especially, details of graphene growth on Cu film, such as nucleation behavior of graphene islands depending on the growth condition, are addressed. Efforts to realize CNT interconnects at MIRAI-Selete are also reviewed. Special emphases are placed on the fabrication process of CNT vertical interconnects and their reliability.

Electron transport and energy relaxation in a 100-nm channel n+-n-n+ monolayer graphene diode were studied by using semiclassical Monte Carlo particle simulations. A diode with a conventional parabolic band and an identical geometry and scattering process was also analyzed in an attempt to confirm that the characteristic transport properties originated from the linear energy band structure. We took into account two scattering mechanisms: isotropic elastic scattering and inelastic phonon emission. The carrier velocity distributions in the two diodes show remarkable differences reflecting their band dispersions. Electron velocity in the monolayer graphene diode is high in the channel region and remains almost constant until the energy relaxation begins. Inelastic scattering does not reduce electron velocity so severely, whereas elastic scattering significantly decreases it through backscattering of hot electrons with high kinetic energy. Elastic scattering also degrades the ballisticity and the drain current; however, increasing the inelastic scattering offsets these effects. We found that elastic scattering should be suppressed to improve the performance of graphene devices.

We propose and experimentally demonstrate a functional electron device, which is a polarity-controllable inverter constructed using a four-terminal ambipolar graphenefield effect transistor(FET). The FET has two input terminals, both a top gate and a back gate, and the polarity of the FET can be switched by switching the input to the back gate. The slope of the inverter transfer curves can be changed by changing the back-gate voltage. By adding binary digital data and sinusoidal carrier waves into the back gate and the top gate of the inverter, respectively, the one-transistor binary digital phase modulator can be constructed and operated.

Thickness-controlled growth of few-layer and multi-layer graphene was performed at 650 °C by thermal chemical vapor deposition, and top-gated field effect transistors (FETs) were fabricated directly on a large SiO2/Si substrate without graphene-transfer processes. Graphene was synthesized on patterned Fe films. The iron was subsequently etched after both ends of the graphene were fixed by source and drain electrodes, leaving the graphene channels bridging the electrodes all over the substrate. Top-gated FETs were then made after covering the channels with HfO2. The fabricated devices exhibit ambipolar behavior and can sustain a high-density current. The growth mechanism of graphene was also investigated.

Graphene is a flat monolayer of carbon atoms with a two-dimensional honeycomb lattice, and many layers of it constitute graphite. Single-layer graphene has been discovered recently and found to have excellent electrical and thermal properties, making it a promising material for future electronics. We performed first-principle calculations which do not use empirical parameters and elucidated the electronic states of graphene under an electric field. We also clarified the electronic states of graphene at the interface with an electrode. We further simulated electron transport in graphene and found that it can be a channel material for high-speed and high-frequency transistors with a performance better than InP-HEMT. Moreover, we succeeded in synthesizing graphene and a composite structure consisting of graphene and vertically aligned carbon nanotubes on a substrate. In this paper, we describe our theoretical and experimental approaches aimed at future applications of graphene.