Recent developments in device architecture and the continuing search for tighter process control have driven the requirement for no energy contamination, high accuracy dose control, more precise angle control and peak dose rate control. The new high current VIISta Trident ion implanter has demonstrated the capability to meet the demanding process control requirements for these next generation devices, and to deliver the productivity necessary for high volume manufacturing. In this paper, we present the innovative elements of the VIISta Trident beam line, the advanced ion beam control capabilities and the impact of these unique features on process performance.

The issue of particle contamination in ion implant has received renewed interest recently due to the confirmation of killer ballistic particles in batch-style high current implanters. Single wafer high current is now the preferred method of high current implant and device limited yield is now being driven by particles that mask the implant and kill devices. Managing particles will become even more critical to device yields as devices continue to scale to tighter line widths and overall die sizes increase. Just as the batch-style implanters were found to limit yield at smaller device dimensions, the specifics of single wafer implant architectures can affect particle performance. Here we demonstrate the particle performance capability of the Varian VIISta HC dual magnet ribbon beam architecture, analyze the sources of particles in the system and offer an explanation of the physical mechanism that enables on-wafer particle performance.

We present CMOS transistors with n/sup +//p/sup +/ source/drain extensions doped by AsH/sub 3/ and BF/sub 3/ plasma immersion ion implantation (PIII) for the first time. We successfully demonstrate n/sup +//p/sup +/ shallow junctions with R/sub s/<1 k/spl Omega//sq for CMOS devices. No degradation in gate oxide integrity is observed for either AsH/sub 3/ or BF/sub 3/ PIII. Compared to conventional ion implantation, PIII provides much better short-channel effects and approximately 50% I/sub off/ reduction for both nMOS and pMOS devices. In particular, the flat threshold voltage roll-off and good performance in buried-channel pMOS devices is the best-reported PIII data to date.

Plasma immersion ion implantation (PIII) has been developed as an alternative deep trench capacitor buried-plate doping technology and compared to a conventional solid-state diffusion technique using arsenosilicate glass (ASG). Novel top-down (or vertical) SIMS measurements demonstrated the conformal doping capability of PIII along the trench sidewall. The doping level by PIII was almost one order of magnitude higher than that by a conventional technique. As a consequence, PIII provided better depletion characteristics than conventional technique. Furthermore, PIII processing did not degrade node-to-buried plate leakage current characteristics. From these results, it was demonstrated that PIII is a promising technology as an alternative deep trench capacitor buried-plate doping technique for future deep trench-based DRAM processing development

A beamline was developed specifically for production and transport of high perveance ion beams. Space charge effects are addressed at three stages of the beamline: extraction system, mass resolver and target interface. A large cross-section ion beam is extracted from a large area quiescent plasma by a fixed geometry pentode, and is injected into a 135 degree dipole magnet for mass dispersion. This magnet incorporates surface coils to produce independently adjustable quadrupole fields to accommodate variable space charge defocusing effects. The beam then passes through an adjustable width mass resolving slit that is combined with it post accel (or decel) gap, and finally traverses a plasma cell on its way to the target, for complete self regulating target neutralization. Design philosophy is presented with first order transport properties

Beam-line ion implantation, the pre-eminent doping method in silicon, is being pushed to the limit by the need to fabricate ultra-shallow junctions. Plasma doping is envisaged to be the alternative technique suited for the shift to simpler, more economical, higher throughput, and cluster-compatible hardware. The technology has gained much momentum in the past several years and an international plasma doping users group has been formed to bring together equipment manufacturers, process engineers, and researchers. In this article (part one of two parts), we will review the current status of plasma doping, present the latest device data, and discuss process and equipment issues.

The electron distribution (both density and energy) within and around an ion beam are very important in ion implanters for two reasons. The first deals with wafer charging which effects device yields, and the second deals with the defocusing effects of gradients in space potential, causing losses in transmission (especially in high perveance beams). An instrument has been developed capable of obtaining the J-V characteristic curves at all points within and around the beam while the beam is striking an insulating target (thereby simulating the worst case situation). This instrument consists of a linear array of current sensors (or “microfaraday”) in back of two slits. By scanning the device across the beam, and by using various biasing arrangements of the slits and microfaraday, one can obtain two-dimensional maps of plasma parameters such as floating potential, electron temperature and plasma density. Data is compared from three types of electron floods: secondary emission, plasma bridge, and plasma cell. Besides showing how each is capable of reducing wafer charging, the data shows that in all cases, the interaction between the shower and beam plasma is qualitatively the same, enabling us to propose a single model explaining all three

In an ion implanter, the beam is extracted from an ion source, propagates through a sequence of optical elements that typically include a mass resolving system and drift spaces, and terminates at the target. The optics are designed to transport the beam with minimum losses and appropriate size and shape to the wafer. Because of the process implications of beam shape at the target, and the many variables and uncertainties that may affect the actual beam envelope, it is highly desirable to verify the beam shape and emittance at various places along the beam line. For efficient beam transport and other packaging considerations, the beamline length is kept to a minimum. This precludes the use of conventional beam profile monitors such as those used in the large particle accelerators. We review here the various techniques available to acquire a beam profile and emittance diagram, and describe a compact instrument that we have developed for use in our implanter beam lines.