Abstract Data center cooling has evolved from air-cooling to liquid cooling, pushing the boundaries of a conventional cooling system to its limits. As the cooling designs evolve at a rapid pace, the reliability of such a system plays a leading role in avoiding any downtime. Physics-of-failure (PoF)-based reliability and availability modeling were applied in this study to a rack-level cooling system. The failure modes and mechanisms are listed, and based on these failure mechanisms, physics-of-failure models were applied to estimate the reliability and availability of the secondary cooling loop. The failure models were parameterized, and then these results were extended to different system architectures by adding redundancies to them. The results reveal that high availability can be achieved with reliable components as well as with redundant architectures, as availability increases from 0.9932 to 0.9997 in this study without additional redundancy. Hence, it is concluded that both the system architecture and component lifetimes play a crucial role in maximizing system availability.

Future data centers will employ large-area (greater than 25 mm x 25 mm), high-heat-flux (greater than 1 kW/cm2) central processing unit (CPU) and graphics processing unit (GPU) devices. Such devices, or chips, will necessitate aggressive cooling solutions, including two-phase cooling. In this work, we explore the potential of indium solder as a thermal interface material (TIM) for directly bonding cold plates to chips, providing a lowthermal-resistance pathway. By eliminating the need for multiple TIM layers, this approach enhances thermal efficiency while mitigating stresses by minimizing the coefficient of thermal expansion (CTE) and stiffness mismatch within the device stackup. We performed thermal-mechanical modeling of the device stack-up to analyze the temperature and stress maps. Our numerical results indicate that the highly viscoplastic and compliant nature of the indium solder TIM prevents excessive thermally induced built-in stress in the device after cooling postreflow. Furthermore, the numerical results clarify that the thickness of an additional copper-tungsten (CuW) layer, as a CTE alleviating component between the cold plate and device, can be minimized as its role is minor in preventing thermally induced stress, and in fact this layer increases package conductive thermal resistance. Thus, optimal thermal-mechanical performance for such large-area devices might be achieved through a minimal indium solder TIM thickness without such intermediary stress mitigation layers.

A single-stage dual-active-bridge direct current-alternating current (DC-AC) micro-inverter prototype with Gallium Nitride (GaN) primary switching devices was assembled and subjected to environmental reliability testing. Testing consisted of an unpowered temperature cycling with an amplitude ranging from −40 °C to 105 °C. Electrical performance characterization was performed during the accelerated testing at regular intervals until a failure was observed. Nondestructive failure analysis was performed on the board to determine the failure modes and mechanisms, and it revealed that the failure occurred due to solder bump delamination at the gate, source, and drain pads. To better understand the failure mechanism and predict the fatigue life of the assembled GaN field effective transistors (FET), thermo-mechanical simulation was performed using finite element analysis (FEA), where the submodeling feature was used to track the location of the GaN device on the board, and the average strain energy accumulation at the critical solder joint for each set of temperature cycles was simulated. Garofalo creep model was used to capture the creep deformation during thermal cycling, and Syed's Energy-based fatigue model for SAC305 solder was used to determine the life of the land grid array (LGA) package. The model constants were calibrated using the experimental failure time. This study was then extended to examine the effects of encapsulation materials on the life of the primary devices. The results reveal that encapsulation significantly increases the fatigue life of the Gallium Nitride field effective transistors (GaN FET) for all encapsulation materials.

The fight against global climate change demands the electrification of aircraft propulsion. One of the most significant and distinct challenges that future multimegawatt electrified propulsion will face is high voltage at high altitudes, which could cause significant partial discharge and reduce the reliability of the propulsion system. Recognizing this challenge, a multidisciplinary research team has proposed, designed, built, and preliminarily tested a 2-kV 1-MW 20000-r/min integrated modular motor drive (IMMD) with an unprecedented weight power density of 9 kW/kg. This article presents the architecture, major design approaches, test results of associated power electronics systems at the rated voltage and current, and preliminary test results of the full IMMD prototype. Full power and system-level altitude tests of the IMMD are already planned at the National Aeronautics and Space Administration (NASA) test facility.

A single-stage dual-active-bridge DC-AC microinverter prototype board with Gallium Nitride (GaN) primary switching devices was designed and assembled for environmental reliability testing. An unpowered temperature cycling test was conducted with an amplitude ranging from -40 to 105 degrees C at a ramp rate of 5 degrees C/min. The electrical testing revealed a failure in the board between 800 and 1000 hours, which was located at the primary devices. Non-destructive failure analysis was performed on the board to determine the failure modes and mechanisms. Using a Confocal Scanning Acoustic Microscope (C-SAM) with a 75MHz transducer, it was determined that failure was located at the solder bumps, and the scans revealed that two of four primary devices, EPC2001C, experienced a solder bump delamination at the gate, source, and drain pads. Hence, it is concluded that the delamination occurred due to coefficient of thermal expansion (CTE) mismatch between substrate and die. To understand the failure mechanism and predict the fatigue life of the assembled GaNFET, Finite Element Analysis (FEA) simulation was performed using ANSYS structural models, where thesub-modeling feature was used to track the location of the GaN device on the board, and a total of five temperature cycles were simulated to determine the average strain energy of the critical solder joint. The Garofalo creep model was used to capture the creep deformation during thermal cycling. Syed's Energy-based fatigue model for SAC305 solder was used to determine thelife of the land grid array package assembly of the EPC2001C, and the model constants were calibrated using the experimental failure time. Furthermore, this study was extended to examine the effects of encapsulation materials on the life of the primary switching devices. The encapsulation materials were studied in three distinct configurations: solely potting, solely underfill, and a hybrid combination of potting and underfill. The results reveal that the encapsulation materials significantly increase the fatigue life of the GaNFET.

A significant concern in grid-scale photovoltaic power plants is the abnormal fluctuation of inverter electrical performance over its operational lifetime. Environmental conditions contribute to the degradation of various inverter components to different degrees, necessitating the construction of a digital twin for analysis and prediction. Initially, an H-bridge inverter with an output LC filter is constructed, and its experimental dataset is used to build a circuit-level ‘switching’ digital model of the inverter using particle swarm optimization. The tuned model is then degraded to generate a large dataset, including filter component parasitic resistance—a key degradation parameter for grid-tied inverters. Subsequently, supervised machine learning (ML) models are trained and tested to implement a digital twin of the inverter capable of accurately estimating degradation-induced reliability issues. Two ML algorithm-driven results are compared, with the random forest model emerging as the best-fit digital twin for the constructed inverter, achieving an R2 value of 0.99 and an RMSE as low as 1.155 × 10−6.

Silicones are commonly used as encapsulation materials, given that they provide excellent properties like high thermal stability, chemical resistance, protection against handling, and dielectric isolation. Furthermore, they impose minimal mechanical stress on the encapsulated devices and interconnections. However, silicones are highly susceptible to moisture ingress. To address this issue, this study primarily focuses on reducing moisture ingress into silicone encapsulations with a simple and cost- effective design. This design approach explores the fabrication of bi-layered encapsulation material, which includes the addition of a polyurethane moisture barrier layer over silicone, as it is a highly moisture-resistant and economical encapsulation material. In contrast to silicone, it can impose considerable mechanical stress on the encapsulated devices. Hence, combining polyurethane with silicone permits a reduction in moisture penetration and absorption while reducing mechanical stress. Four sets of four samples, consisting of silicone, polyurethane, and two composite architectures, were tested at two different environmental conditions. The samples were initially baked at 125 degrees C for 24 hours to remove moisture. Then, the samples were tested at 85 degrees C-85% RH, using the JEDEC standard, and later, the samples were tested at 50 degrees C-60% RH. The samples remained in the test environment until they reached an equilibrium with the surroundings. Based on the results, it was evident that polyurethane outperformed all other samples, but the composites were better than silicone in both testing conditions without placing undue stress on the devices. Hence, the barrier layer significantly improves the moisture ingression performance of the silicone encapsulation.

The hybrid-active-neutral-point-clamped (H-ANPC) inverter, which integrates Si and SiC devices, outperforms the traditional Si NPC inverter without incurring the higher cost of a SiC NPC inverter. Nevertheless, the SiC MOSFETs in the Si/SiC H-ANPC experience higher power losses than the Si IGBTs, potentially impacting their reliability. Through accelerated electrothermal power-cycling tests (PCTs) and statistical lifetime assessments based on inverter mission profiles, this paper investigates the lifetimes of these semiconductor devices. The study further explores semiconductor device-placement strategies on heatsinks with the goal of extending the lifetime of SiC MOSFETs in the Si/SiC H-ANPC inverter to closely match that of SiC MOSFETs in the SiC NPC inverter. The implication of using non-monolithic heatsinks, with decisions informed by unique device material properties and asymmetric heat loading, are analyzed. Additionally, the placement of forced cooling to enhance inverter reliability without affecting the size and cost of the inverter is discussed.

Multi-layer ceramic capacitors have been used for high frequency decoupling application due to a lower overall impedance leading to fast current response. However, high parasitic inductance limits the application of these capacitors in ultra-high frequency domain. Thus, Multlayer Ceramic Capacitors (MLCCs) are placed close to the IC to improve circuit efficiency and reduce inductance. With next generation applications, the demand for frequency range has further increased which not only requires enhanced capacitor material but improved manufacturing techniques to limit the inductive path. Here, we demonstrate ALD of two different polymorphs of ultra-thin film lithium phosphorus oxynitride (LiPON) as an inorganic solid state electrolyte (SSE) for on chip capacitors for decoupling application. Both the LiPON capacitors shows an electric double layer behavior with a capacitance of 15 mu F/cm2 and a low leakage current (<20 nA/cm2) at 2V. The LiPON shows EDLC behavior up to 10 kHz and beyond, both the polymorphs show an electrostatic behavior with a high dielectric constant (14). This dual frequency behavior along with low parasitic inductance and on chip integration allows for operation in extended frequency ranges.

Additive manufacturing (AM) techniques, also known as 3D printing, have been embedded into electronic components used for power modules as they can meet complex design requirements with less material waste and shorter lead-time. However, the corresponding manufactural considerations need to be investigated to ensure good printing quality. This paper is a parametric study of previous research [1], specifically focusing on the key parameters for the syringe-printing method that has been used to print a single-layer planar transformer winding implemented on a 10kW DC-DC power converter. A series of key parameters such as kick, trim length, feed rate, and pass spacing are defined, followed by inquiring into the printable regarding the width of a single trace and the gap/printing spacing between two traces. The results indicate that the targeted trace width and gap are subjected to certain errors, resulting in an imprecise actual print, that cannot be employed when designing a CAD model. Instead, a set of recommended values corresponding to the targeted values are acquired. Linear relations between the actual values and targeted values are obtained, which provides convenience for further design when considering using syringe-printing as an AM technique to print nano-silver traces.

The growing demands of electrification are driving research into new electronic materials. These electronic materials must have high electrical conductivity, withstand harsh environments and high temperatures, and demonstrate reliable solutions as part of complete electronic packaging solutions. This study focuses on characterizing the manufacturing process of transient liquid-phase sintering (TLPS) of alloys in a paste form as candidates for high-temperature and high-power electronic materials. The main objective of this paper is to investigate the factors and decouple the multiple cross effects occurring during the first stage of TLPS processing in order to improve the understanding of material evolution. We conduct in situ electrical resistivity tests to directly measure material properties and analyze the dynamics and different stages of the material's evolution. We explore various factors, including alloying elements, organic binders, and heating rates, to understand their effects on the formation of electrical performance in electronic materials. More specifically, we will examine the performance of Ag-In and Ag-Sn TLPS paste systems. Additionally, we examine the packing density and changes in cross section using imaging techniques and image processing to gain insights into the early formation of the material's structural backbone. This investigation not only sheds light on the material's behavior but also has implications for robust additive manufacturing (AM) applications.

The fight against global climate change demands the electrification of aircraft propulsion. One of the most significant and distinct challenges that future multi-megawatt electrified propulsion will face is high voltage at high altitudes, which could cause significant partial discharge and reduce the reliability of the propulsion system. Recognizing this challenge, a multi-disciplinary research team has proposed, designed, built, and preliminarily tested a 2-kV 1-MW 20,000 RPM integrated modular motor drive (IMMD) with an unprecedented weight power density of 9 kW/kg. This paper presents the architecture, major design approaches, test results of associated power electronics systems at the rated voltage and current, and preliminary test results of the full IMMD prototype. Full power and system-level altitude tests of the IMMD are already planned at the National Aeronautics and Space Administration (NASA’s) test facility.

Concerns regarding climate change from the use of fossil fuels have expedited the growth of renewable energy sources. One such form of renewables, solar energy, is already playing and will continue to play a major role in meeting U.S clean energy targets. Expanding solar power usage in residential networks is a critical step in the decarbonization and clean electricity movement. To achieve a carbon-free grid by promoting solar power to the general public, an aggressive cost reduction in solar power systems is essential. The power density of the equipment used in the solar power system is necessary to solve the challenges of solar power installation. This project aims to research, explore, and assess the possibility of reducing the microinverter cost and volume to achieve the next generation microinverters (NGMs) targets for residential solar photovoltaic applications.

The International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems (InterPACK) is a flagship conference of ASME Electronic and Photonic Packaging Division (EPPD). It has served as an international forum within the ASME society to share and exchange latest progresses in the research, development, and applications of electronic and photonic packaging since 1992. The aim of ASME Journal of Electronic Packaging (JEP) Special Section for InterPACK is to publish outstanding papers from technical tracks of InterPACK2021, which was held virtually amid COVID-19 pandemic worldwide. This Special Section of the ASME JEP publishes nine papers presented at the InterPACK2021 in the areas of electronics and photonics packaging, micro-electronics reliability, and advanced thermal management from the silicon, package, to data center level. All nine papers published in this JEP Special Section for InterPACK2021 went through a standard peer-review process for journal papers published by ASME.The micro-electronics industry is facing challenges to meet demanding performance and functional needs of high-performance computing (HPC), artificial intelligence (AI), 5 G/mm Wave, and power electronic devices. In order to close this gap, in parallel with new breakthroughs in advancing silicon node, the semiconductor industry is also embracing advanced integrated circuits (IC) packaging technologies, including heterogeneous integration, 2.5D/3D IC packaging, chiplet, additive manufacturing, novel modeling and characterization techniques, and others. This Special Section reflects latest progresses in the IC packaging by publishing nine papers presented at ASME InterPACK2021. We gratefully acknowledge all the authors who have revised their original conference papers for this Special Section and the reviewers who have spent tremendous time and efforts to help improve overall quality of the papers for this Special Section. We also would like to thank the ASME JEP Editor-in-Chief (EIC), Professor Shi-Wei Ricky Lee for his guidance and support, and the assistant to EIC, Dr. Jeffery Lo for his help in this journey.

As part of the effort to implement additive manufacturing techniques into the world of power electronics devices and materials that can operate at harsh environments, researchers and industry must mitigate multi-level challenges that span processing techniques, manufacturing scaling, manufacturing mobility, cost reduction, optimal material properties, and reliable material performance. This study presents a new method to dynamically test the electrical properties of a given solder alloy. The method is capable of testing the electrical properties from the moment in which the solder is pasty and mixed with multiple organics, to the point where the organics are evaporated and reacted, and the remaining material is only diffused metal powder. This new testing method allows to quantify multiple effects such as organic–metallic interactions, chemical effects, metallurgical effects, and in the context of additive manufacturingAdditive Manufacturing, this testing method provides a new design tool for faster processing, temperature profiles designs, and paste formulation design.

In this work, a top-down analysis is carried out to investigate the impacts of environmental factors on the health, and hence on the reliability, of solar inverters (SI). Five years of real field data from 46 string inverters in a 1.4 MW Photovoltaic (PV) plant located at Florida International University (FIU) are used for the analysis. Collected data is classified and examined based on inverter faults, failures, and stress conditions using the classification and regression tree (CART) algorithm. Results have shown that inverter performance is highly correlated to ambient conditions, i.e. sunrise and sunset timing, relative humidity, and irradiance profile, and therefore adequate specific ventilation management can be a useful tool to mitigate some major inverter health issues. Triggered by this study, a prognostic analysis from the information in service tickets and machine learning (ML) outcomes will be carried out as future work.

High power density electric motors are essential for the electrification of aircraft. Use of a segmented stator, which makes the winding process easier and allows a higher slot fill factor, can help increase the power density as well as the efficiency of a motor. The cooling for the segmented stator can be done using a cooling jacket. In this paper, three different designs are presented. Two designs use the compression sleeve that provides the mechanical support to the stator as the cooling jacket, with radial or axial fins built in. One has a dedicated cooling jacket on top of the sleeve. A numerical study was performed on the three designs. All three have similar cooling capability, with the dedicated cooling jacket having a slight advantage, but it also results in a much higher pressure drop and requires more pumping power to achieve the low resistance.

The desire to reduce carbon emissions, noise, and fuel consumption is driving recent research on electrification of traditional combustion power units. High power density motors are essential for large-scale, heavy-duty applications. To achieve high power density, thermal management systems are critical as, at elevated temperatures, electric motors are susceptible to reduced performance or even catastrophic failure.The stator winding is the primary heat source in high power motors and is the major challenge in cooling system design. Not only is controlling the temperature important for safe operation, but also the resistance of the winding increases with higher temperature, lowering the motor efficiency. As there is a high thermal conductive resistance between the windings and traditional cooling structures built on the outer surface of the motor, direct in-slot cooling is required to achieve the needed thermal management. In this paper, a novel in-slot cooling approach is discussed for a permanent magnet motor with power density higher than 22 kW/kg, based on active mass. In this approach, the stator slot, including the winding within, is encapsulated with high thermal conductivity potting material. Fluid channels are built directly into the winding turns by an investment casting process, reducing the thermal resistance between the winding and the coolant. A manufacturing process is proposed, and five different configurations are simulated and compared.

One of the most important elements for market acceptance of new technologies is ensuring reliability. Nowhere is this truer than in the shift from well characterized fossil fuel technologies to newer renewable and sustainable energy technologies. The key enabling technology driving these shifts is the development of power converters and inverters. Conventional approaches to assess reliability of these devices have severe drawbacks. Frequent redesigns, often with new parts having no historical data, limit the usefulness of methods based on historical data. Conversely, physics-of-failure approaches often do not capture the most relevant failure mechanisms, including those related to operationally induced electrical overstress and software. In this paper, we will discuss a revolutionary new reliability assessment approach that utilizes advancements in artificial intelligence (AI), machine learning, and data analytics, along with new techniques for characterizing and modeling failure mechanisms to improve power electronics reliability. The reliability assessment method combines AI and machine learning algorithms for analyzing field failure data, with top down models that translate the impacts of grid- connected and grid-parallel mode dynamics and mode-transition dynamics on power systems, and reliability physics degradation models for key failure mechanisms that simulate the effects of both electrical and environmental degradation under field operational stresses. These models can be embedded in digital twins created specifically to replicate the design of current and new inverters. The output of these digital twins reflects the effects of aging and component degradation on system performance and will be transferable to multiple power electronic systems and platforms.

There are strong incentives to reduce the size of advanced power electronics, such as high-frequency converters. Reduced system size often lowers parasitic losses, system weight, and system cost. Two items significantly limiting such reductions in size, however, are the following: 1) the dimension of magnetic devices such as transformers; and 2) the size of the cooling system, including heat sinks, required to dissipate the heat generated in the transformer windings. This paper will present an advanced transformer configuration that allows for significant volume reduction by using additive manufacturing (AM) to deposit planar transformer windings on a thermally conductive combined-core-and-coil (C3) cooler substrate. The candidate material of the C3 cooler is ceramic, as it needs to be electrically insulating but thermally conductive. The C3 cooler is additively manufactured using selective laser sintering (SLS) technology, so as to have channels for liquid cooling inside. Windings are deposited on this cooler substrate by syringe printing and sintering of nano-silver (nano-Ag) and other conductive pastes, making the design flexible and sustainable. These planar transformer windings spiral with 45° angles between each straight segment. A minimum spacing of 0.45 mm between the windings has been achieved without shorting. This paper will also detail the effect of the sintering process times and temperatures on electrical resistivity and adhesive bonding strength. Microstructural evolution in the sintered paste will also be addressed.