This study investigates the reliability of 650 V AlGaN/GaN HEMTs using a novel Cumulative Step Stress method with incrementally increasing DC voltage steps. By monitoring transient signal time constants and final leakage levels, both newly induced and accumulated defects are tracked. Time-domain analysis reveals field-dependent transient leakage currents associated with trap states and parasitic capacitances, with permanent degradation observed above 1000 V. Frequency-domain analysis identifies defect-related noise peaks and bias-dependent frequency shifts, indicating damage onset above 900 V.

Lifetime assessments only based on silicon wear-out mechanisms are insufficient to explain electrical parameter drifts of devices aged at high temperatures for long durations. This complexifies predictions for semiconductor device aging. An alternative approach has been adopted in this study to explain these electrical drifts, by considering the interaction of the silicon and its encapsulation. Specifically, this analysis is performed on a degraded Bandgap Voltage Reference circuit embedded in an encapsulated Integrated Circuit, previously aged during High Temperature Operating Life test conditions for 6500 h at a junction temperature of 165 degrees C. Aged samples showed oxidized and deformed packages. The sample deformation was confirmed by thermomechanical simulations, which were also performed to validate increasing compression on the silicon die due to the progressive oxidation of the package. This explains the electrical parameter drift measured in the aged circuit as well as the recovery that was observed after samples were decapsulated. By removing the molding compound on top as well as around the die and therewith reducing the mechanical stress, the circuit drift was restored largely due to the intrinsic piezoelectricity properties of the silicon.

This article presents a method for detecting the temperature distribution of two parallelized Silicon Carbide (SiC) MOSFETs. Two thermally sensitive electrical parameters (TSEPs), namely the on-state resistance (Rdson) and the threshold voltage (Vth), are introduced. A comparison of the temperatures interpolated by Vth and Rdson shows disparity, enabling the detection of individual junction temperatures. Vth instability and its measurement are discussed for SiC devices. Experimental results show that, depending on the instability of the Vth and the sensitivity of the two TSEPs at certain temperatures, a combination of different TSEPs could be a solution for extracting the maximum junction temperature of parallelized devices.

This paper investigates the use of gate current as a temperature-sensitive electrical parameter (TSEP) to analyze the behavior of p-GaN Schottky gate AlGaN/GaN HEMTs under severe short-circuit (SC) test conditions and to provide insights into temperature-related breakdown mechanisms. Static characterizations, combined with TCAD simulations, were conducted to evaluate the correlation between gate current and temperature. A relationship linking gate current, gate voltage, and junction temperature was established and used to estimate the average junction temperature (TJ-AVE) during both type I and type II short-circuits. This estimation was subsequently compared with results obtained using a Foster thermal model.

This article presents a method for detecting physical defects in an innovative 3D Silicon (Si) power module by measuring thermal impedance (Zth). A non-invasive method for measuring the junction temperature of dies is introduced (voltage drop across a diode under constant current), and a comparison is made with simulation results (CELSIUS EC SOLVER software). The observed differences are analyzed to propose hypotheses for defects origins and location. A scanning electron microscopy (SEM) observation is also used to validate these hypotheses. The results confirm that the comparison between experimental and simulation data of Zth is a precise method for determining the areas of physical defects.

This paper presents an electrothermal characterization of a prototype double-sided cooling power module. The junction temperature Tj is an important parameter of power devices. Different methods exist for junction temperature measurement. In this work, an electrical method based on temperature sensitive electrical parameter (TSEP) is conducted to estimate the junction temperature of the power module. A 3D thermal model was built to better comprehend thermal behavior within the module. A comparison between simulation and measurement results is performed and analyzed. Results have shown that 3D numerical modeling help understanding several manufacturing defects (soldering, sintering, die defaults, etc.).

As Silicon-based semiconductors approach their limits in different areas, wide bandgap devices, such as Silicon Carbide components, offer an excellent alternative in many applications. Recently, SiC MOSFETs are replacing Si-based IGBT in various fields as automotive, solar energy… The junction temperature is important to evaluate the performance and the reliability of these components. For Silicon MOSFET, the body diode is usually used as a thermal sensitive electrical parameter (TSEP) for junction temperature measurement. For SiC MOSFET, however, in gate-source short configuration (V GS =0V), some current still flows through the channel, which, with interface trapping, prevents from accurately estimating SiC MOSFET junction temperature. Practically, a sufficiently negative gate voltage V GS (-5V or below, depending on devices) must to applied to eliminate the current part through the MOS channel so that the body diode forward voltage is immune from interface trapping.

A Printed Circuit Board assembly (PCBA) testing approach using infrared thermal signatures is presented. The concept of thermal signature for PCBAs is introduced. Based on this concept, the testing method is able to: - detect assembly defects such as presence, polarity, value and solder (shorts and opens) and in some cases component health state - classify the components mounted on the PCB into a number of classes (e.g. – fault free(reliable), functional (less reliable), faulty ). According to the thermal signature of each component on the PCBA, PCBAs can be also classified in the same number of classes. In this article a special focus is put on capacitor defects especially capacitor value defects. Therefore, they will be the main components tested. The fault detection indicator used in this proof of concept is a statistical mean squared error measure (MSE).

A Printed Circuit Board assembly (PCBA) testing approach using infrared thermal signatures is presented. The concept of thermal signature for PCBAs is introduced and proven by experience and simulation. Based on this concept, the testing method is able to detect assembly defects such as presence of the component, polarity, value and solder (shorts and opens) and in some cases component health state, it also can classify the components mounted on the PCB into two classes (fault-free, faulty). According to the thermal signature of each component on the PCBA, they can be also classified in the same classes. In this article, focus is put on capacitor defects in a DC/DC converter, especially capacitor value defects. Therefore, they will be the main tested components. For a robust detection of multiple defect scenarios, the Principal Component Analysis (PCA) method is used as an outlier detection algorithm.

In this study, forward and reverse conduction of SiC MOSFETs are characterized. These measurements allow us to demonstrate that forward and reverse output characteristics are different, while this was not taken into account in the SPICE model provided by die manufacturers. The difference is due to the body effect within SiC MOSFET and to the shift in threshold voltage. The threshold voltage was characterized as a function of the drain-source voltage V DS . It is shown that V TH decreases a lot when V DS has greater negative values.

This paper studies the impact of the aging on power GaN transistors in switching conditions. The devices under test are commercial discrete enhancement mode gallium-nitride HEMT. We present a power cycling test platform that controls the switching conditions such as frequency, duty cycle, and gate voltage; as well as drain current and drain voltage. We have measured specific parameters before and after the power cycling in order to detect indicators for each drift effect. We measure not only the electrical parameters given by datasheet, but also the traps causing Dynamic On-State Resistance, an specific drift effect of this technology which compromises high frequency efficiency in switching power converters.

Using our innovative Compact Thermal Model (CTM) methodology, in this paper, we demonstrate how CTM can help to predict junction temperature in case of a cooling dysfunction. We applied our method on a complex power module with double sided cooling to highlight the efficiency of this modelling tool.

In this work, a new approach for electrical modeling of Silicon Carbide (SiC) MOSFET is presented. The developed model is inspired from the Curtice model which is using a mathematic function reflecting MOSFET output characteristics. The first simulation results showed good agreement with measurements. Improvement is needed in order to increase model accuracy and to take into account the influence of the junction temperature on device characteristics.

This paper describes the design of a power-cycling test bench to study the reliability of power-GaN-HEMT power switches. The aim of the presented paper is to study the measurable electrical consequences of internal degradation with aging. The shift of these measured parameters can be considered as reliability indicators. With the aim to decorrelate thermomechanical effects from internal GaN-specific degradation, the temperature was limited by choosing the stress parameters with the use of an infrared camera. The power-cycling test was designed with GaN-specific gate drivers to consider the pGaN-gate requirements. Thorough the power-cycling test we have tracked the evolution of electrical parameters that have been identified as degradation indicators. Finally, we have studied the link between the stress parameters and the degradation, as well as the correlation between different degradation indicators.

With the density increase of today's printed circuit board assemblies (PCBA), electronic test methods such as in-circuit test (ICT) reached their limits. In the same time the requirements of high reliability and robustness are greater. Original equipment manufacturers are obliged to reduce the number of physical test points and to find better-adapted test methods to keep adequate test coverage. Current test methods must be rethought to include a large panel of physical phenomena that can be used to detect- electrical defects, absence, wrong value of components, absence and shorts without using test points on the board under test (BUT). In this paper, a test set-up based on the measurement of electromagnetic signature to diagnose faulty components contactlessly is presented. The technique consists in using magnetic field probes, which detect the field distribution over powered sensitive components. To evaluate the relevance of the method, reference EM signatures are extracted from fault-free circuits, which are compared to those extracted from a sample PCBA in which we introduced a component level defect by removing or changing the value of critical components. For more robust detection of multiple defect scenarios, the principal component analysis (PCA) method is used as an outlier detection algorithm.

With the density increase of today's printed circuit board assemblies (PCBA), the electronic test methods reached their limits, in the same time the requirements of high reliability and robustness are greater. Original equipment manufacturers are obliged to reduce the number of physical test points and to find better-adapted test methods. Current test methods must be rethought to include a large panel of physical phenomena that can be used to detect electrical defects of components, absence, wrong value, and shorts at component level on the board under test (BUT). We will present the possibility of using electromagnetic signature to diagnose faulty components contactlessly. The technique consists in using small diameter near electromagnetic field probes, which detect the field distribution over powered sensitive components. A giant magnetoresistance (GMR) sensor was used as well to detect variations in low frequency components. The loading of the BUT is specifically chosen to enhance the sensitivity of the EM measurements. Reference EM signatures are extracted from a fault-free circuit, which will be compared to those extracted from a sample PCBA in which we introduced a component level defect by removing or changing the value of critical components. As a result, we will show that the amplitude of a specific harmonic acts as a sensing parameter, which is accurately related to the variation of the component value.

Compact thermal modelling can provide useful tools for electronic systems designers. Indeed, the generation of simplified but accurate thermal models enables to reduce the number of $3D$ thermal simulations with high complexity and expensive computation time. Another benefit is the possibility for device manufacturers to provide systems suppliers with extended datasheets in the form of Compact Thermal Model (CTM) without revealing the device structure or used materials. The CTM can be applied to multi-chips systems and it is auto-adaptive to boundary conditions change.In this paper, CTM-methodology is defined for an efficient power module structure with double side cooling. The extracted CTM is used to investigate cooling-pump defects in the design phase of the inverter. The results are compared with a $3D$ thermal model using Computational Fluid Dynamics software $(6$SigmaET).

Power device reliability is a multidisciplinary domain. It requires design and integration of sensors, implementation of signal processing algorithms that allow processing the different data provided by the different sensors in order to predict by statistical means the device failure occurrence and consequently anticipate the power device replacement. Currently, for device ageing studies in a laboratory, electrical measurements of device parameters are often used as an indicator of device ageing. Furthermore, smart metal-oxide semi-conductor technology integrates more and more sensors that permit to measure quantities such as on-state resistance or junction temperature of the device. In power vertical diffused metal oxide semiconductor (VDMOS) assemblies, it would be interesting to make use of the VDMOS electrical parameters deviations in order to monitor the ageing state of the power assembly. To that end, we carry-out in this paper a study mainly based upon electro-thermo-mechanical simulations in order to identify the power VDMOS electrical parameters that could be monitored in order to access to the mechanical state of the power assembly and therefore anticipate the assembly failure. The power VDMOS R on as well as zero temperature coefficient (ZTC) point are of interest because they are sensitive to mechanical stress. Consequently, in this paper, a procedure to minimise temperature impact on the Ron of the VDMOS transistor such that one could use the Ron as mechanical state indicator is shown. Another solution that makes use of a specific operating point of VDMOS (ZTC) which is temperature independent is also studied by simulations and experiment.

In recent years, wireless sensor networks (WSN) have been considered for various aeronautical applications to perform sensing, data processing and wireless transmission of information, without the need to add extra wiring. However, each node of these networks needs to be self-powered. Considering the critical drawbacks associated with the use of electrochemical energy sources such as narrow operating temperature range and limited lifetime, environmental energy capture allows an alternative solution for long-term, deploy and forget, WSN. In this context, thermoelectricity is a method of choice considering the implementation context. In this paper, we present hands-on experience related to on-going implementations of thermoelectric generators (TEG) in airliners. In a first part, we will explain the reasons justifying the choice of ambient energy capture to power WSN in an aircraft. Then, we will derive the general requirements applying to the functional use of TEG. Finally, in the last section, we will illustrate the above issues through practical implementations.