The paper presents a simulation study on the sensitivity performance of CMOS-MEMS pressure sensors utilizing the Split channel MOSFET structures. These pressure sensors have been designed as split circular curved and split square curved channel MOSFETs integrated on corresponding silicon based circular and square diaphragms. These pressure sensors operate using the piezoresistive effect of MOSFET as a transduction mechanism, referred to as piezo-MOS. The research has been carried out using n-MOS, p-MOS, and CMOS (integrated p-MOS and n-MOS) current mirror circuits. Each circuit has been individually integrated with both diaphragm geometries. The proposed pressure sensors were redesigned using SCL 180 nm CMOS technology, with a 100 & micro;m channel width and 10 & micro;m channel length. The piezo-MOS structure has been split into four segments, resulting in a current mirror integrated split curved channel MOSFET pressure sensor. The mechanical properties of the proposed pressure sensors have been studied using the finite element analysis solver, COMSOL Multiphysics software. The circuit characteristics have been evaluated using Tanner T-Spice. The external pressure ranging from 0 kPa to 450 kPa has been applied to the pressure sensors. The sensitivities of n-MOS, p-MOS, and CMOS (integrated p-MOS and n-MOS) current mirrors, for Split circular curved channel pressure sensor, have been obtained as 122.051, 0.249, and 377.611 mV/MPa, respectively. Similarly, for the Split square curved channel, it has been obtained as 138.821, 0.401, and 492.250 mV/MPa, respectively, for the corresponding readout circuits. The sensitivity variation over different temperature ranges has also been studied and compared for the proposed pressure sensors. Enhanced sensitivity and compatibility with CMOS technology could make the proposed pressure sensors suitable for the next-generation pressure sensing devices.
These days, gastrointestinal disorders are a major health concern, and serious consequences can be avoided with early detection. An effective tool for the examiner to make an accurate diagnosis of the disease is a computer-aided diagnosis (CAD) system. However, the developed artificial intelligence (AI) algorithm determines the power consumption and latency of the CAD system. The AI algorithm needs to be optimized for edge devices for real-time implementation. In the proposed LDFGastro-Net, we have developed a lightweight hybrid convolutional neural network (CNN) model for the classification of gastrointestinal disorders. The initial layer is derived from the MobileNet-V2 pre-trained model for the extraction of low-level features, as the proposed model is intended for Field Programmable Gate Array (FPGA) deployment and must be lightweight. Next, a dense structure of depth-wise separable layers forms the middle section of the proposed framework. The dense connection has the advantage of feature reuse with the extraction of essential spatial features along with low-level features. The depthwise separable and feature fusion, which help in class-specific features and preservation of low level features, are included in the final layers. The proposed model’s performance has been demonstrated through Grad-CAM visualizations, highlighting its ability to classify gastrointestinal disorders better. With an accuracy of 98.2%, the proposed model outperforms the existing custom CNN model and several state-of-the-art pretrained architectures.
A simulation study on curved MOSFET-based current mirror integrated pressure sensors (CM-CMIPS) has been presented in this paper. The pressure sensing structures studied in this work have contained circular and square curved MOSFETs embedded on circular and square silicon diaphragms. The proposed pressure sensors have utilized the piezoresistive effect in MOSFETs as transduction mechanism and have employed current mirror circuits as readout circuits for detecting the externally applied input pressure. This work has included a comparative study for the following six pressure sensing structures: two structures each utilizing a p-type and n-type circular curved channel MOSFET embedded on circular diaphragms, two structures each utilizing a p-type and n-type square curved channel MOSFET embedded on square diaphragms, one structure consisting of both p- and n-type circular curved channel MOSFETs each embedded on two separate circular diaphragms, and the last one consisting of both p- and n-type square curved channel MOSFETs each embedded on two separate square diaphragms. The proposed CM-CMIPS sensors have been designed using standard 5 mu m CMOS technology. The pressure sensitivities of square-shaped CM-CMIPS employing p-MOS, n-MOS, and CMOS (both p- and n-MOS) structures have been found to be approximately 515, 407, 2151 mV/MPa, respectively, and 505, 661, 2223 mV/MPa, respectively, for the circular-shaped sensors.
Colorectal cancer (CRC) can be prevented with early detection and removal of the colorectal polyps. The accurate removal of polyps depends on the efficient segmentation of the polyps. In a power-constrained environment such as embedded devices, less complex deep learning models are needed to perform segmentation efficiently. This work proposed a lightweight segmentation model to be deployed on FPGA. The proposed architecture uses depthwise separable convolution efficiently, making the architecture perform well with lower computational complexity. The issue of polyp size variation can be successfully overcome with feature fusion within the encoder section of the architecture. The proposed architecture was successfully evaluated on CVC-CliniDB and Kvasir-SEG datasets with an mIoU of 0.9365 and 0.8501, respectively. It delivers a throughput of 44.82 FPS with 2.5011 energy efficiency when deployed on FPGA ZCU104. The proposed model outperformed other considered state-of-the-art (SOTA) models in terms of performance.
Singular Spectral Analysis (SSA) is a computationally intensive approach to denoise and detect a time-series signal. It requires the evaluation of eigenvalues and eigenvectors of a covariance matrix, which is the computationally intensive step in the SSA algorithm. The current work presents a feasible approach to implement the algorithm in embedded hardware using a PYNQ-Z2 Field Programmable Gate Array (FPGA) board. We implemented the algorithm using both the Processing System (PS) and the Programmable Logic (PL) of the PYNQ-Z2 System on Chip (SoC) with the help of a High-Level Synthesis (HLS) tool. A case study is carried out on a Nuclear Quadruple Resonance (NQR) signal. The implementation result demonstrates a hardware acceleration of 15.48x with respect to the equivalent software implementation of the algorithm on the ARM Cortex-A9 processor.
Early detection of colorectal polyps can prevent colorectal cancer (CRC), one of the life-threatening diseases. The removal of a polyp requires precise segmentation of the polyp from the wall of the colon and rectum. Current computer-aided diagnosis (CAD) systems, which are based on deep learning algorithms, struggle with long-range dependency and performance accuracy. Even the attention-based mechanism addresses these issues by focusing on the informative region. However, most existing attention mechanisms focus on smooth feature responses and may suppress local variation, which may not perform well on small, flat polyps. The proposed HDPCA-PNet is a U-shaped network with a hybrid pre-trained encoder for better feature and contextual information representation, along with improved dual-pooling coordinate attention to overcome the loss of positional, global contextual information, and dominant features. The variation in polyp shape and size is addressed by employing a residual efficient atrous spatial pyramid pooling (ASPP) method, which captures feature values at different scales effectively. The proposed architecture outperforms other state-of-the-art (SoTA) models with a mean IoU of 94.8% and 88.6% on the CVC-ClinicDB and Kvasir-SEG datasets, respectively.
Addressing the task of manually segmenting unhealthy portions from healthy areas in biomedical images, particularly for colorectal polyps, poses significant challenges in terms of time and labor. There is a need for expedited and reliable diagnosis to facilitate prompt and appropriate patient treatment. This research focuses on optimizing deep learning algorithms for the segmentation of colorectal polyp images, specifically targeting low-power platforms with minimal resource utilization. In this paper we have introduced a Pure Convolution Narrow U-Net (PCN U-Net) for polyp image segmentation. The proposed PCN U-Net achieves a mean Intersection over Union (mIoU) score of 0.90 while demonstrating a throughput of 32 frames per second (FPS) when evaluated with CVC-ClinicDB dataset on a GPU platform. Our proposed architecture is implemented and assessed across three distinct platforms: CPU, GPU, and FPGA. The results demonstrate superior performance on FPGA, showcasing a remarkable energy efficiency of 10.778 FPS/Watt and 10.585 FPS/Watt for CVC-ClinicDB and Kvasir-Seg datasets, respectively with the lowest power consumption recorded at 3.2 Watt.
The optimizing of renewable energy use and grid integration relies on accurate solar power predictions. In order to predict the amount of power that solar photovoltaic (PV) systems would produce inside an IoT framework, this study suggests a new method that integrates Singular Spectrum Analysis (SSA) with Extreme Learning Machine technology. The SSA algorithm makes sense of solar power data by separating it into its component parts, such as trend, seasonality, and noise. The ELM model, a quick and effective feedforward neural network with a single hidden layer, takes these broken-down parts as input characteristics. In order to enhance the accuracy of solar power forecasts, the suggested strategy combines the decomposition skills of SSA with the predictive capability of ELM. Data acquired by solar PV sensors is input into the IoT-based forecasting model, which then undergoes preprocessing with SSA, feature extraction, model training with ELM, and performance evaluation. The SSA-ELM methodology has been successfully tested on real solar power data and has shown promising results in terms of accuracy measures such as low mean absolute error and mean absolute percentage error. By implementing the suggested method, accurate projections of solar output can be made, leading to better energy management, lower costs, and the smooth incorporation of renewables into smart grids. A dependable and computationally efficient method for solar forecasting in Internet of Things applications is provided by the combination of SSA and ELM.
The work reported in this paper describes the design and simulation of a novel current mirror readout circuit based MOSFET integrated cantilever structure for micro-gram ( μ g) mass sensing applications. The proposed mass sensing structure consist of silicon cantilever as the micromechanical structure, MOSFET as strain sensing element and current mirror as a readout circuit. In this paper, studies have been carried out on three structures (a) n-channel MOSFET based resistive loaded current mirror integrated cantilever mass sensor (b) p-channel MOSFET based resistive loaded current mirror integrated cantilever mass sensor and (c) n- and p- channel MOSFETs based dual current mirror integrated cantilever mass sensor. The input MOSFET(s) of the current mirror acts as the reference transistor(s) while the output MOSFET(s) of the mirror circuit acts as strain sensing element(s) to measure the cantilever deflection under externally applied load. The structural and the electrical characteristics of the sensors were simulated using COMSOL Multiphysics and TSPICE software respectively. Simulation results showed a sensitivity of 21.89 μ V/ μ g, 1 μ V/ μ g and 115.57 μ V/ μ g for nMOS, pMOS and dual channel cantilever mass sensor. The fabrication steps and mask layout of the proposed sensor have also been presented in this paper. The novelty of this work is emphasized by the innovative integration of a CMOS current mirror circuit with a cantilever for mass sensing.
Signal parameters such as amplitude, frequency, decay constant, and phase play an important role in identifying the signal’s origin in many real-life applications. Standard gradient-based curve-fitting approaches are computationally complex to implement on hardware because of large matrix multiplication and partial derivatives. The current work demonstrates a feasible approach to extract parameters from exponential decay Nuclear Quadrupole Resonance (NQR) signals using derivative-free optimization approaches on a PYNQ-Z2 FPGA board. The hardware implementation results indicate 0.12 seconds is required to extract the amplitude, frequency, decay constant, and phase from 5x10-3 sec signals with the residual error in the order of 10-5.
Forecasting solar energy is essential for efficient grid management and integrating renewable energy sources into the electrical system. With the use of an extreme learning machine (ELM) and an adaptive moving average filter, we suggest a unique method for predicting solar power. The solar power time series' dynamic properties are captured by the adaptive moving average filter, which is used to preprocess the data. The solar power production prediction is then made using the ELM, a quick and effective machine learning technique. The preprocessed data is used to train the ELM, which then uses this knowledge to discover the nonlinear correlations between the input characteristics and solar power production.
Matrix inversion is a computationally expensive operation in many scientific applications. Performing matrix inversion of rank deficient large order matrices is still a challenge due to its computational overhead. This paper presents the hardware implementation of matrix inversion with (i) singular value decomposition (SVD) based on Lanczos and implicit triQR algorithms, (ii) QR method that uses modified Gram–Schmidt (MGS) technique and (iii) inbuilt linear algebra package QR inverse using Xilinx Vivado high level synthesis platform. All the three algorithms are implemented on Pynq-Z1 Field Programmable Gate Array (FPGA) using System on Chip (SoC) approach. The resource utilization along with accuracy, hardware execution time with and without loop optimization are reported for the aforementioned matrix inversion techniques of different matrix sizes. We achieved the hardware acceleration factor with loop optimization as 111x and 104x, respectively, for the matrix inversion of the MGS algorithm and SVD based on Lanczos algorithm with respect to the software implementation execution time on Pynq-Z1 FPGA for the matrix size 90 × 90 .
The advancement of Internet of Things (IoT)-based computing platforms opens novel possibilities for exploring and leveraging global navigation satellite systems (GNSS). This work utilizes machine-learning (ML) models and discusses the application of IoT scenarios for ionospheric monitoring and forecasting systems. A workflow discusses the effectiveness of the end-to-end solution in navigation applications through results obtained from the successive variational mode decomposition-kernel extreme learning machine (SVMD-KELM) method, which reduces the need for expensive hardware and infrastructure. The proposed approach offers advantages over variational mode decomposition (VMD)-KELM in terms of computational efficiency and improved accuracy, making it a preferable choice for applications that require real-time analytics and reliable global positioning system-total electron content (GPS-TEC) predictions. Furthermore, this article emphasizes two real-world scenarios: utilizing the long-range (LoRa) network for near-distance communication and integrating the Amazon web services (AWS) cloud for longer distance communication. The framework allows efficient data acquisition and transmission, with a high success rate (99.7%) in broadcasting GPS signal delay corrections. Finally, this article proposes an integrated cloud-based terrestrial navigation system as a proof of concept for machine-to-machine (M2M) communication. The system offers a scalable solution for GNSS-based IoT applications, ensuring reliable navigation information even in challenging environments and meeting real-time GNSS/Navigation with Indian Constellation (NavIC) user requirements.
The objective of the research is to identify a pre-trained Convolutional Neural Network (CNN) with faster inference time for classification of colorectal polyps on a Field Programmable Gate Array (FPGA) device. Basically, Deep Learning(DL) models are trained and executed using Graphical Processing Units (GPUs) having high processing capacity, but those devices consume more power during execution. DL models that are appropriate for real-time miniature instruments must be implemented with low-power consumption. This paper evaluates the performance of relevant polyp classification models using FPGA (Avnet Ultra96-V2) and GPU (Quadro RTX 5000). The CNN models are trained on GPU and then deployed for inference on FPGA using the VITIS-AI platform and PYNQ framework. The MobileNetV2 performs classification with 88% accuracy and least inference time of 2.60 seconds at a throughput of 176 frames per second on FPGA. A precise comparison of the throughput and power consumption during execution on GPU and FPGA are provided. The FPGA device is found to perform $\mathbf{1}.\mathbf{25}\times$ faster than GPU in terms of throughput while using $\mathbf{40}\times$ less power with a negligible reduction in accuracy.
The COVID-19 has infected around 340 million people, and 5.5 million died. Due to the rapid growth of the virus, and limited resources, the healthcare sector collapsed in many countries. Hence, there is a need to study deep learning- based applications that can aid the healthcare sector. The primitive machine learning approaches require learned features to extract information for classification, whereas Convolutional Neural Network (CNN) performs the same by extracting image features from raw images. CNN tends to overfit often for small datasets, and hence, the concept of transfer learning comes into play. This paper aims to study and modify a pre-trained CNN VGG-16 model using the concept of transfer learning. The algorithm has been validated using a private and a public dataset with normal and COVID-19 positive chest X-ray images.
Motion Estimation (ME) is the most power consuming module in the video encoder due to its high computational complex operations. So designing an efficient ME hardware without losing coding performance is a major challenge. This paper proposes a low-bit-depth ME technique based on Gray-Coded bit-planes and its hardware implementation using Binary Content Addressable Memory (BCAM). The proposed method significantly reduces the computational burden due to its low-bit-depth representation. The novel BCAM based ME hardware provides faster results because of its on-chip memory computation without compromising other performance parameters. It can process 8K @53.71 fps operated at maximum frequency of 155 MHz with 152.78K NAND equivalent gate count using 90 nm technology library.
Piecewise linear chaotic map (PWLCM) is a simple chaotic system popularly used for generating pseudorandom numbers (PRN). Digital implementation of PWLCM degrades the randomness of the pseudorandom number due to the finite precision effect. The current paper presents a digital 1-dimensional PWLCM that mitigates the degradation of digital chaos by cascading the chaotic map with a three-stage XORed shift register that perturbs the output of the PWLCM. We further perturb the output of the shift register using a one-stage XOR postprocessing. We also present the hardware architecture of the proposed system to generate a high throughput PRN sequence. The designed architecture is synthesized on Xilinx Zynq 7000 Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) using TSMC (Taiwan Semiconductor Manufacturing Company) 90 nm CMOS technology. We experimentally validate the randomness of the output sequence using NIST test suite 800-22. In addition, we also perform security analyses such as phase space, key sensitivity, correlation, and information entropy. The statistical and security analysis confirms the efficiency of the proposed design in terms of randomness. The synthesis result demonstrates the achieved throughput as 1.296 Gbps at 81 MHz operating frequency on Zynq 7000 FPGA, whereas a throughput of 1.696 Gbps at 106 MHz operating frequency is achieved on ASIC.
The ionospheric effect on radio wave propagation error has a significant impact on navigation, positioning, and real-time measurements. It is the primary source of errors in high precision aviation and measurement systems. A set of eight coefficients is used to correct ionospheric errors for Indian Regional Navigation Satellite System (IRNSS) users. Currently, the Klobuchar model is an effective low computational mathematical model for ionospheric range error mitigation through a set of eight coefficients. It has low accuracy in Equatorial Ionization Anomaly (EIA) regions and can correct up to similar to 60% of the ionospheric range error. This paper proposes an ionospheric error correction model that can be applied to such measurements as well as an associated error model to compute accuracy with a differential interval of observations 5 m, 30 m and 60 m. The numerical simulation results show that compared to widely used algorithms, the proposed strategy can enhance the 83.13% ionospheric correction with Klobuchar- like coefficients at a sampling rate of 5 m. The proposed solution could be effective for Regional Navigational Satellite Systems (RNSS) for ionospheric delay corrections in low-latitude regions. (c) 2022 COSPAR. Published by Elsevier B.V. All rights reserved.
Nuclear quadrupole resonance (NQR) spectroscopy is used to identify narcotics and explosive materials. Detection of NQR signal generated by 14(N) isotope in an open environment is a challenging task due to the presence of external random noise and RF interference. Unlike the existing wavelet-based and other frequency-domain approaches that use averaged data, the present work exploits raw data by saving the acquisition time. In this context, a novel singular spectral analysis (SSA) and nonlinear least square fit (NLLSF) algorithms are proposed to denoise the NQR signal and obtain the required parameters for detection of the NQR signal. Considering signal to noise ratio (SNR), segmental SNR (SSNR), and Pink noise as the performance parameters, the proposed algorithms are tested under various noise conditions by passing synthesized NQR signal and observed 35.7 dB gain SSNR. Furthermore, tests are carried out on NQR spectroscopy data acquired from the NaNO2 sample, and an improvement in terms of signal quality and acquisition time are noticed.
Motion Estimation (ME) is the most computationally intensive block in high efficiency video coding (HEVC) due to its complex partition schemes. It consumes a large amount of power in the encoder. So designing a ME module on hardware platform imposes significant challenges. Many hardware oriented integer ME (IME) algorithms have been proposed in the literature to meet the challenges but suffer from coding efficiency degradation. In this paper we propose a low complexity IME algorithm and its hardware implementation. The proposed algorithm has been shown for two different pattern structures (PS) with 38 search points. It achieves bjontegaard bitrate (BD-BR) of 0.5% decrease and 0.077% increase for two PSs compared to test zone search (TZS) in HM 16.8. It results 8.725% and 9.072% saving in encoding time respectively. The proposed architecture supports all the HEVC partitions. It provides real time encoding of 4096 $\times $ 2160 @60 fps operated at the maximum frequency of 353 MHz with 1591 K NAND equivalent gate count and 8.32 kB on chip memory using 90 nm technology library. Therefore, it can be used in consumer electronics applications such as security surveillance, video recording systems etc. that require high efficient HEVC encoder.