A 78-year-old white man with vascular disease developed ocular hypotony, bullous ciliochoroidal detachments, and suprachoroidal haemorrhage, secondary to medical treatment with acetazolamide and betaxolol, which resolved on withdrawal of these medications. This phenomenon does not appear to have been described in patients without prior intraocular surgery. It is likely that a compromised ciliary vasculature may result in increased sensitivity to aqueous suppressants, leading to profound hypotony, choroidal detachments, and haemorrhage.

A self-regulating on-chip voltage-reduction circuit that adjusts the internal supply voltage to the lowest value compatible with chip speed requirements is described. Besides enhancing reliability, this technique allows power savings. The technique is based on regulation of the supply voltage of an equivalent critical path, a small circuit with delay V/sub dd/ properties proportional to those of the actual critical path. The output of this equivalent critical path is compared with the output of a second identical equivalent critical path which is connected to the full supply voltage and serves as a reference. In a first-order approximation the ratio of the delay of a critical path to the period of a ring oscillator is a constant that depends only on the number of gates, the dimensions of the transistors, and the load capacitances. This means that a ring oscillator can be used as an equivalent critical path for all digital circuits. Moreover, when the supply voltage of a ring oscillator (VCO) is changed the frequency changes. The voltage regulator principle can be implemented with a phase-locked loop (PLL). By adjusting the VCO supply voltage, the PLL causes the VCO to oscillate at N*f/sub in/. If the dimensions of the VCO transistors and the division ratio N are such that the critical path functions correctly at the regulated voltage, it will always function correctly, as changing parameters temperature or frequency f/sub in/ affect the VCO in the same way as the circuitry.<>

ncircuit adjusts the internal supply voltage to the lowest value compalible with chip speed requirements, taking temperature and technology parameters into account. Beside enhancing reliability, this ncw technique also allows power savings, important for battery-operated systems such as lap-top computers and portable instrumentation or radio­ communication systems. A digital chip is characterized by a critical path. Reducing the supply voltage will caUse this path to slow until it CaUses mal­ function. The general voltage-reductio n technique presented in Figure 1 is based on regulation of the supply voltage of an ""l uiva ­ lent critical path', a small circuit with delay-Vdd properties pro­ portional to those of the actual critical path. The output of this equivalent critical path is compared to the output of a second identical equivalent critical path which is connected to the full supply voltage, and serves as a reference. 1n a first order approxi­ mation, the ratio of the delay of a critical path to the period of a ring oscillator is a constant that depends only on the number of gates, the dimensions of the transistors and the load capacitances. This means that a ring oscillator can be used as an equivalent critical path for all digital cirCUits. Moreover, by changing the sup­ ply voltage of a ring oscillator (VeO), the frequency chan!,;c,. The v

Two techniques for voltage reduction are presented, both of which can significantly reduce the power consumption of digital CMOS circuits. The fixed reduction of voltage is applicable to small systems with a low initial consumption, however, the optimum voltage is not reached and the correct operation of the circuit is not guaranteed. The self-adjusted reduction of voltage is adapted to bigger dig...