In this paper an optimized modulation technique is presented for low THD voltage generation onboard rolling stock by means of a voltage source inverter (VSI). The aim of the proposal is to minimize the output voltage THD through the optimization of the harmonic spectrum distribution. The optimal switching pattern has been obtained by means of an optimization method. Regarding conventional modulation techniques such as selective harmonic elimination technique, sinusoidal PWM with third harmonic injection or space vector PWM, the proposed optimized modulation presents lower THD and an extended modulation index because it can operate in the overmodulation region even with lower THD. Theoretical performance has been validated in a scaled-down prototype.
Auxiliary railway power supplies are needed onboard rolling stock to provide medium or low voltage to different systems from the catenary. In this kind of applications, the THD reduction of the filtered output voltage and a great regulation capability associated to the wide input catenary voltage range are the main goals to be reached. In order to achieve these objectives a novel overmodulation strategy for voltage-source inverters is presented. The new overmodulation technique has been tested and validated trough an auxiliary railway power supply prototype. Experimental results demonstrate the feasibility and the effectiveness of the proposed technique.
AC power supplies generated by means of an inverter are under very restrictive specifications regarding their AC output voltage THD, even when they are supplying both linear and nonlinear loads. The presence of the low frequency harmonic content due to nonlinear loads operation, greatly increase the THD of the AC power supply output voltage.Traditional state of the art techniques approach this problem from two main sides: filtering and fast control loops. However, the proposed technique aims to solve the aforementioned problem from a different point of view: the inverter modulation technique. Therefore, the Harmonic Cancellation Technique (HCT) has been developed. It is a modulation technique which is able to cancel out the low frequency harmonics due to the nonlinear load operation through the proper pre-distortion of the inverter output voltage.The present paper presents the limitations of the available solutions space for the proposed modulation technique. It also provides an insight of the converter design parameters which may help to enlarge the ranges of operating conditions for which HCT can be applied.
AC power supplies generated by means of an inverter are under very restrictive specifications regarding their AC output voltage THD, even when they are supplying both linear and nonlinear loads. The presence of the low frequency harmonic content due to nonlinear loads operation, greatly increase the THD of the AC power supply output voltage. Traditional state of the art techniques approach this problem from two main sides: filtering and fast control loops. However, the proposed technique aims to solve the aforementioned problem from a different point of view: the inverter modulation technique. Therefore, the Harmonic Cancellation Technique (HCT) has been developed. It is a modulation technique which is able to cancel out the low frequency harmonics due to the nonlinear load operation through the proper pre-distortion of the inverter output voltage. The present paper provides the experimental results and performance of the Harmonic Cancellation Technique in closed loop operation.
AC voltage generation in rail applications (auxiliary services), usually employs optimized PWM feedforward schemes in order to control the inverter. In this kind of applications the THD reduction of the filtered output voltage together with the reduced weight of the static converters are the main goals to be reached. In order to achieve these objectives, the most commonly used optimized PWM techniques are going to be compared in terms of total harmonic distortion (THD), weighted total harmonic distortion (WTHD) and IGBT losses.
The proposed modulation technique, harmonic cancellation, aims to reduce the output voltage THD in AC power supplies generated by means of an inverter, when they are supplying non linear loads. Its operating principle is grounded in the proper pre-distortion of the inverter output voltage. It means that the inverter must generate a specified fundamental component and some controlled harmonics, which added to the ones across the filter inductance, they cancel each other out. The switching events are determined analytically for given operating conditions and stored within a control table. Along the present paper, the control strategy will be presented. The proposed final control scheme is able to select the proper switching pattern which guaranties the cancellation of the low frequency content due to the non linear load operation and the desired rms output voltage. The effect of considering the parasitic voltage drops within the calculus of the switching events is shown through simulation results. Additionally, the robustness of the overall system performance against non considered parasitic voltage drops and against load steps are also shown.
The harmonic elimination technique consists on finding the proper inverter switching events so that the first harmonic amplitude is controlled and the rest of odd harmonic components are suppressed. However, non linear loads connected to the output of the inverter provoke additional harmonics that distort the output voltage applied to the load. Along the present work it is proposed an extension of the harmonic elimination technique. This extension pretends to determine the switching events so that the inverter is able of generating a controlled fundamental harmonic that complies specifications and also generates the next odd harmonic components in a way that added to the ones provoked by the load, they cancel each other out. The described method has been validated through simulation.
A new low output voltage and fast transient response DC-DC converter is presented in order to feed devices such as microprocessors and DSPs. The topology of the fast response double buck DC-DC converter (FRDB) is composed of two buck converters connected in parallel, each one of them with different features and aims, and controlled by means of the novel linear-nonlinear control. In this paper, the proposed topology and the control strategy are described. Finally, experimental results are presented to show the transient response under load current steps and the obtained recovery time.
This paper presents a theoretical and experimental study of the hybrid sources capabilities to improve both the dynamic response and the stability of switching power supplies. The hybrid sources are composed by both, a linear and a switching source connected in parallel. The reached improvements have been possible without affecting, significantly, the efficiency of the whole circuit. This solution is checked in low voltage sources. The obtained experimental results show that these power supplies present high dynamical performance, and therefore they can be used to feed digital signal processors and microprocessors.
Power supplies for last generation of microprocessors and DSPs must present low output voltage and fast transient response. The linear-non-linear control (LnLc control) was presented as a solution to improve the transient response in DC-DC buck converters. However, once the LnLc control has been analyzed, other important performances have been found such as, improving the stability of the system, improving the efficiency, reducing of the recovery time, making independent the bandwidth and the switching frequency; reaching all these performances with an easy implementation. In this paper, the features of the linear-non-linear control are described. It will be shown, how the LnLc improves the stability of a DC-DC buck converter modifying the open loop gain and phase as a function of the load current steps. To show this behavior the control transfer function (G/sub LnLc/) has been deduced. Several experimental results have been obtained in a synchronous rectifier buck converter to check its behavior. Thus, the novel LnLc control has been compared with the conventional voltage control under different conditions. Finally, the control transfer function has been obtained experimentally.
In this paper, PWM-PD multiple output dc/dc converters are presented. Operation analysis and power block design are shown. Furthermore, a small-signal model is developed for the PWM-PD multiple output dc/dc converters working in continuous conduction mode. The control-block is presented and the closed-loop circuit performances, such as the line, load and cross regulation, are obtained analytically. Finally, experimental results for a PWM-PD converter, with three fully regulated outputs and with transformer, are shown.
Linear-Non Linear control (LnLc) was presented like a solution to improve the transient response in low output voltage DC-DC buck converters, used to feed last generation of microprocessors and DSPs. This novel control optimizes the features of the conventional linear control in order to reduce the recovery time of the output voltage drop produced when a load current step occurs.In this paper, the ideal control requirements with respect to fast transient response are defined. Also, it is shown that the features of the Linear-Non Linear control fit with the ideal control requirements, doing it better than the most of solutions. Furthermore, the LnLc improves the stability of the DC-DC power supply modifying the open loop gain and phase as function of the load current steps. To show this behavior the control transfer function (G(LnLc)) has been deduced.Several experimental results have been obtained to check this behavior in a synchronous rectifier buck converter. Thus, the novel LnLc control has been compared with the conventional voltage control, under different conditions: with a fast voltage linear loop, with a slow voltage linear loop, with a unstable voltage linear loop, without error amplifier compensation, etc.
In universal line applications with hold-up time requirement, the single-stage PFC AC/DC converters may not be more attractive than the conventional two-stages approach if the size and cost of the storage capacitor are too high. Furthermore, computer related applications, in which the holdup time is a very important requirement, will have to comply with Class D limits of the low frequency harmonic regulation IEC 61000-3-2. Therefore, for these applications, a not very distorted line current will be required. In this paper, a new single-stage AC/DC converter suitable for universal line applications is proposed. The main difference with other solutions is the low voltage swing on the storage capacitor while the line varies within its universal range. This feature allows reducing the size and cost of the storage capacitor. Additional advantages of the proposed converter are topology simplicity (single-switch converter) and IEC 61000-3-2 Class D compliance. The experimental results confirms the above mentioned advantages.
When a designer is looking for the best option to implement an AC/DC converter which complies with the customer requirements (size, cost, regulations compliance, etc.), the features and capabilities of each alternative topology must be checked. In AC/DC converters under hold-up time requirement, the size and cost of the storage capacitor is one of the decisive aspects, mainly in low power applications. Is a 400 V/sub DC/ storage capacitor voltage always the best option?, or some other voltage values can provide similar or even better results?. In this paper, the main factors that determine the size and cost of the storage capacitor will be revised. Besides, some design and selection criteria will be provided.
To feed the latest generation of microprocessors and DSP is one of the main challenges for power supply designers. Both high current slew rates together with low output voltage are required. Firstly, the designer tries to comply with previous requirements optimizing the power stage and the control loop bandwidth, but if it is not enough then new strategies are needed. In this paper, a novel control technique is presented. The proposed combined linear-nonlinear control (LnLC) increases significantly the capability of a conventional linear control to reduce the recovery time of the output voltage drop produced when a load current step occurs. Experimental results have been obtained for two cases: a synchronous rectifier buck converter, with a conventional voltage loop and the same converter with the novel LnLC. The comparison of these experimental results validates the proposed idea.
In this paper, the different types of multiple output DC/DC converters based on the PWM-PD control are presented. These converters work at fixed switching frequency and they are characterized by having a bigger number of fully regulated outputs than number of controlled switches. Basically, this new family of converters can be divided in three groups: converters without transformer, with transformer and without post-regulation, and with transformer and with post-regulation. Finally, the experimental results for a converter fully regulated, with three outputs and two MOSFETs are shown.
In low power single-phase power supplies, single-stage AC/DC converters allow meeting low frequency harmonic regulations such as EN 61000-3-2 and they result a cheaper and simpler solution than the two stages approach. The series inductance interval (SII) gives its name to a new family of single-stage power factor correction (PFC) converters which have been developed to obtain three features: a storage capacitor voltage below the peak value of line voltage, low variation of this voltage with line and load changes, and input current harmonics lower than the EN 61000-3-2 Class D limits for the full load power range. This paper present the principle of operation of the SII converters besides the first experimental results.
This paper shows the utilization of the new linear-nonlinear control (LnL) to get a better fast transient response in switching power supplies. The linear-nonlinear control allows reducing the recovery time of the converters working under a load current step. This type of control helps designers to solve the problems presented in system such us DSPs and microprocessors. Four different prototypes have been built to show the actual operation and to compare the experimental results: a conventional buck converter with linear control, a buck converter with LnL control, a hybrid source with threshold band and a hybrid source with LnL control. The results prove that using LnL control the output voltage variation is limited, the efficiency is improved, and a better transient response is obtained.
This paper presents a new type of hybrid source based on the combined linear-nonlinear control (HS-LnL). The hybrid sources are composed of both a linear and a switching source connected in parallel. The linear-nonlinear control allows to reduce the current provide by the linear source when a load current step occurs. This fact has an effect on the hybrid source efficiency. Three prototypes have been built to check and to compare the experimental results. These results prove, for the HS-LnL, that the output voltage drop is limited, the efficiency is not affected by including a linear source and fast transient response is improved. The obtained experimental results show that these power supplies can be used to feed DSPs and microprocessors.
Nowadays, one of the main challenges for power supplies designers is to feed the latest generation of microprocessors and DSPs, since they require high current slew rates together with low output voltage. In this paper, a novel control technique is presented to help the designers to comply with the current requirements. The proposed combined linear-nonlinear control (LnLC) scheme increases significantly the capability of conventional linear control to reduce the recovery time of the output voltage drop produced when a load current step occurs. Experimental results have been obtained for two cases: a synchronous rectifier buck converter, with a conventional voltage loop and the same converter with the novel LnLC. The comparison of these experimental results shows that, with the new control, the recovery time of the output voltage is reduced