The coupling of ionic and electronic transport in solid-state systems offers new opportunities for realizing compact, energy-efficient sensing technologies, yet practical implementations remain limited. Here we introduce a two-dimensional iontronic platform based on field-effect transistors that integrate monolayer MoS2 channels with van der Waals bimetallic thiophosphates (ABP2X6, A = Li, Cu, Ag and so on; B = In, Sc and so on; and X = S and Se) as ionic gate dielectrics to realize on-chip thermometry. Specifically, we exploit thermally activated ion migration within the gate dielectric leading to conductance modulation in the MoS2 channel for temperature sensing. We achieve ~1–2 °C resolution, fast electronic readout and subpicojoule energy consumption in an ultracompact footprint (~1 µm2). Beyond thermometry, these results establish bimetallic thiophosphates as a versatile platform for solid-state iontronics and broaden the functional design space of van der Waals heterostructures for sensing, actuation and adaptive electronics. Thermally activated ion migration in van der Waals heterostructures delivers precise, energy-efficient on-chip thermometry.

CMOS technology demands materials and architectures that emphasize low power consumption, particularlyforcomputations involving large-scale data processing and multivariable optimization. Ferroelectric materials offer solutions through enabling dual-purpose memory units that perform both storage and logic operations. In this study, we demonstrate ferroelectric field-effect transistors (FeFETs) with two-dimensional (2D) molybdenum disulfide (MoS2) channels fabricated on ultrathin 5-and 10-nm ferroelectric aluminum scandium nitride (Al1_xScxN). By decreasing the thickness of the ferroelectric film, we reduced the gate voltages (<3 V) required to switch the device conductance, enabling low-voltage operation. We observe a crossover in hysteresis behavior that varies with film thickness, channel fabrication method, and environmental conditions. Through an investigation of multiple parameters, including fabrication, scandium content, and dimensional scaling, we provide pathways to improve device performance.

Self-powered microelectronics systems generate energy from ambient sources like light, heat or mechanical vibrations using on-chip devices, and the overall system is designed to minimize its power footprint. These systems can be used to build systems that operate autonomously without an external power source. Such systems are of particular interest in edge computing, internet of things devices and remote-sensing technologies, for which replacing or recharging batteries is impractical. Here we report on a monolithic three-dimensional integrated circuit that stacks graphene transistors in the top tier for low-power chemical sensing, complementary logic circuits based on n-type monolayer molybdenum disulfide (MoS2) and p-type bilayer tungsten diselenide (WSe2) in the middle tier for low-power computing, and an on-chip silicon photovoltaic module in the bottom tier to harvest ambient light. The integrated system, which operates solely on ambient light, can distinguish between various chemical solutions and generate corresponding digital codes in a fully sustainable manner. We also demonstrate the dense integration of data and power vias across the tiers and show that the intertier separation can be reduced to 50 nm.

Van der Waals (vdW) heterostructures combining two-dimensional (2D) magnets and semiconducting transition metal dichalcogenides (TMDCs) offer great opportunities to engineer 2D magnetism and develop next-generation spintronic applications. Moreover, magnetotransport phenomena provide deep insights into spin-charge interaction, which are fundamentally important for the design of practical spintronic devices. Here, we report the longitudinal transport properties of epitaxial $\text{Fe}_{5-x} \text{GeTe}_{2}$ (FGT) thin films grown on epitaxial WSe ${ }_{2}$ templates. The FGT/WSe ${ }_{2}$ vdW heterostructures exhibit an antisymmetric magnetoresistance that breaks the expected field symmetry. The occurrence of unconventional antisymmetric and conventional symmetric magnetoresistance is dependent on the FGT thickness, which is further associated with the detailed magnetization switching process. Furthermore, both the resistivity and the magnetoresistance amplitude display two clear transitions as a function of temperature, suggesting sublattice-specific contributions to transport properties. These results demonstrate the rich and complex magnetotransport phenomena in FGT/WSe ${ }_{2}$ vdW heterostructures, offering promising opportunities for designing 2D spintronic devices, such as domain-wall racetrack memories.

Image feature extraction and enhancement are fundamental operations in real-time object detection using convolutional neural networks (CNNs). In conventional architectures, continuous data transfer between sensors, memory, and processing units leads to high energy consumption and latency. In-pixel computing using optoelectronic synaptic (OS) devices offers a promising solution by enabling sensing and computation within the same hardware. However, most OS studies remain primarily device-centric and lack circuit-level considerations necessary for scalable system integration. Here, we present a two-dimensional material-based floating-gate optoelectronic synapse (FG-OS) that integrates device innovation with circuit codesign for CMOS-compatible in-pixel computing. The FG-OS employs large-area monolayer molybdenum disulfide (MoS2) as the photoactive channel and bilayer graphene as the floating gate, enabling high optical responsivity even under low-light conditions. The device exhibits a superlinear photoresponse that intrinsically enhances image contrast during sensing. Importantly, the device supports low-voltage, circuit-friendly analog conductance modulation through fully electrical programming, eliminating the need for optical potentiation and simplifying array implementation. The codesigned architecture encodes 4-bit light-intensity-dependent information (16 levels) with strong robustness against cycle-to-cycle and device-to-device variations. Furthermore, we demonstrate in-pixel convolutional operations, including edge detection, image sharpening, and Gaussian blurring. These results highlight the computational versatility of the FG-OS array and establish a scalable pathway toward in-sensor processing and single-layer CNN architectures for intelligent vision systems.

The combined effects of substrate miscut angle and growth temperature on the epitaxial growth and properties of MoS2 monolayers synthesized by metalorganic chemical vapor deposition (MOCVD) on c-plane sapphire substrates were investigated. Increasing the miscut angle toward the M-axis produces faceted step-terrace surfaces with higher step density and reduced terrace width on the sapphire surface, while promoting pronounced step bunching during growth. These miscut-induced surface reconstructions strongly modulate MoS2 growth, leading to systematic changes in bilayer domain density, size, morphology, and epitaxial alignment without significantly altering the growth rate. Comprehensive structural, optical, and electronic characterizations reveal that growth at 1000 °C on the lowest miscut (0.2°) sapphire yields the highest quality monolayer MoS2, as evidenced by the low full width at half-maximum of the in-plane X-ray diffraction φ-scan peaks, minimized defect-bound exciton emission in photoluminescence spectra at cryogenic temperatures, and superior field-effect transistor performance. In contrast, 1° miscut substrates promote increased bilayer domain density, likely due to increased step bunching of the sapphire, making them suitable for controlled bilayer MoS2 growth. However, further increasing the miscut to 4° or lowering the growth temperature to 950 °C results in significantly degraded structural, optical, and electrical properties. These results highlight the importance of substrate miscut and its role in governing the epitaxial growth of MoS2, offering valuable guidance for the scalable synthesis of high-quality two-dimensional MoS2 films.

Mechanisms of neurotransmitter detection using a two-dimensional MoS2 platform are discussed. Machine learning methods are applied to distinguish the spectra of structurally similar analytes. The attachment of catechol-containing neurotransmitter molecules to a defect-engineered MoS2 is demonstrated, leading to activation of SERS through molecular charge transfer. The SERS effect and selective docking of biomolecules are boosted through introducing sulfur vacancies in MoS2 monolayer films via soft plasma etching. The quality of the defect-engineered material was controlled by Raman, photoluminescence, AFM, and XPS characterization, thus allowing for optimization of the process of defect formation and achieving sensing selectivity. Defect-engineered MoS2 has enabled SERS detection of dopamine and epinephrine down to the sub-nanomolar range (5 × 10-10 M), with strong calibration reliability (R2 = 0.95 and 0.99 for pure samples). The sensor material showed no response to serotonin, confirming the specificity of attachment due to S vacancies, which enables catechol-specific molecular adsorption. PCA-LDA achieved 100% accuracy in distinguishing dopamine and epinephrine, establishing defect-engineered MoS2 as a tunable, low-cost SERS platform for future sensing applications.

An attachment of catechol-containing neurotransmitter molecules is demonstrated on defect-engineered two-dimensional MoS2 platform, leading to activation of SERS due to molecular charge transfer. Mechanisms of neurotransmitters' bio-detection are discussed and Machine Learning methods are applied to distinguish spectra of structurally similar analytes. The SERS effect and selective docking of biomolecules are achieved through an optimized approach for defect engineering: namely, introducing the sulfur vacancies in MoS2 monolayer films via soft plasma etching led to molecular attachment driven by catechol functional groups. The quality of the sensor material was controlled by Raman, photoluminescence, and XPS characterization, thus allowing for optimization of the process of defect formation and achieving sensing selectivity. The sensor material showed no response to serotonin, confirming the specificity of attachment/SERS due to S-vacancies that regulate the strength of catechol-specific molecular adsorption. Defect-engineered MoS2 has enabled SERS detection of dopamine and epinephrine down to the sub-nanomolar range (5×10^-10 M), with strong calibration reliability (R^2 = 0.95 and 0.99 for pure samples). PCA-LDA achieved 100% accuracy in distinguishing dopamine and epinephrine, which establishes defect-engineered MoS2 as a tunable, low-cost SERS platform for future sensing applications.

We report an anomalous photoresponse in LiInP2Se6-gated monolayer MoS2 field effect transistors (FETs), driven by sub-bandgap photocarrier excitation and relaxation in LiInP2Se6. The MoS2/LiInP2Se6 heterostructure exhibits gate-tunable persistent negative photoconductivity, a rare phenomenon in 2D FET platforms. Notably, the photoconductivity change scales with incident light intensity, with weaker illumination producing slower, smaller responses and stronger illumination inducing faster, stronger suppression. Exploiting the nonlinear, intensity-dependent photoresponse of LiInP2Se6, we demonstrate an image-processing platform that enables contrast modulation directly at the sensor level. By varying two controllable parameters, namely, applied top-gate bias and light exposure time, the device response can be tuned to modify the contrast of the image. This intrinsic behavior illustrates how contrast tunability can be achieved on a chip, offering a simple and compact route toward elementary preprocessing functions in vision devices.

Edge contacts offer strong bonding and the potential for lower specific contact resistance to two-dimensional (2D) chalcogenide semiconductors, albeit to a very small area, and they are friendlier to scaling compared to top contacts. Physical vapor deposition (PVD) techniques are often used to fabricate contacts to 2D semiconductors and other electronic devices. However, PVD processes are not as easily scalable for edge contact manufacturing. In this work, we have studied thermal atomic layer deposition (ALD) of TiS 2 using tetrakis (dimethylamido) titanium and hydrogen sulfide for forming uniform and conformal edge contacts on single-layer MoS 2 . Characterization of the TiS 2 was performed using Raman spectroscopy, x-ray photoelectron spectroscopy, and scanning transmission electron microscopy to confirm the contact composition. A contact resistance of 130 Ω·mm was measured with a barrier height of 0.43 eV for the ALD-deposited edge contact TiS 2 /MoS 2 . Thermal ALD processes of the other possible edge contact materials to 2D semiconductors are being developed, including TiN. Furthermore, we have studied a scalable process for multi-tier edge contact fabrication using ALD, which would be more difficult to achieve via PVD, demonstrating the promising potential of ALD for forming electrical contacts to 2D semiconductors. The authors are grateful to NSF (ECCS 2227346), the NSF 2DCC MIP platform (DMR 2039351), and The Pennsylvania State University for support of this work. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

To realize the full potential of GaN high electron mobility transistors (HEMTs), device-level thermal management is necessary by reducing the thermal resistance of the constituent layers, substrate, and interfaces. Accurate time-domain thermoreflectance (TDTR) measurement of a high thermal boundary conductance (TBC) between a high thermal conductivity buffer layer and substrate remains a challenge due to the low measurement sensitivity and the interdependence between thermal resistances associated with the adjacent materials and interfaces during the data fitting process. In this work, a dual-frequency TDTR approach is demonstrated that overcomes this limitation by analyzing the ratio of the TDTR signals acquired from high and low modulation frequency measurements. This TDTR signal-ratio-based approach enables accurate determination of the TBC with high precision by suppressing the measurement sensitivity to parameters other than the TBC that exhibit weak frequency dependence. Using this approach, the measurement uncertainty of the TBC across the GaN/SiC interface improves by more than a factor of two to three compared to that for a conventional TDTR method. The measured high TBC of 420 - 75/ + 105 MW m(-2) K-1 across the GaN/SiC interface agrees with previously calculated values in the range of 480-545 MW m(-2) K-1.

The 2D Crystal Consortium Materials Innovation Platform (2DCC-MIP) is an NSF supported national user facility focused on advancing the synthesis of 2D materials, monolayers, surfaces, and interfaces. The need for the facility to organize and share data with users led to the development of an internal data management and analysis engine, the Lifetime Sample Tracking platform (LiST). This infrastructure allows the automated capture, curation, analysis and dissemination of data ranging from experimental materials synthesis parameters and characterization, to theoretical first-principles and ReaxFF molecular dynamics modeling1. The system currently hosts synthesis and property data (accessible via a REST API) on approximately twenty thousand samples produced by the 2DCC grown using a variety of techniques from bulk crystal growth to metal-organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE), among others. Data used in publications can easily be grouped by the system into data packages that are given digital object identifiers (DOIs) for inclusion with each publication. The LiST platform is now being used by groups outside of the 2DCC as a solution for data curation in materials science. Data management tools such as LiST support the materials development process by allowing a closed loop iteration between synthesis, characterization, theory, and targeted materials design. This also enables machine learning (ML) research, artificial intelligence (AI) analysis, and the potential for autonomous synthesis in the future.

The manipulation of optical properties, including reflection, refraction, polarization, phase, and frequency, has long been central to advancing photonic and optoelectronic technologies. However, existing electro-optical approaches rely on volatile mechanisms that require continuous power consumption. Here, we demonstrate strong, nonvolatile modulation of optical dispersion in monolayer tungsten disulfide (ML WS2) using patterned ferroelectric domains in aluminum scandium nitride (AlScN). By locally poling ferroelectric domains into opposite states, we achieve substantial manipulation of the complex refractive index (Delta n > 0.7, Delta k > 0.4) and excitonic energy shifts ( 50 meV) in ML WS2, comparable to previous gate-tuning approaches while eliminating continuous power consumption. We introduce an asymmetric screening model that reveals how ferroelectric polarization induces carrier-density-dependent Coulomb screening, leading to distinct excitonic behaviors between electron- and hole-doped regions. Furthermore, we demonstrate a gate-free lateral p-n homojunction with a rectification ratio of 6e10^3, formed through spatial carrier redistribution. These findings establish ferroelectric/2D heterostructures as a powerful platform for nonvolatile optical dispersion engineering, enabling energy-efficient, reconfigurable photonic and optoelectronic devices.

Miscut (100) gallium oxide (beta-Ga2O3) substrates have emerged as an attractive orientation for growth of homoepitaxial layers with a low defect density, smooth surface morphology, and comparatively high mobility. While previous studies used phosphoric acid (H3PO4) etching and O-2 annealing to prepare Mg-doped, miscut (100) substrates for epitaxial growth, significant surface roughening was observed when implementing these conditions for substrates with other dopant types in this work. The surface preparation steps were systematically evaluated for both insulating, Fe-doped and conductive, Sn-doped beta-Ga2O3 substrates. A smooth surface topography (Sq/rms <0.2 nm) with uniform step edges was obtained after annealing each type of substrate at 850-900 degrees C in a pressure range achievable with typical vapor-phase epitaxy systems. By keeping the O-2 partial pressure (PO2) sufficiently low during the annealing step, surface conductivity was also maintained for the Sn-doped substrates. Comparing the annealing results with previous density functional theory (DFT) and experimental defect studies, this work suggests that the surface step formation and overall ordering mechanism is influenced by the concentration of Ga vacancies (V-Ga) and impurities that can occupy, form defect complexes, and/or diffuse via these sites. Further reduction in the average surface roughness (Sq/rms <0.15 nm) was also demonstrated using a dilute tetramethylammonium hydroxide (TMAH) etching step for both types of substrates prior to annealing. Following surface preparation, epitaxial growth was demonstrated on the miscut (100) substrates with a growth rate of >2 & micro;m/hour and an average surface roughness of similar to 0.6 nm Sq/rms. Overall, this study establishes processes for preparing both insulating and conductive, miscut (100) beta-Ga2O3 substrates with vicinal surfaces suitable for epitaxial growth.

Two-dimensional (2D) semiconductors are promising for next-generation field-effect transistors (FETs), but their integration into complementary-metal-oxide-semiconductors (CMOS) logic is hindered by improper threshold voltages ( V t h ), leading to excessive power consumption. While past efforts have focused on improving gate electrostatics and near-ideal subthreshold swing ( S S ), systematic V t h engineering in 2D FETs remains unexplored. Here, we investigate high-κ van der Waals (vdW) dielectrics including metal oxyhalides such as LaOBr, BiOBr, and BiOCl, and bimetallic thiophosphates such as LiInP2S6 (LIPS), LiInP2Se6 (LIPSe) and CuInP2S6 (CIPS), and demonstrate that bimetallic thiophosphates enable programmable and non-volatile V t h tuning in both n-type monolayer MoS2 and p-type bilayer WSe2 FETs. Leveraging ion-mediated V t h tuning, we realize 2D CMOS inverters with nearly three orders of magnitude reduction in static power while maintaining high switching speed. Combining experiments with industry-compatible SPICE modeling, we identify an optimal V t h window that minimizes power with negligible delay overhead, enabling built-in power gating and improved power-performance-area metrics without additional sleep transistors.

Static Random-Access Memory (SRAM) cells are fundamental in computer architecture, serving crucial roles in cache memory, buffers, and registers due to their high-speed performance and low power consumption. However, scaling SRAM cells to advanced technology nodes poses significant challenges. Three-dimensional (3D) integration offers a promising solution for reinstating SRAM scaling by vertically stacking devices, thereby reducing the physical footprint. In this study, we demonstrate approximately 40% reduction in cell area and improved interconnect length for 3D SRAM cells constructed from field-effect transistors (FETs) based on monolayer MoS2, compared to the planar design. Using the layout for the 450 nm technology node, our 2-tier 3D SRAM design achieves better integration density than the planar 350 nm node. Furthermore, we project up to 70% reduction in cell area for 3-tier 3D SRAM cells, closely matching the cell area of the planar 250 nm node. We have successfully realized 1 kilobit of planar SRAM and 2-tier 3D SRAM cell arrays occupying areas of 0.0358 mm² and 0.0251 mm², respectively, each comprising 6144 MoS2 FETs. Finally, we project the footprint advantage for 3D SRAM cells at scaled technology nodes. Our demonstration highlights the potential of 3D integration of 2D FETs in advancing SRAM technology.

The advent of 2D materials has revolutionized condensed matter physics and materials science, offering unprecedented opportunities to explore exotic physical phenomena, engineer novel functionalities, and address critical technological challenges across diverse fields. Over the past two decades, the exploration of 2D materials has expanded beyond graphene, encompassing a vast library of atomically thin crystals and their heterostructures. These materials exhibit extraordinary electronic, optical, thermal, mechanical, and chemical properties, and hold promise for breakthroughs in electronics, optoelectronics, quantum technologies, energy storage, catalysis, thermal management, filtration and separation, and beyond. Many exciting new physics and phenomena continue to emerge, while select 2D materials, such as graphene, h-BN, and the semiconducting transition metal dichalcogenides (TMDCs), are transitioning from laboratory-scale demonstrations to industrial applications. In this context, a holistic understanding of synthesis, structure-property relationships, integration, and performance optimization is essential. This roadmap reviews the multifaceted challenges and opportunities in 2D materials research, focusing on the synthesis, properties and applications of representative systems including graphene and its derivatives, TMDCs, MXenes as well as their heterostructures and moiré systems.

The 2D ferroelectric semiconductor α-In2Se3 offers compelling opportunities for next-generation ultrathin electronics, but the controllable growth of a monolayer with large-scale uniformity and single phase has proven challenging. Here, we demonstrate the pseudosymmetry epitaxial growth of a uniform centimeter-scale α-In2Se3 monolayer by leveraging a fluorophlogopite mica (F-mica) substrate with its pseudohexagonal surface atom configuration, in a confined space chemical vapor deposition setup. Transmission electron microscopy and in-plane XRD reveal the pseudohexagonal symmetry of an F-mica surface and establish the in-plane epitaxial relation of (100) α-In2Se3∥(010) F-mica with a 4 × 4 α-In2Se3 unit cell matching the 3×3 F-mica surface. Second-harmonic generation and piezoresponse force microscopy confirm the homogeneity and polarization of the films. A ferroelectric semiconductor junction array based on the α-In2Se3 films exhibits consistent and reliable multipattern memorization and an enhanced On/Off ratio over 105. Our strategies offer critical insights into pseudosymmetric epitaxy of 2D materials and pave the way for advanced ultrathin ferroelectric memory technologies.

As silicon reaches its scaling limits, two-dimensional materials are a promising route for further transistor miniaturization. Advances in contact engineering, channel length (LCH) scaling and high-κ dielectric integration have led to impressive two-dimensional transistor performance, but challenges remain, including high off-state leakage currents due to negative threshold voltage values and high contact resistances as contact length (LC) is reduced. A monolayer-centric approach has also limited the exploration of the advantages that few-layer (two to three) materials may offer. Here we show that industry-compatible metal–organic chemical vapour deposition can be used to grow wafer-scale molybdenum disulfide (MoS2) and fabricate transistors with LCH and LC scaled to 35 nm and 30 nm, respectively. We integrate a high-κ gate dielectric with an equivalent oxide thickness of less than 2.5 nm and create monolayer, bilayer and trilayer MoS2 transistors. The scaled trilayer transistors exhibit an on-state current of 220 µA µm−1, a positive threshold voltage and off-state current below 10 pA µm−1 at zero gate bias. Trilayer MoS2 transistors show enhanced performance compared with monolayer devices at scaled LC due to a shorter transfer length and lower Schottky barrier height. To illustrate the reliability and reproducibility of the approach, we provide statistics for approximately 1,000 scaled devices. Molybdenum disulfide transistors made with an industry-compatible metal–organic chemical vapour deposition method can exhibit both high on-state and low off-state currents with a channel length of 35 nm and contact length of 30 nm.