In this paper, the impact of the rerouting of the back end of line (BEOL) on the occurrence of single event latchup (SEL) in a readout integrated circuit (ROIC) of cooled infrared detectors is presented and discussed. Heavy ions tests have been performed for different temperatures. The change in the BEOL design is investigated by simulation tools. Experimental data and simulation demonstrate that rerouting of the BEOL does not impact the SEL sensitivity of the CMOS device.

In this work, the radiation responses of 0.25 mu m bulk transistors irradiated up to 300 krad are discussed. The electricals characteristics shown are measured after irradiation at 95 K, 150 K, and 300 K. The transconductance improves significantly with total ionizing dose (TID) at low temperature and does not vary at room temperature. The impact of incomplete ionization of impurities introduced into the Lightly Doped Drain extensions is examined. Since the transconductance increase is more pronounced for the shortest transistors, positive charges trapped in spacer oxides are likely to constitute the source of this increase. The Technology Computer-Aided Design simulations help us to discuss the influence of charge build-up at the spacers' locations on the drain to source resistance. By the means of a resistivity analysis, the influence of LDD doping level and operating temperature on the TID response of devices is analyzed. Its potential evolution with technological integration is investigated.

This work presents electricals characteristics of primary and secondly irradiated MOSFET transistors. Secondly irradiated transistors after nominal operation recovery showed a great TID resistance betterment. This improvement is allowed by latent interface traps charge build-up during long time annealing. Latent interface traps effects on electrical degradation at STI level are physically explained with simulation and experiment comparison.

This paper presents a total ionizing dose (TID) modeling approach based on experimental Cobalt60 irradiations of n-MOS and p-MOS transistors. The TID models were developed for the investigation of complementary metal oxide semiconductor (CMOS) gates performances used in a readout integrated circuit (ROIC) at cryogenic temperatures.

A large set of InGaAs photodiodes from different manufacturers has been irradiated with electrons of 0.5-20 MeV, with protons of 60, 100, and 170 MeV, and with atmospheric-like neutron spectrum. Depending on the type of incident particles and energy, the deposited damage dose has been evaluated in the similar to 5 x 10(6) to 5 x 10(9) MeV/g range. The dark current damage factor has been extracted from measurements at different fluence levels. The dark current data right after irradiation and 2 months later allow for evaluating any possible annealing processes. The damage factor measured after about 2 months has been scaled with nonionizing energy loss (NIEL). Finally, the validity of NIEL scaling is discussed for InGaAs materials.

Space systems are subject to space radiative environment, and potentially to radiations injected in low earth orbit by the explosion of nuclear weapons. Optoelectronic components of space systems are sensitive to the radiation induced degradation of the semiconductor material. This paper presents recent results obtained during a study funded by the EDA [1] (European Defense Agency): JIP-ICET2 A-1341-RT-GP within the CapTech Technologies for Components and Modules' (TCM) in EDA. (Tracking #: SD102-11).

This paper presents a modeling approach of single-event functional interrupt (SEFI) which takes into account all the physical and electrical processes from the radiation particle down to the event at the system level. This paper is focused on the evaluation of SEFI sensitivity by experimental and simulation analyses of a readout integrated circuit (ROIC) designed by Sofradir for their infrared image sensors. Relevant correlations between simulation and experimental results of SEFI cross sections for heavy ions are presented and discussed. The simulation results confirm the strong SEFI robustness of the ROIC at 57 K.

This paper presents a compact model of latchup considering design and process dependence. The new approach is more realistic and inspirited from the classical model. This model was used to confirm the single-event latchup (SEL) robustness of D-flip-flops (DFFs) used in Readout Circuit of Infrared-sensors developed by Sofradir. SEL cross sections are presented by the mean of the Monte Carlo tool MUSCA SEP3 in order to validate the new latchup modeling approach.

Space system undergo particularly hard natural radiation environment, but can also potentially be subject to the radiations injected in low earth orbit by the explosion of a nuclear weapons. The increasing use of optoelectronic components in space systems makes the risk assessment regarding the radiation effects of an increasing interest. This paper presents recent results about the degradation of optoelectronic devices in term of atomic displacements. This paper Most of this work has been developed under the EDA contract JIP-ICET2 A-1341-RT-GP within the CapTech Technologies for Components and Modules' (TCM) in EDA. (Tracking #: SD102-11)

This paper highlights the impact of design on the single-event upset (SEU) sensitivity of D-flip-flops (DFFs) used in a readout circuit (ROIC) under heavy ions. New experimental data obtained at the University of Louvain for several designs are presented. The single-event effect (SEE) prediction tool multiscale single event phenomena predictive platform is used to investigate the failure occurrences at the circuit level as a function of the design. In some cases, design specificities allow for increasing in the SEU robustness of the DFF. However, it appeared that cryogenic temperatures limit the impact of the design on the SEU sensitivity of DFFs. The results show a very limited impact of the temperature on the SEU occurrence, independent of the layout. These results are consistent with the experimental data presented in recent works regarding single-event transient and single-event functional interrupt. These results allow for performing irradiation tests of complementary metal-oxide-semiconductor IR detector (ROIC) at room temperature instead of cooling down the device during the SEE measurements.

This paper presents the impact of cryogenic temperatures, down to 50 K, on the single-event transient (SET) sensitivity of two readout circuits of infrared image sensor designed by Sofradir. Experimental SETs data obtained under heavy ions at the Université Catholique de Louvain la Neuve facility are described, and the temperature impact on the SET cross sections is presented. The analysis of experimental sensitivity trends is completed by means of MUSCA SEP3 tool.

This paper presents a physical investigation of the mechanisms induced by the low temperature on single-event latchup in CMOS inverters for a range of technology nodes (250 nm from Sofradir and 180 nm from IBM). For the first time, the TCAD simulations show a good agreement of latchup characteristics with the experimental measurements at cryogenic temperatures. Additionally, a more robust technology provided by Sofradir was demonstrated.

This work presents the measurements of single event transients and functional interrupts on two designs of readout integrated circuit under a heavy ions beam at cryogenic temperatures. The temperature dependence of the SEFI occurrence is limited.

This work presents a SEE prediction tool called MUSCA SEP3 and its interest in failure investigatio ns and in providing a help for designers with the aim to o ptimize the SEE sensitivity of Sofradir readout circuit. Es timations and a failure analysis at circuit level were presen ted. Comparisons between predictions and experimental da ta obtained under heavy ion are consistent. The analys is of critical areas of the DFF design allows to propose hardening techniques with the aim to reduce the SEE sensitivity of the D Flip-Flop (DFF) of the reado ut circuit.

This paper presents a physical investigation of the mechanisms induced by the low temperature on Single-Event Latchup in CMOS inverters for a range of technology nodes (250 nm from Sofradir and 180 nm from IBM). For the first time, the TCAD simulations show a good agreement of Latchup characteristics with the experimental measurements at cryogenic temperatures. Additionally, a more robust technology provided by Sofradir was demonstrated.

Ces travaux presentent une etude par simulation composant des caracteristiques electriques d'un inverseur CMOS (Complementary Metal-Oxide Semiconductor) vis a vis du phenomene Latchup (SEL) en utilisant le simulateur TCAD Sentaurus du logiciel Synopsys. Les mecanismes de declenchement du phenomene Latchup ont ete etudies et ont permis de deduire des tendances de sensibilite en fonction des parametres geometriques de l'inverseur CMOS. Une analyse physique specifique des mecanismes en tres basse temperature a conduit a definir un ensemble de modeles physiques (Shallow Level Impact Ionization, etc) necessaire a la modelisation de l'accroissement inattendu de la sensibilite SEL. Les resultats en basse temperature ont montre une tres bonne adequation avec les mesures experimentales.

This paper presents for the first time the impact of cryogenic temperatures, down to 77 K, on the SEU sensitivity of D-Flip-Flop (DFF) of infrared image sensor. Estimations and a failure analysis at circuit level are presented and investigated considering the stored data configuration and the temperature. The comparisons with experimental data obtained under heavy ion at UCL are presented and consistent. A good correlation of SEU cross sections is revealed. A saturation effect is observed below 200 K.

Silicon transistor test vehicles used in infrared detectors were exposed to total dose at cryogenic temperatures. We present the degradation of the leakage current and threshold voltage of different transistor topologies at different dose rates and temperatures. The results show that the degradation occurs in the lateral parts of the transistors. Moreover, a different degradation was observed at 83 and 108 K. The higher temperature corresponds to the higher degradation; this can be explained by a more efficient hole transport process at these temperature. Measurements during the warming process of the devices show that a competition exists between the hole transport and their annealing, suggesting that a worst case of degradation could be found between nitrogen and room temperature.

Predicting the low-dose-rate degradation of bipolar technologies is one of the main issues for circuits intended for use in the ionizing-radiation environment of space because of the enhanced low-dose-rate sensitivity (ELDRS). In this letter, ELDRS is shown to be related to competition between trapping and recombination of radiation-induced carriers in the oxide. The presented model is shown to be in good agreement with experimental data. It is also shown that this effect is strongly dependent on the oxide quality.