Following the successful introduction of the high voltage Soft-Punch-Through (SPT) IGBT range, ABB now introduces the next generation of planar IGBTs employing the newly developed SPT technology. The new IGBTs exhibit significantly reduced on-state losses while maintaining low turn-off losses; smooth switching waveforms and a benchmark SOA performance associated with the well-established SPT IGBTs.

A new high voltage IGBT and diode capability are presented,the newly developed devices exhibit low losses and de-sign platform exhibiting the highest SOA limits achieved to date.We demonstrate for the first time,low loss IGBT and diode chip-sets with voltage ratings ranging from 3.3～6.5 kV capable of withstanding both dynamic avalanche and what we refer to as the switching-self-clamping-mode(SSCM);hence,resulting in a clear breakthrough in SOA capability for high voltage devices.

The aim of this work is to demonstrate that future high power IGBT modules will be capable of providing electrical performance not matched to date in terms of low losses, soft turn-off characteristics, square RBSOA, and full over-current and over-voltage self-protection mechanisms under fault conditions. First ever prototype modules were fabricated incorporating heavily paralleled 3300V chips employing the next generation enhanced-planar IGBT (EP-IGBT) technology and the field charge extraction diode (FCE) concept. In this paper, we show that the two technologies will provide the module with outstanding characteristics, therefore promising higher levels of performance in tomorrow's applications. In addition, we present a set of results where two 3300V IGBT modules were tested in parallel under extreme RBSOA conditions with a forced temperature difference of up to 100 degC. The modules were capable of turning off 6000A at a DC-link voltage of 2600V in spite of the temperature induced current mismatch and associated redistribution mechanisms

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In this paper, we study the switching-self-clamping-mode "SSCM" in high voltage IGBTs in terms of device physics and circuit operation. We present analysis for the HV-IGBT failure mode when operating in SSCM due to an unstable negatively damped system and the design consideration taken into account for avoiding such mode of operation. This enables the introduction of an over-voltage protection feature during device turn-off to add to the existing over-current protection capability under short circuit conditions.

A novel press pack IGBT (PPI) with a rating of up to 4500 V and 2000 A is presented. During the development of this new component, special emphasis was placed on the ease of use by system manufacturers. The mechanical design is optimized in order to facilitate the clamping of the PPI in long stacks. Even if the clamping in the stack has severe pressure nonuniformities, the PPI remains fully functional due to its unique design with individual press-pins for each chip. Furthermore, the choice of materials is optimized to achieve high reliability in the field. The trade-off between power-cycling capability and operation under shorted conditions was a major thrust of the development. The IGBT as well as the diode chip are based on SPT (soft punch through) technology. Together with an advanced planar cell design of the IGBT and the sophisticated lifetime engineering of the diode, this chip set offers an unprecedented safe operating area (SOA). This greatly facilitates system design by making clamps or snubbers obsolete.

In this paper, we present a new high voltage IGBT and diode design platform exhibiting the highest SOA limits achieved to date. We demonstrate for the first time, low loss IGBT and diode chip-sets with voltage ratings ranging from 3.3 kV to 6.5 kV, capable of withstanding both dynamic avalanche and what we refer to as the switching-self-clamping-mode; hence, resulting in a clear breakthrough in SOA capability for high voltage devices.

Two important design aspects encountered in IGBT press pack modules used for HVDC applications are short circuit failure mode (SCFM) and intermittent operating life (IOL) capabilities. The requirement that press-pack IGBT (PPI) fail safely into a short causes a design conflict with the module's desired capability to survive a high number of power cycles in normal operation. An innovative materials design to optimize this trade-off is described. The failure mechanism that leads to an open circuit after the PPI has operated extensively in SCFM was found to be liquid metal corrosion of the baseplate followed by the formation of intermetallics with poor conductivity and silicone gel degradation. The beneficial effects of dry interface plating materials to avoid thermomechanical fatigue under IOL conditions are described.

Requirements on semiconductor ratings and characteristics are established based on demands of voltage and current source inverters. Fundamental parameters such as blocking characteristics and safe operating area have been measured on 10 kV pin diodes and IGBTs and IGCTs for 4 kV DC link voltage to estimate the potential of these devices in the application.

In this paper, we demonstrate for the first time, a planar high voltage IGBT and freewheeling diode chip set with a blocking capability exceeding 8000V. The main aim is to show that a high performance IGBT can be achieved at this voltage level by implementing the "Soft-Punch-Through" (SPT) concept. Details of the IGBT and diode design and performance are presented. This includes, experimental results for the static and dynamic characteristics under normal and SOA conditions, detailed trade-off curves for a number of design parameters, and cosmic ray induced failure results for the IGBT and diode.

In order to find the optimum solution for 6.9 kV medium voltage drives (MVD) and power quality applications, IGCT devices with a blocking voltage of up to 10 kV were investigated by numerical device simulation. With such devices, the complicated series connection can be avoided. The new devices fulfill all requirements, including cosmic ray stability, and operation without turnoff snubber. In addition, the maximum output power of a three-level inverter equipped with 10 kV IGCTs was calculated. With careful device design, an apparent output power of the inverter of 5 MVA with a single IGCT switch per position is feasible.

With the concept of the transparent anode GTO (TGTO) it is possible to decouple the IGT from other performance parameters. The key features of the TGTO are a buffer layer and a low-efficiency anode. By diffusing small shorts into the anode layer it becomes possible to adjust; the I-GT without affecting the conduction or switching behavior. The very low losses of the non-shorted TGTO devices are fully preserved. We have fabricated and characterized such devices with different shorting schemes and present the experimental results in this paper.

A new type of full scale 4.5 kV/3 kA GTO has been developed, fabricated, and electrically characterized. The device utilizes a punchthrough concept with a buffer layer. To avoid the requirement of excessive gate currents for turn-on, the new GTO has a homogeneous anode layer without shorts. The anode has a very low efficiency, which allows efficient extraction of charge during turn-off. With the buffer layer, the new device has a significantly reduced wafer thickness as compared to conventional devices without buffer. This reduces switching as well as on-state losses. The turn-off losses of the best devices were reduced to one third of those of conventional GTOs and, at the same time, the on-state losses were decreased by more than one third.

Using a novel concept for the anode of GTO devices, the authors have developed, manufactured, and characterized full scale 4.5 kV/3 kA GTO thyristors. Utilizing a buffer layer and a transparent anode, these devices have extremely low conduction and switching losses. In this work, simulation results of 7 kV/3 kA GTO structures with a homogeneous transparent anode and a buffer layer are presented. By applying the design criteria given in the paper, 7 kV/3 kA GTO structures can be proposed, which have on-state and conduction losses comparable to those of state-of-the-art 4.5 kV/3 kA GTO thyristors

A possible cause for IGT drift in GTO thyristors has been identified using numerical 2D device simulation. An increase of the surface recombination velocity under the oxide between the gate and cathode contacts leads to a small degradation of the upper npn transistor gain, which in turn rises the IGT. This work focuses on the requirements on the geometrical discretization and on the procedure to extract the DC current gains of the individual transistors that form the GTO thyristor.

In order to help improve performance, size and cost of high power electronic systems, the development trend of power semiconductor devices continues towards achieving even higher blocking capabilities. This trend is fuelled by a number of applications in the fields of traction systems, industrial applications and HVDC converters. Also, new emerging high voltage markets such as pulse power applications are looking more likely to exploit the benefits of the newly developed high voltage devices. In this paper, we continue to follow the development trend by demonstrating a new range of IGBT, IGCT and their associated freewheeling diodes with blocking capabilities exceeding 8000V.