In this paper, we provide an overview and comparison of devices used for optical waveguide-to-waveguide coupling including inter-chip edge couplers, grating couplers, free form couplers, evanescent couplers, cantilever couplers, and optical wirebonds. In addition, technology for efficient transmission of light through chips is discussed including guided mode and free form photonic vias for substrates including silicon, glass, and organics. The results are discussed in the context of potential applications including co-packaged optics switch packages, replaceable biochemical sensors, optically connected memory, optical computing, integrated quantum photonics, and integrated LiDAR systems to show possible improvements in energy efficiency, performance, and cost.

The transition towards designs which co-package electronic and photonic die together in data center switch packages has created a scaling path to Petabyte per second (Pbps) input/output (I/O) in such systems. In a co-packaged design, the scaling of bandwidth, cost, and energy will be governed by the number of optical I/O channels and the data rate per channel. While optical communication provide an opportunity to exploit wavelength division multiplexing to scale data rate, the limited 127 µ m pitch of V-groove based single mode fiber arrays and the use of active alignment and bonding for their packaging present challenges to scaling the number of optical channels. Flip-chip optical couplers which allow for low loss, broadband operation and automated passive assembly represent a solution for continued scaling. In this paper, we propose a novel scheme to vertically couple between silicon based waveguides on separate chips using graded index couplers in combination with an evanescent coupler. Simulation results using a 3D finite-difference time-domain solver are presented, demonstrating coupling losses as low as 0.35 dB for a chip-to-chip gap of 11 µ m; 1 dB vertical and lateral alignment tolerances of approximately 2.45 µ m and ± 2.66 µ m, respectively; and a possible 1 dB bandwidth of greater than 1500 nm. These results demonstrate the potential of our coupler as a universal interface in future co-packaged optics systems.

Silicon nitride (SiN) waveguides are valued in integrated photonics for their broad transparency, low losses, and CMOS compatibility, enabling scalable device fabrication [1]. However, their low Kerr nonlinearity limits applications like frequency combs and four-wave mixing. Hybridization with different materials, such as chalco-genide glasses, oxides, semiconductor carbon nanotubes (CNTs), and more, are promising solutions, since they provide high Kerr coefficients and low two-photon absorption. The advantage of the latter material is the chirality-dependent nonlinear optical properties [2].

Silicon nitride photonic integrated circuits were fabricated on glass substrates for the first time using reactive ion etched edge facets, demonstrating a minimum propagation loss of 2.4 ± 0.36 dB/cm and minimum edge coupling loss of 2.17 ± 0.79 dB.

A passively assembled chip-to-package substrate evanescent coupler between silicon nitride and silicon was experimentally demonstrated across the 1480-1640 nm wavelength regime with a 0.39 ± 1.06 dB coupling loss at 1550 nm, a 160 nm 1-dB wavelength tolerance (1480-1640 nm), and a 1-dB lateral alignment tolerance of ± 1.56 𝜇𝜇m. The thermal stability was evaluated from 23-60°C with average coupling loss and alignment tolerance varying by less than ± 0.35 dB and ± 30 nm, respectively. The repeatability of the packaging process flow was also evaluated by measuring coupler performance across four separately packaged systems, with a total range of 1.5 dB for coupling loss observed. Results show the viability of this coupler to help achieve Pbps co-packaged optics switch performance by eliminating active fiber-to-chip alignment and scaling down optical input/output pitch at the die level.

A chip-to-chip coupler between silicon nitride and silicon was experimentally demonstrated between 1480–1640 nm with an average coupling loss of 0.73 ± 0.92 dB and an average 1-dB alignment tolerance of 1.38 ± 0.24 μ$m$. The coupler also showed less than a ± 0.35 dB change for temperatures from 23-60° C and a 1.5 dB range across four packages.

A silicon oxynitride graded index coupler was designed to connect silicon nitride waveguides on separate chips, demonstrating a simulated coupling loss of 0.45 dB and a 1-dB alignment tolerance of ± 2.3 μm at 1550 nm for an 11 μm vertical chip-to-chip gap.

A graded index optical coupler was designed to connect silicon oxynitride photonic waveguides on separate chips, or between a chip and an interposer, demonstrating a simulated coupling loss of 0.37 dB and 0.42 dB at 1550 nm and 1310 nm wavelength, respectively, for an 11 𝜇m vertical chip-to-chip gap. A robust 1-dB lateral and vertical alignment tolerance of ± 2.66 𝜇m and 2.45 𝜇m, respectively, at 1550 nm wavelength were also demonstrated, allowing for high speed, automated pick-and-place die bonders to be used for passive assembly of photonic chips. In addition, the same coupling design was simultaneously used for fiber-to-chip coupling, showing the potential of the coupler to act as a universal photonic packaging interface. When simulating coupling to a standard flat-faceted SMF-28 fiber at 1550 nm and 1310 nm wavelength,coupling losses of 0.62 dB and 0.46 dB, respectively, were observed. The fiber-to-chip coupling simulations also demonstrated wide 1-dB alignment tolerances of ± 2.88 𝜇m laterally and ± 2.58 𝜇m vertically at 1550 nm wavelength. The device was also ultra-broadband, demonstrating a simulated 1-dB wavelength tolerance of over 1400 nm for both fiber-to-chip and flip-chip optical coupling, showing low loss across nearly the entire near infrared spectrum. Alongside simulations, CMOS foundry compatible fabrication processes were established to deposit, pattern, and etch greater than 10 𝜇m thick silicon oxynitride graded index lenses on silicon and glass substrates. The simulation and fabrication results, combined with a relatively compact footprint allowing for pitches down to 20 𝜇m, may enable Petabyte per second optical I/O - a critical need for data center co-packaged optics based Ethernet switch systems within the next decade.

Silicon nitride photonic integrated circuits were fabricated on glass substrates for the first time using reactive ion etched edge facets, demonstrating a minimum propagation loss of 2.4 ± 0.36 dB/cm and minimum edge coupling loss of 2.17 ± 0.79 dB. Two sets of processes were developed: one including high temperature steps (T > 350°C) common to complimentary-metal-oxide-semiconductor (CMOS) foundry front-end-of-line tools and one including low temperature steps (T < 350°C) compatible with CMOS foundry back-end-of-line tools. For both the high and low temperature samples, a CMOS foundry compatible process was also established for dry etching edge facets > 85 𝜇m deep into SiO2 substrates using magnetically enhanced reactive ion etching with amorphous silicon hard masks without metal. Results show the viability of this glass interposer to help achieve Pbps co-packaged optics switch performance by addressing the material limitations of organic or silicon based interposers and enabling pick-and-place assembly of photonic die to package level integrated photonic waveguides.

A novel ZnTe-on-SiN waveguide system is presented and demonstrates a negligible TPA coefficient with a comparable nonlinear Kerr refractive index to conventional pure silicon to enable efficient nonlinear devices with minimal absorption loss.

As silicon photonics transitions from research to commercial deployment, packaging solutions that efficiently couple light into highly compact and functional sub-micrometer silicon waveguides are imperative but remain challenging. The 220 nm silicon-on-insulator (SOI) platform, poised to enable large-scale integration, is the most widely adopted by foundries, resulting in established fabrication processes and extensive photonic component libraries. The development of a highly efficient, scalable, and broadband coupling scheme for this platform is therefore of paramount importance. Leveraging two-photon polymerization (TPP) and a deterministic free-form micro-optics design methodology based on the Fermat’s principle, this work demonstrates an ultra-efficient and broadband 3-D coupler interface between standard SMF-28 single-mode fibers and silicon waveguides on the 220 nm SOI platform. The coupler achieves a low coupling loss of 0.8 dB for the fundamental TE mode, along with 1 dB bandwidth exceeding 180 nm. The broadband operation enables diverse bandwidth-driven applications ranging from communications to spectroscopy. Furthermore, the 3-D free-form coupler also enables large tolerance to fiber misalignments and manufacturing variability, thereby relaxing packaging requirements toward cost reduction capitalizing on standard electronic packaging process flows.

Lead poisoning is an ongoing public health crisis. We present the foremost development of a lead-selective crown ether/silicon photonic platform. We envisage the potential application of this technology to safeguard against pervasive societal lead poisoning.

We report on the design and experimental verification of backend-compatible free-form reflectors designed for Si waveguides. Losses as low as 0.8 dB and 1-dB bandwidths exceeding 180 nm combined with high alignment tolerances were demonstrated. © 2024 The Author(s)

A passively assembled chip-to-interposer evanescent coupler between silicon nitride and silicon was experimentally demonstrated with a 0.33 ± 1.03 dB coupling loss at 1550 nm, a 160 nm 1-dB wavelength tolerance (1480–1640 nm), and a 1-dB lateral alignment tolerance of ± 1.56 μ m. The thermal stability was evaluated from 23–60 ^∘ C with average coupling loss and alignment tolerance varying by less than ± 0.35 dB and ± 30 nm, respectively. Finally, repeatability was evaluated across four packaged systems, demonstrating a coupling loss range of 1.5 dB. Together, these results show this coupler can help achieve future Pbps co-packaged optics input/output.

The co-packaging of optics and electronics provides a potential path forward to achieving Pbps per package data capacities. In a co-packaged design, the scaling of bandwidth, cost, and energy is governed by the number of optical tranceivers per package as opposed to transistor shrink. The scaling of optical transceivers is hindered by the need to actively assemble bulky single mode fiber arrays directly to optical transceivers. The development of efficient, dense optical couplers with wide alignment tolerances allowing for automated, passive assembly will be an enabler for continued scaling in co-packaged designs. To this end, a passively assembled substrate-to-die evanescent coupler between silicon nitride and silicon was experimentally demonstrated with a 0.39 +/- 1.06 dB coupling loss at 1550 nm, a 160 nm 1-dB wavelength tolerance (1480-1640 nm), and a 1-dB lateral alignment tolerance of +/- 1.56 mu m. The thermal stability was evaluated from 23-60 degrees C with average coupling loss and alignment tolerance varying by less than +/- 0.35 dB and +/- 30 nm, respectively. Finally, repeatability was evaluated across four packaged systems, demonstrating a coupling loss range of 1.5 dB. Together, these results show this coupler can help achieve Pbps co-packaged optics input/output (I/O) within a sustainable envelope.

An experimentally demonstrated, vertical chip-to-chip evanescent coupler between silicon nitride (Si₃N₄) and silicon (Si) is presented with the coupler loss measured to be 0.39 ± 1.06 dB at 1550 nm with a 1-dB bandwidth of 160 nm extending across the C-band, S-band, and L-band (1480-1640 nm). The average coupling loss was determined to be 0.73 dB for the 1480-1640 nm wavelength range with a ± 2σ tolerance of ± 0.92 dB. The 1-dB lateral alignment tolerance was 1.56 ± 0.14 μm at 1550 nm and the average tolerance was 1.38 ± 0.24 μm across the 1480-1640 nm wavelength regime. In addition, the average coupling loss varied by less than ± 0.35 dB and the average 1-dB alignment tolerance varied by less than ± 30 nm for temperatures varying from 23-60°C. Finally, the average coupling loss range was less than 1.5 dB range across four sets of identically packaged die. This is the first experimental demonstration of an inter-chip, passively assembled evanescent coupler using standard CMOS foundry processes for directly coupling between Si and Si₃N₄, overcoming a waveguide refractive index difference of Δn = 1.32 without requiring taper tip widths of less than 100 nm.

Lead (Pb2+) toxification is a concerning, unaddressed global public health crisis that leads to 1 million deaths annually. Yet, public policies to address this issue have fallen short. This work harnesses the unique abilities of crown ethers, which selectively bind to specific ions. This study demonstrates the synergistic integration of highly-scalable silicon photonics, with crown ether amine conjugation via Fischer esterification in an environmentally-friendly fashion. This realizes an integrated photonic platform that enables the in-operando, highly-selective and quantitative detection of various ions. The development dispels the existing notion that Fischer esterification is restricted to organic compounds, facilitating the subsequent amine conjugation for various crown ethers. The presented platform is specifically engineered for selective Pb2+ detection, demonstrating a large dynamic detection range, and applicability to field samples. The compatibility of this platform with cost-effective manufacturing indicates the potential for pervasive implementation of the integrated photonic sensor technology to safeguard against societal Pb2+ poisoning. Lead toxification in society is a public health crisis. The exposure to lead poisoning gives rise to a multitude of health issues. In this work, a chip-scale photonic platform that enables the highly quantitative detection of lead is demonstrated.

Recent advances towards the loss reduction in silicon nitride (SiN) has increased its interest as a material platform compatible with complementary metal-oxide-semiconductor (CMOS) processing [1]. SiN offers a large transparency range reducing multiphoton absorption processes, yet its nonlinear Kerr coefficient remains about 10 times lower than that of Silicon. Now, the new coming challenges in the development of optical integrated devices rise the need for highly nonlinear CMOS-compatible optical platforms based on hybrid waveguide structures. Hereafter we report on the properties of nonlinear hybrid SiN waveguides with a Ge 23 Sb 7 S 70 (GSS) chalcogenide glass cladding of layer thickness comprised between 100 and 200 nm. Using a bi-directional spectral broadening based method, we demonstrate that hybrid SiN waveguides with a 200 nm thick GSS cladding reach an effective nonlinear refractive index $n_{2} = 0.8\pm 0.2 \cdot 10^{-18} \mathrm{m}^{2}/\mathrm{W}$ close to that of Silicon ( $n^{2} = 2 \cdot 10^{-18} \mathrm{m}^{2}/\mathrm{W}$ ), but without noticeable TPA.