The advent of the state-of-the-art video coding standard, High Efficiency Video Coding (HEVC) is expected to bring great changes to relevant fields of broadcasting, storage and communications. HEVC achieves higher coding gains compared to its previous video coding standards in terms of rate-distortion (R-D) performance with various improved coding tools. This leads to heavy computational complexity and costs to HEVC encoders and these comes as strong restrictions specially to develop H/W types of encoders that are more preferred for real-time based applications and services. In particular, the quad-tree based coding unit (CU) structures with various sizes are known to contribute to achieving high coding gains of HEVC. However, RD cost calculation for mode decision with all CU sizes cannot normally be considered in the H/W HEVC encoders for real-time operation. To overcome this, a CU size pre-determination method based on a probabilistic decision model fit to implement H/W HEVC encoders is proposed in this paper. All available CU sizes are checked before inter prediction and unnecessary CU sizes are excluded from inter prediction according to the decision model. Then inter prediction with the reduced number of CU sizes can be performed in parallel with pipeline structures. The experimental results show that the proposed method effectively determines the necessary CU sizes with negligible coding loss of 1.57% for LD (Low-delay) coding structure and 1.08% for RA (Random access) coding structure, respectively in BD-BR.

High efficiency video coding (HEVC) appears due to the demand on high compression video coding beyond H.264/AVC in ultra-high definition (UHD) videos, and it brings high computational complexity with a variety of state of the art coding tools. As for intra prediction, HEVC has 35 prediction modes while H.264/AVC has 9 intra modes. To exploit the spatial correlation, we adopt an edge detection method, establish an edge map, and adaptively select the candidate modes using the edge map for a block. The number of the candidate modes is determined through trade-off between computational complexity and coding efficiency. Besides, the range of coding unit sizes is determined using the uniqueness of the edge directions for the given image block. The proposed scheme reduced the encoding time by 56.8% at the cost of 2.5% BD-BR increase on average compared to Full modes at the HEVC reference software (HM 10.0 [1]).

Nowadays, breakthrough composite technologies are intensifying the complexity of structural components every day and assuring the structural integrity is becoming more essential, thus creating challenges for developing a cost effective and reliable non-destructive evaluation (NDE) technique. As conventional NDE techniques usually require expensive equipments, trained experts and out-of-service period, such techniques may be inadequate for autonomous online health monitoring of structures. In this study, a relatively new technique known as electromechanical impedance (EMI) technique is combined with a neural network technique to predict the damaged areas on a composite plate. Regardless of the advantages such as low cost, robustness, simplicity and online possibilities, this technique still has various problems to be solved. For one, locating a damaged area can be extremely difficult as this non-model based technique heavily relies on the variations in the impedance signatures. The results show that the non-homogenous property is an advantage for the study, successfully identifying the damage location for the prepared test specimen with an acceptable performance.

One of the problems when using EMI method on composite structures with large surface areas can lead to unsuccessful damage detection due to a vague change in the impedance signature. In addition, a threshold value is usually defined to differentiate a damaged case from an intact case. Therefore, the change in the impedance signature subjected to damage must be significant enough to overcome the effects from other factors which can also cause a change in the impedance signature. In this study, a concept of enhancing the damage detection ability of EMI method using a piezoceramic (PZT) material is reported. The proposed technique eliminates the trial-and-error approach when determining a suitable frequency range by using a resonant frequency range acquired in the lower frequency range below 80 kHz, covering a large sensing area. The main idea is to create peaks in the impedance signature in a peak free zone by sacrificing the sensing area in order to significantly increase the sensitivity of the damage detection ability. The major advantages of the proposed technique is the utilization of the lower frequency range for damage identification using EMI method, while eliminating the time consuming problem of the trial-and-error method.

In this chapter, we introduce an application example of a wireless surveillance camera (WSC) consisting of image sensor, event detector, video encoder, flash memory, wireless transmitter, and battery. The battery- and flash-constrained WSC records images when significant events, such as suspicious pedestrians or vehicles, are detected, based on a hierarchical event detection method to avoid wasting energy on insignificant events. In an energy-aware sense, the recorded images are stored in non-volatile (flash) memory or transmitted to the base station according to the urgency of the event. Balancing the usage of all resources including battery and flash is critical in prolonging the lifetime of a WSC, because a shortage of either battery charge or flash capacity could lead to a complete loss of events, or a significant loss of quality in the recorded image of events. We assume that the resources of the WSC, i.e., the battery and flash, are refreshed every system maintenance period (SMP). The proposed method controls the bit rate of encoded videos and sampling rate, e.g., resolution and frame rate, to prolong the lifetime of the WSC until the next SMP. Experimental results show that the proposed method prolongs the lifetime of the WSC by up to 88.41% compared with an existing bit-rate allocation method that does not consider resource usage balancing.

In this paper, we propose a lifetime maximization method for battery- and flash-constrained blackbox surveillance node (BSN) consisting of image sensor, event detector, video encoder, flash memory and battery. Because it is not economically feasible to transfer all the recorded images to the base station due to the limited energy in BSN, the recorded images are stored in flash memory for offline event recognition. In BSN, balancing the usage of battery and flash memory is critical to prolong the lifetime, because the shortage of either battery charge or flash capacity could lead to a complete loss of events, or a significant loss of quality in the recorded image of events. The lifetime of BSN is determined by the remaining battery charge and flash memory space. In this work, we assume that the resources of BSN, i.e., battery and flash memory are refreshed every system maintenance period (SMP). The proposed method controls the bit-rate of encoded videos and sampling rate, i.e., resolution and frame rate, to prolong the BSN lifetime till the SMP. Experimental results show that the proposed method prolongs the BSN lifetime by up to 136.36% compared with an existing bit-rate allocation method which does not consider the resource usage balancing.

Flow aligned blockers are proposed to minimize the entrainment of hot gases underneath film-cooling jets by the counter-rotating vortices within the jets. Computations, based on the ensemble-averaged Navier-Stokes equations closed by the realizable k-ε turbulence model, were used to assess the usefulness of rectangular prisms as blockers in increasing film-cooling adiabatic effectiveness without unduly increasing surface heat transfer and pressure loss. The Taguchi’s design of experiment method was used to investigate the effects of the height of the blocker (0.2D, 0.4D, 0.8D), the thickness of the blocker (D/20, D/10, D/5), and the spacing between the pair of blockers (0.8D, 1.0D, 1.2D), where D is the diameter of the film-cooling hole. The effects of blowing ratio (0.37, 0.5, 0.65) were also studied. Results obtained show that blockers can greatly increase film-cooling effectiveness. By using rectangular prisms as blockers, the laterally averaged adiabatic effectiveness at 15D downstream of the film-cooling hole is as high as that at 1D downstream. The surface heat transfer was found to increase slightly near the leading edge of the prisms, but reduced elsewhere from reduced temperature gradients that resulted from reduced hot gas entrainment. However, pressure loss was found to increase somewhat because of the flat rectangular leading edge, which can be made more streamlined.

This paper presents a H.264/AVC intra encoder design with mode decision based on rate-distortion (R-D) optimization. Reducing the computational complexity of the R-D optimized mode decision is critical to successful application of H.264/AVC to real-time full high definition (HD) video applications. For that purpose we proposed a fast rate estimation, developed to quickly estimate the rate cost. To reduce the time for estimation of 'rate', we proposed three simple, yet sufficiently accurate, models for three most time-consuming reference tables, i.e., coeff_token, total_zeros, and run_before tables, respectively. The rate estimation error obtained by the proposed simple model for the three tables were 'zero' with about 80% probability. With fast rate estimation employed, we achieved R-D performance with only 0.001 dB increase of PSNR at 0.234% increase of the bit-rate. The total H.264 encoding with CAVLC using the proposed fast rate estimation scheme was reduced to 40% compared to that with actual CAVLC execution.

An event criticality-aware wireless surveillance system tries to minimize the energy consumption by adjusting the image distortion (or quality) requirement according to event criticality. In this paper, we present a novel video encoding method which scales bitrate so as to minimize the energy consumption of the wireless surveillance system while satisfying the given memory constraint. Given event statistics, memory size, and distortion requirement, the presented method gives an energy-optimal bitrate based on an analytic formulation of energy-rate-distortion (E-R-D) relationship for the target system consisting of H. 264 video encoder, event detector, transceiver and memory. Experimental results show that the proposed method offers up to 59.6% (29.1% on average) energy savings compared to an existing bitrate allocation method which does not consider event statistics [14].

This paper proposes a motion estimation scheme to reduce the computational complexity of multilayer motion estimation for scalable video coding. Based on the result of the motion estimation of the lower resolution layer referred to as base layer, we developed a new approach for exploring the search range of the enhancement layer with high coding efficiency. This approach is based on the activity defined as the absolute difference between the motion vector predictor and the final motion vector. Based on the correlation of the activities between neighboring layers, an inter-layer activity model was developed using a curve-fitted linear equation to exploit the activity in the base layer for deciding the search center and the search range of the enhancement layer. Each activity pair in the neighboring layers is used to associate the relevant macroblock to one of two groups; boundary region and interior region. The base-layer motion vector predictor is basically selected over all the activity regions; for each activity region, the proposed motion estimation algorithm decides whether to include the median motion vector predictor or not. Minimal sufficient search range is also decided from the inter-layer activity prediction factor that is adjusted to the given sequence. The proposed scheme reduced the execution time of motion estimation by 99.26% at the cost of 1.56% bit-rate increase and 0.048 dB peak signal-to-noise ratio (PSNR) decrease on average compared with the conventional full-search algorithm. The fast full-search block matching algorithm can also be incorporated to obtain the extra CPU time reduction in the motion estimation process. By adopting the fast full-search block matching algorithm (FFSBMA) in JSVM reference software, the CPU time was reduced by up to 91.84% and the memory bandwidth was reduced by 90% at the sacrifice of 1.27% bit-rate increase and 0.041 dB PSNR decrease on average compared with the FFSBMA only.

Lifetimes of battery-powered monitoring and surveillance systems are limited by the given battery capacity. This could lead either to a complete loss, or to a significant loss of quality in the recorded image, of events. In this paper, we propose a energy-aware video codec-based system design which exploits event characteristics to minimize the energy consumption through energy-aware architecture exploration. Given event statistics, the proposed energy-aware system design methodology carries out the architecture exploration of a wireless surveillance node (WSN) consisting of image sensor, event detector, video encoder, transceiver and memory. Hierarchical event detection algorithms are utilized for trade-offs between energy consumption and detection accuracy. Even if sophisticated event detection algorithms require high computational complexity, they contribute to reduce the number of false detected events. Based on operational framework of power-rate-distortion relationship analysis, we build an energy-rate-distortion optimization technique which gives an energy-optimal operating point of the video encoder under the given memory constraint. Experimental results show that the proposed method prolongs the lifetime of WSN up to 3.76 times compared to an existing bitrate allocation method which does not consider event statistics and hierarchical event detection.

This paper presents a method to customize instruction-set for configurable multiprocessors under a given silicon area budget so that total dynamic energy consumption is minimized when dynamic voltage and frequency scaling (DVFS) is employed. The proposed method is based on Mixed-Integer Linear Programming (MILP) to select the optimal processor configurations for real-time tasks from custom instruction candidates. We have evaluated the proposed method using real-life applications and commercial configurable processors. The results show that the optimally configured multiprocessors by our method has up to 23.2% reduction of dynamic energy consumption in comparison with the multiprocessors configured by a conventional approach.

In this paper, we propose an early block type decision method to reduce the complexity of rate-distortion (R-D) cost computation in intra prediction. Our method decides the block size early among luma 4 times 4, 8 times 8 and 16 times 16 with simple decision scheme. R-D cost for mode decision is used for R-D cost of a subblock ( 8 times 16 block ) instead of that of macroblock (MB) with the proposed encoding order for the intra prediction of 4 times 4 and 8 times 8 block. The R-D cost of a subblock consists of luma components only. Chroma components have a smaller potion of the R-D cost because they use subsampling (4:2:0) and there is relatively small variance among chroma pixels. Our method provides the reduction of computational complexity with average 0.04 dB PSNR degradation and rate increase of less than 1% in comparison with the full search method.

A system-on-a-chip communication archi- tecture has a significant impact on the performance and power consumption of modern multi-processors system-on-chips (MPSoCs). However, customization of such architecture for a specific application requires the exploration of a large design space. Thus, system designers need tools to rapidly explore and evaluate communication architectures. In this paper we pre- sent the method for application-specific low-power bus architecture synthesis at system-level. Our paper has two contributions. First, we build a bus power model of AMBA AXI bus communication archi- tecture. Second, we incorporate this power model into a low-power architecture exploration algorithm that enables system designers to rapidly explore the target bus architecture. The proposed exploration algorithm reduces power consumption by 20.1% compared to a maximally connected reduced matrix, and the area is also reduced by 20.2% compared to the maximally connected reduced matrix.

In this paper, we propose an early block type decision method to reduce the complexity of rate-distortion (R-D) cost compu­ tation in intra prediction. Our method decides the block size early among luma 4 x 4,8 x 8 and 16 x 16 with simple decision scheme. R-D cost for mode decision is used for R-D cost of a subblock ( 8 x 16 block) instead of that of macroblock (MB) with the proposed encoding order for the intra prediction of 4 x 4 and 8 x 8 block. The R-D cost of a subblock con­ sists of luma components only. Chroma components have a smaller potion of the R-D cost because they use subsampling (4:2:0) and there is relatively small variance among chroma pixels. Our method provides the reduction of computational complexity with average 0.04dB PSNR degradation and rate increase of less than 1% in comparison with the full search method.

In this paper, we propose a fast multi-layer motion estimation algorithm for spatial scalability provided in H.264/AVC scalable extension, based on the reuse of the motion vectors from multiple spatial layers. The reused motion vector is used to set a search center and refined within a small search area. However, the reused motion vector often produces significant prediction error at object boundaries. Motion vector difference defined in the H.264/AVC standard is used to decide whether the reused motion vector is appropriate. In addition, a search range is dynamically adjusted based on the distribution of the rate-distortion cost. By using the proposed multi-layer motion estimation, we reduce the execution time of motion estimation by almost 93% at the cost of 0.01 dB PSNR decrease and 0.79% bit-rate increase.

We propose a multimedia application extension processor (MAEP) which supports diverse I/O interfaces and consumes low power. The MAEP embeds an H.264/AVC decoder to support real-time decoding and storage playback of H.264-coded bit-stream. Our H.264/AVC decoder, VHCORE, achieves 1.8mW for CIF@30fps real-time decoding. We adopt an extensible processor and extended SIMD instructions to accelerate audio CODEC application. Finally, we fabricate the MAEP in Samsung 0.18um technology with an area of 12.54mm2.

Computations were performed to study the internal and film cooling of a flat plate with and without thermal-barrier coating (TBC) that account for the heat transfer in the gas and in the solid. The goal is to understand the effects of the conjugate heat transfer on the temperature distribution in the region about the film-cooling hole and in the region further downstream of a row of film-cooling holes. Results obtained show that when there are no TBC, conduction heat transfer in the plate smears out the adverse effects of hot-gas entrainment by the film-cooling jet. When there is a TBC, the surface temperature and the temperature in the super alloy are greatly reduced because of the low thermal conductivity of the ceramic top coat (CTC), but the temperature gradient, which is nearly aligned with the X-axis further away from the film-cooling hole, turns towards the side of the flat plate with internal cooling, which alters the thermal stress distribution. Reducing the thermal conductivity of the CTC by a factor of 10 was found to increase slightly instead of decrease the surface temperature. This computational study is based on the ensemble average continuity, Navier-Stokes, and energy equations closed by the ideal gas equation of state and the two-equation realizeable k-ε turbulence model for the gas phase and the Fourier equations for conduction in the solid phase.