Recent demonstrations indicate that silicon-spin quantum processing unit will be able to shuttle physical qubits rapidly and with high fidelity—a desirable feature for maximizing logical connectivity, supporting new codes, and routing around damage. However it may seem that shuttling at the logical level is unwise: static defects in the device may “scratch” a logical qubit as it passes, causing correlated errors to which the code is highly vulnerable. Here we explore an architecture where logical qubits are 1D strings (“snakes”) which can be moved freely over a planar latticework. Possible scratch events are inferred via monitor qubits and the complementary gap; if deemed a risk, remarkably the shuttle process can be undone in a way that negates any corruption. This leads to high levels of tolerance against shuttling-related imperfections and enables logical operations between snakes by a semitransversal method. We conclude that this approach is suitable for fault-tolerant computing in both near-term and long-term, mature-era silicon devices.
Semiconductor nanostructures are central to many developing technologies. Notably, double quantum dots are especially important for semiconductor spin-qubit architectures, quantum sensing applications, and quantum-dot solar cells. Accurate modelling is highly desirable but conventional methods can struggle when dynamics involve more than two interacting electrons. In this work, we present a quantum simulation framework capable of addressing multi-electron double quantum dots. We adopt an efficiently scaling 1^st quantised representation of the system and develop algorithms based on both Trotterisation and qubitisation. Incorporating insights from classical simulations enables us to produce resource estimates that are more realistic than those obtained from theoretical error bounds. Using a standard surface code model with physical noise at 10^-3, our results indicate that the ground-state energy of four electrons in a double quantum dot can be estimated in approximately 24 hours using 226k physical qubits, or an eight-electron system in 3.4 days with 314k qubits (with runtimes falling dramatically when more qubits are available). We anticipate that incorporating very recent advances including dense surface code architectures (Low et al. arXiv:2605.30455) may reduce these costs significantly further. We conclude that early fault tolerant computers may prove to be valuable tools for designing mature-era quantum technologies.
Fast and high fidelity shuttling of spin qubits has been demonstrated in semiconductor quantum dot devices. Several architectures based on shuttling have been proposed; it has been suggested that singlet-triplet (dual-spin) qubits could be optimal for the highest shuttling fidelities. Here we present a fault-tolerant framework for quantum error correction based on such dual-spin qubits, establishing them as a natural realisation of erasure qubits within semiconductor architectures. We introduce a hardware-efficient leakage-detection protocol that automatically projects leaked qubits back onto the computational subspace, without the need for measurement feedback or increased classical control overheads. When combined with the XZZX surface code and leakage-aware decoding, we demonstrate a twofold increase in the error correction threshold and achieve orders-of-magnitude reductions in logical error rates. This establishes the singlet-triplet encoding as a practical route toward high-fidelity shuttling and erasure-based, fault-tolerant quantum computation in semiconductor devices.
In the effort to develop useful quantum computers simulating quantum machines with conventional computing resources is a key capability. Such simulations will always face limits preventing the emulation of quantum computers of substantial scale but by pushing the envelope as far as possible through optimal choices of algorithms and hardware the value of the simulator tool is maximized. This work reviews the state-of-the-art numerical simulation methods i.e. the classical algorithms that emulate quantum computer evolution under specific operations. We focus on the mainstream state-vector and tensor-network paradigms while briefly mentioning alternative methods. Moreover we review the diverse applications of simulation across different facets of quantum computer development such as understanding the fundamental difference between quantum and classical computations exploring algorithm design spaces for quantum advantage predicting quantum processor performance at the design stage and characterizing fabricated devices efficiently for fast iterations. This review complements recent surveys on today's tools and implementations here we seek to acquaint the reader with an essential understanding of the theoretical basis of classical simulations detailed discussions on the advantages and limitations of different methods and the demands and challenges arising from practical use cases.
Electron spins in semiconductor devices are highly promising building blocks for quantum processors (QPs). Commercial semiconductor foundries can create QPs using the same processes used for conventional chips, once the QP design is suitably specified. There is a vast accessible design space; to identify the most promising options for fabrication, one requires predictive modeling of interacting electrons in real geometries and complex nonideal environments. In this work we explore a modeling method based on real-space grids, an ab initio approach without assumptions relating to device topology and therefore with wide applicability. Given an electrode geometry, we determine the exchange coupling between quantum dot qubits, and model the full evolution of a root SWAP gate to predict qubit loss and infidelity rates for various voltage profiles. We determine full, three-dimensional solutions and introduce a method that can obtain near-identical predictions using far more efficient two-dimensional computations. Moreover we explore the impact of unwanted charge defects (static and dynamic) in the environment, and test robust pulse sequences. As an example we exhibit a sequence correcting both systematic errors and (unknown) charge defects, observing an order of magnitude boost in fidelity. The technique can thus identify the most promising device designs for fabrication, as well as bespoke control sequences for each such device.
We present the Virtual Quantum Device (VQD) platform, a system based on the QuEST quantum emulator. Through the use of VQDs, non-expert users can emulate specific quantum computers with detailed error models, bespoke gate sets and connectivities. The platform boasts an intuitive interface, powerful visualisation, and compatibility with high-performance computation for effective testing and optimisation of complex quantum algorithms or ideas across a range of quantum computing hardware. We create and explore five families of VQDs corresponding to trapped ions, nitrogen-vacancy-centres, neutral atom arrays, silicon quantum dot spins, and superconducting devices. Each is highly configurable through a set of tailored parameters. We showcase the key characteristics of each virtual device, providing practical examples of the tool's usefulness and highlighting each device's specific attributes. By offering user-friendly encapsulated descriptions of diverse quantum hardware, the VQD platform offers researchers the ability to rapidly explore algorithms and protocols in a realistic setting; meanwhile hardware experts can create their own VQDs to compare with their experiments.
We explore the important task of applying a phase exp(i f (x)) to a computational basis state |x). The closely related task of rotating a target qubit by an angle depending on f (x) is also studied. Such operations are key in many quantum subroutines, and frequently f (x) can be well approximated by a piecewise function; examples range from the application of diagonal Hamiltonian terms (such as the Coulomb interaction) in grid-based many-body simulation to derivative pricing algorithms. Here, we exploit a parallelization of the piecewise approach so that all constituent elementary rotations are performed simultaneously, that is, we achieve a total rotation depth of one. Moreover, we explore the use of recursive catalyst "towers" to implement these elementary rotations efficiently. We find that strategies prioritizing execution speed can achieve circuit depth as low as O(log2 n+ log2 S) for a register of n qubits and a piecewise approximation of S sections (presuming prior preparation of enabling resource states), albeit total qubit count then scales with S. In the limit of multiple repetitions of the oracle, we find that catalyst tower approaches have an O(S n) T-count.
Near-perfect shuttling of silicon spin qubits is demonstrated, closing a gap versus rival systems.
Artificial intelligence (AI) advancements over the past few years have had an unprecedented and revolutionary impact across everyday application areas. Its significance also extends to technical challenges within science and engineering, including the nascent field of quantum computing (QC). The counterintuitive nature and high-dimensional mathematics of QC make it a prime candidate for AI's data-driven learning capabilities, and in fact, many of QC's biggest scaling challenges may ultimately rest on developments in AI. However, bringing leading techniques from AI to QC requires drawing on disparate expertise from arguably two of the most advanced and esoteric areas of computer science. Here we aim to encourage this cross-pollination by reviewing how state-of-the-art AI techniques are already advancing challenges across the hardware and software stack needed to develop useful QC - from device design to applications. We then close by examining its future opportunities and obstacles in this space.
In order to characterize and benchmark computational hardware, software, and algorithms, it is essential to have many problem instances on-hand. This is no less true for quantum computation, where a large collection of real-world problem instances would allow for benchmarking studies that in turn help to improve both algorithms and hardware designs. To this end, here we present a large dataset of qubit-based quantum Hamiltonians. The dataset, called HamLib (for Hamiltonian Library), is freely available online and contains problem sizes ranging from 2 to 1000 qubits. HamLib includes problem instances of the Heisenberg model, Fermi-Hubbard model, Bose-Hubbard model, molecular electronic structure, molecular vibrational structure, MaxCut, Max-k-SAT, Max-k-Cut, QMaxCut, and the traveling salesperson problem. The goals of this effort are (a) to save researchers time by eliminating the need to prepare problem instances and map them to qubit representations, (b) to allow for more thorough tests of new algorithms and hardware, and (c) to allow for reproducibility and standardization across research studies.
We propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling N-qubit states through a large layered physical array of structures which realise quantum logic gates in stages. Thus, the circuit depth corresponds to the number of layers of structures. Subsequent N-qubit states are ‘pipelined’ densely through the structures to efficiently wield the physical resources for repeated runs. Pipelining thus lends itself to noisy intermediate-scale quantum (NISQ) applications, such as variational quantum eigensolvers, which require numerous repetitions of the same or similar calculations. We illustrate the architecture by describing a realisation in the naturally high-density and scalable silicon spin qubit platform, which includes a universal gate set of sufficient fidelity under realistic assumptions of qubit variability.
Quantum computing requires a universal set of gate operations; regarding gates as rotations, any rotation angle must be possible. However a real device may only be capable of B bits of resolution, i.e., it might support only 2^{B} possible variants of a given physical gate. Naive discretization of an algorithm's gates to the nearest available options causes coherent errors, while decomposing an impermissible gate into several allowed operations increases circuit depth. Conversely, demanding higher B can greatly complexify hardware. Here, we explore an alternative: probabilistic angle interpolation (PAI). This effectively implements any desired, continuously parametrized rotation by randomly choosing one of three discretized gate settings and postprocessing individual circuit outputs. The approach is particularly relevant for near-term applications where one would in any case average over many runs of circuit executions to estimate expected values. While PAI increases that sampling cost, we prove that (a) the approach is optimal in the sense that PAI achieves the least possible overhead and (b) the overhead is remarkably modest even with thousands of parametrized gates and only seven bits of resolution available. This is a profound relaxation of engineering requirements for first generation quantum computers where even 5-6 bits of resolution may suffice and, as we demonstrate, the approach is many orders of magnitude more efficient than prior techniques. Moreover we conclude that, even for more mature late noisy intermediate-scale quantum era hardware, no more than nine bits will be necessary.
Many quantum computing platforms are based on a two-dimensional physical layout. Here we explore a concept called looped pipelines which permits one to obtain many of the advantages of a 3D lattice while operating a strictly 2D device. The concept leverages qubit shuttling, a well-established feature in platforms like semiconductor spin qubits and trapped-ion qubits. The looped pipeline architecture has similar hardware requirements to other shuttling approaches, but can process a stack of qubit arrays instead of just one. Even a stack of limited height is enabling for diverse schemes ranging from NISQ-era error mitigation through to fault-tolerant codes. For the former, protocols involving multiple states can be implemented with a space-time resource cost comparable to preparing one noisy copy. For the latter, one can realise a far broader variety of code structures; as an example we consider layered 2D codes within which transversal CNOTs are available. Under reasonable assumptions this approach can reduce the space-time cost of magic state distillation by two orders of magnitude. Numerical modelling using experimentally-motivated noise models verifies that the architecture provides this benefit without significant reduction to the code's threshold.
Whether it is at the fabrication stage or during the course of the quantum computation, e.g. because of high-energy events like cosmic rays, the qubits constituting an error correcting code may be rendered inoperable. Such defects may correspond to individual qubits or to clusters and could potentially disrupt the code sufficiently to generate logical errors. In this paper, we explore a novel adaptive approach for surface code quantum error correction on a defective lattice. We show that combining an appropriate defect detection algorithm and a quarantine of the identified zone allows one to preserve the advantage of quantum error correction at finite code sizes, at the cost of a qubit overhead that scales with the size of the defect. Our numerics indicate that the code's threshold need not be significantly affected; for example, for a certain scenario where small defects repeatedly arise in each logical qubit, the noise threshold is 2.7% (versus the defect-free case of 2.9%). These results pave the way to the experimental implementation of large-scale quantum computers where defects will be inevitable.
First-quantized, grid-based methods for chemistry modeling are a natural and elegant fit for quantum computers. However, it is infeasible to use today's quantum prototypes to explore the power of this approach because it requires a substantial number of near-perfect qubits. Here, we use exactly emulated quantum computers with up to 36 qubits to execute deep yet resource-frugal algorithms that model 2D and 3D atoms with single and paired particles. A range of tasks is explored, from ground state preparation and energy estimation to the dynamics of scattering and ionization; we evaluate various methods within the split-operator QFT (SO-QFT) Hamiltonian simulation paradigm, including protocols previously described in theoretical papers and our own techniques. While we identify certain restrictions and caveats, generally, the grid-based method is found to perform very well; our results are consistent with the view that first-quantized paradigms will be dominant from the early fault-tolerant quantum computing era onward.
For quantum computers to successfully solve real-world problems, it is necessary to tackle the challenge of noise: the errors which occur in elementary physical components due to unwanted or imperfect interactions. The theory of quantum fault tolerance can provide an answer in the long term, but in the coming era of `NISQ' machines we must seek to mitigate errors rather than completely remove them. This review surveys the diverse methods that have been proposed for quantum error mitigation, assesses their in-principle efficacy, and then describes the hardware demonstrations achieved to date. We identify the commonalities and limitations among the methods, noting how mitigation methods can be chosen according to the primary type of noise present, including algorithmic errors. Open problems in the field are identified and we discuss the prospects for realising mitigation-based devices that can deliver quantum advantage with an impact on science and business.
Gate-level quantum circuits are often derived manually from higher level algorithms. While this suffices for small implementations and demonstrations, ultimately automatic circuit design will be required to realise complex algorithms using hardware-specific operations and connectivity. Therefore, ab initio creation of circuits within a machine, either a classical computer or a hybrid quantum–classical device, is of key importance. We explore a range of established and novel techniques for the synthesis of new circuit structures, the optimisation of parameterised circuits, and the efficient removal of low-value gates via the quantum geometric tensor. Using these techniques we tackle the tasks of automatic encoding of unitary processes and translation (recompilation) of a circuit from one form to another. Using emulated quantum computers with various noise-free gate sets we provide simple examples involving up to 10 qubits, corresponding to 20 qubits in the augmented space we use. Further applications of specific relevance to chemistry modelling are considered in a sister paper, ‘Exploiting subspace constraints and ab initio variational methods for quantum chemistry’. The emulation environments used were QuEST , QuESTlink and pyQuEST . All resources will be made openly accessible and are currently available upon request.
Variational methods offer a highly promising route to exploiting quantum computers for chemistry tasks. Here we employ methods described in a sister paper to the present report, entitled ab initio machine synthesis of quantum circuits, in order to solve problems using adaptively evolving quantum circuits. Consistent with prior authors we find that this approach can outperform human-designed circuits such as the coupled-cluster or hardware-efficient ansätze, and we make comparisons for larger instances up to 14 qubits. Moreover we introduce a novel approach to constraining the circuit evolution in the physically relevant subspace, finding that this greatly improves performance and compactness of the circuits. We consider both static and dynamics properties of molecular systems. The emulation environments used is QuESTlink; all resources are open source and linked from this paper.
Classical simulation of quantum computers is an irreplaceable step in the design of quantum algorithms. Exponential simulation costs demand the use of high-performance computing techniques, and in particular distribution, whereby the quantum state description is partitioned between a network of cooperating computers - necessary for the exact simulation of more than approximately 30 qubits. Distributed computing is notoriously difficult, requiring bespoke algorithms dissimilar to their serial counterparts with different resource considerations, and which appear to restrict the utilities of a quantum simulator. This manuscript presents a plethora of novel algorithms for distributed full-state simulation of gates, operators, noise channels and other calculations in digital quantum computers. We show how a simple, common but seemingly restrictive distribution model actually permits a rich set of advanced facilities including Pauli gadgets, many-controlled many-target general unitaries, density matrices, general decoherence channels, and partial traces. These algorithms include asymptotically, polynomially improved simulations of exotic gates, and thorough motivations for high-performance computing techniques which will be useful for even non-distributed simulators. Our results are derived in language familiar to a quantum information theory audience, and our algorithms formalised for the scientific simulation community. We have implemented all algorithms herein presented into an isolated, minimalist C++ project, hosted open-source on Github with a permissive MIT license, and extensive testing. This manuscript aims both to significantly improve the high-performance quantum simulation tools available, and offer a thorough introduction to, and derivation of, full-state simulation techniques.