Neural networks have shown great performance in cognitive tasks. When deploying network models on mobile devices with limited computation and storage resources, the weight quantization technique has been widely adopted. In practice, 8-bit or 16-bit quantization is mostly likely to be selected in order to maintain the accuracy at the same level as the models in 32-bit floating-point precision. Binary quantization, on the contrary, aims to obtain the highest compression at the cost of much bigger accuracy drop. Applying different precision in different layers/structures can potentially produce the most efficient model. Seeking for the best precision configuration, however, is difficult. In this work, we proposed an automatic search algorithm to address the challenge. By relaxing the search space of quantization bitwidth from discrete to continuous domain, our algorithm can generate a mixed-precision quantization scheme which achieves the compression rate close to the one from the binary-weighted model while maintaining the testing accuracy similar to the original full-precision model.

In single-phase inverters, a considerable amount of low-frequency ripples appear on the DC side due to the instantaneous power imbalance between the DC side and AC side. Recently, active methods using film capacitors or inductors as ripple power storage components introduced at the DC or AC side are applied to ease this issue. Nevertheless, there is lack of research regarding the selection of DC side or AC side power decoupling. This paper investigates the power losses of key components in both AC side and DC side active power decoupling solutions and compares their performance from an efficiency perspective. The analytical power loss models are derived based on the operation principles of the active power decoupling methods. A comparative study is performed based on a 500 W single-phase H-bridge inverter study case with 400 V DC-link voltage level. The results provide a guideline to justify whether or not to apply active power decoupling methods or which active power decoupling method to choose for a given application.

Various power decoupling methods have been proposed recently to replace the DC-link Electrolytic Capacitors (E-caps) in single-phase conversion system, in order to extend the lifetime and improve the reliability of the DC-link. However, it is still an open question whether the converter level reliability becomes better or not, since additional components are introduced and the loading of the existing components may be changed. This paper aims to study the converter level reliability of a single-phase full-bridge inverter with two kinds of active power decoupling module and to compare it with the traditional passive DC-link solution. The converter level reliability is obtained by component level electro-thermal stress modeling, lifetime model, Weibull distribution, and Reliability Block Diagram (RBD) method. The results are demonstrated by a 2 kW single-phase inverter application.

In single-phase inverters, DC-link capacitors are installed at the DC-link to buffer the ripple power between the AC side and DC side. Active decoupling methods introduce additional circuits at the DC side or AC side to partially or fully supply the ripple power. So that the demanded DC-link capacitor capacitance can be decreased. However, few research is about the effect of DC side and AC side decoupling on the DClink capacitor reliability considering its electro-thermal stresses. This paper presents a quantitative analysis on the lifetime of capacitors with power decoupling circuits at the DC side and AC side, respectively. The ripple current spectrum of the capacitors is obtained by double Fourier analysis of a H-bridge inverter with natural sampling PWM modulation. A study case is demonstrated by a 2,000 W H-bridge inverter with 400 V DC-link voltage.

In single-phase power inverter systems, when the load is nonlinear, output current will contain various harmonic currents. DC-side current will be disturbed by various harmonic currents at the AC-side. It is very harmful for the security, stability and reliability of the system. Power decoupling module compensating for the pulsation power has only been discussed in some papers in theory. However, these methods are difficult to be used in the actual circuits. In this paper, a novel power decoupling method of power-decoupling by applying Discrete Fourier Transform (DFT) is proposed to analyze the DC-side current real-timely. Various harmonic currents can be mitigated respectively with the appropriate control of capacitor voltage. To prove the correctness and feasibility, a simulation model of the H-bridge inverter based on the power-decoupling module has been established.

In single-phase converters, the imbalance of AC side and DC side instantaneous power will cause the appearance of low-frequency ripple in DC side and reduce the reliability of the converter systems. In this paper, a bridge arm and a pair of capacitor as power decoupling module was added in H-bridge inverter, the decoupling theory and capacitor selecting principles of the decoupling module was studied either placing in inverter DC side or AC side. Through analysis of voltage and current stress in both topologies, the influence of the decoupling module on H-bridge inverter and the selection of module capacitor on module voltage and current stress is analyzed. The flow path of double-line frequency ripple current illustrates the decoupling effect of power decoupling module. Simulations are performed to validate the rationality of the analysis providing theoretical basis for design and application of the decoupling module.

The conversion between DC and AC power will typically introduce a low-frequency pulsation power in the DC side of single phase power converter which may create instability, lowers its efficiency, and reduces the reliability. In this paper, a novel Power Decoupling Modular (PDM) with 2 series differential decoupling capacitors at the ac side is proposed. Compared with the DC PDM, the proposed modular holds smaller filter inductor resulting from reusing the ac inductor as the freewheel inductor, less voltage stress of the capacitor voltage because of full use of the capacitance and shortest flowing path of the pulsation power due to supply the pulsation power directly by the series capacitors at the ac side. Theoretical analysis and results are provided to explain the operation and showcase the performance of the modular. Moreover, the power flow involved in this circuit and associated controller design are detailed in the paper. Experimental results validate that the proposed solution without effect on the original system can achieve significant mitigation of the pulsation power as well as high quality output voltage.

DC power systems connecting to single-phase DC/AC inverters with nonlinear loads will have their DC sources being injected with AC ripple currents containing a low-frequency component at twice the output voltage frequency of the inverter and also other current harmonics. Such a current may create instability in the DC power system, lower its efficiency, and shorten the lifetime of the DC source. This paper presents a general waveform control method that can mitigate the injection of the low-frequency ripple current by the single-phase DC/AC inverter into the DC source. It also discusses the inhibiting ability of the waveform control method on other coexisting harmonics, while the DC source delivers AC power to a nonlinear load. With the application of the waveform control, the average DC output power is supplied by the DC source, while the other harmonics pulsation power can be confined to the AC side (between the capacitors and the AC load). Theoretical analyses and experiment results are provided to explain the operation and the inhibiting ability, and to showcase the performance of the approach in tackling the harmonics. Results validate that the proposed solution can achieve significant mitigation of harmonic component at DC side with nonlinear load as well as a high quality output voltage without the need for extra large capacitive energy storage element implementation.

Because of the instantaneous imbalance of the ideal input power and output power, the DC-side of the general inverters will be disturbed by the reactive power and the pulsation power of twice-frequency at the AC-side. This fact will be harmful for the security, stability and reliability of the system. This paper presents a power-decoupling module which is able to compensate for the twice pulsation power and the reactive power at the AC-side by controlling the voltage of the two series capacitors in the power-decoupling module. Consequently, the harmonic currents of the DC-side current will be eliminated. The disturbance of the DC source from the inverter will be reduced. The stability and the reliability of the system will be improved. This paper establishes the simulation model of the H-bridge inverter based on the power-decoupling module. The correctness and the feasibility of the proposed harmonic power decoupling technique based on the power-decoupling module have been verified through comparison and analysis.

A composite multi-hull ship structure under extreme wave and slamming loads has been investigated by using finite element analysis (FEA). Hull structure is made of sandwich construction having carbon/epoxy composite face sheets and PVC foam core. Two types of loadings are considered; i) Wave loads and ii) Slamming loads. Both wave and slamming loads are estimated according to American Bureau of Shipping (ABS) rules at sea state 5 with a ship forward velocity of 40 knots. Deformation and stress components for both loading conditions are extracted. In both cases, the maximum deformation and stresses were found to occur at the middle portion of the bottom deck. The maximum stress criterion for isotropic material (sandwich core) and Tsai-Wu failure criterion for orthotropic material (sandwich skin) are applied and structural integrity of each components are checked. A comparison was also made between the effects of wave loads and slamming loads, concluding that slamming loads have more detrimental effect on the ship hull.

A finite element tool for structural analysis of a composite multi-hull structure is developed. Two-way fluid structure interaction (FSI) is implemented by coupling finite element analysis (FEA) and computational fluid dynamics (CFD). FEA models have been developed using sandwich construction having composite face sheets and foam core. Fluid domain is modeled using a CFD code, CFX and a wave motion is simulated based on Sea State 5. FSI module is then used to connect FEA with the CFD code. Dynamic response of the hull is generated in time domain. A critical area with high stress gradient is chosen and a sub model is developed with refined mesh. Force and displacement boundary conditions are transported from the global model. Interlaminar stresses and shear stress distributions at the core and girder are then determined. Materials failure criteria for composites and foam are applied on the sub model and structural integrity of each component is checked. An analysis without FSI is also performed on a reference model with identical load and boundary conditions and the result is compared with that of FSI.

Recent technological advances are putting increased pressure on CPU scheduling. On one hand, processors have more cores. On the other hand, I/O systems have become more complex. Intensive research has been conducted on multi/many-core scheduling, however, most of the studies follow the conventional approach and focus on the utilization and load balance of the cores. In this study, we focus on increasing data locality by bringing source information from I/O into the core interrupt scheduling process. The premise is to group interrupts associated for the same I/O request together on the same core, and prove that data locality is more important than core utilization for many applications. Based on this idea, a source-aware affinity interrupt-scheduling scheme is introduced and a prototype system, SAIs, is implemented. Experiment results show that SAIs is feasible and promising, bandwidth shows a 23.57% improvement in a 3-Gigabit NIC environment and in the optimal case without the NIC bottleneck, the bandwidth improvement increases to 53.23%.

As a leading framework for data intensive computing, MapReduce has gained enormous popularity in large-scale data analysis. With the increasing adoption of multi/many core platform, more and more MapReduce tasks are now running on the same node and sharing the same storage resources. The concurrency of tasks raises the issue of I/O stream congestion. We have observed significant throughput drops and task delays caused by I/O stream congestion in the MapReduce framework. In this paper, we propose two techniques to address the I/O stream congestion in MapReduce tasks. First, I/O stream throttling is presented to limit the number of concurrent I/O streams, and avoid throughput drops. Furthermore, to alleviate the I/O contention among multiple MapReduce jobs, I/O coordination orders the I/O streams in accordance to job priority. By exclusively granting I/O resources to streams with higher priorities, the coordination effectively shortens the average job completion time. Experimental results from Hadoop confirm that the proposed techniques improve the average job completion time by up to 33.74%. In addition, the proposed techniques greatly accelerate the execution of high priority jobs; thereby, showing it is capable of fostering QoS in the MapReduce framework. KeywordsI/O stream; MapReduce; I/O scheduling; throttling; coordination

Trust and reputation are important decision-making factors in large-scale distributed systems. The Constellation Model is one of our previous works about grid resource management. Since local feedback plays an important role in aggregating global reputation, a new local feedback metric is introduced to reflect the dynamic feature of trust. This paper introduces our recent effort of combining reputation into the Constelltaion Model. We propose a novel global reputation model for grid systems such as Constellation Model. We model the relationship between global reputation and the nodes' feedback credibility. A node's feedback credibility which is calculated by similarity measurement will impact on its reputation in a direct way. In our model, to promote a node's reputation, there exist two possible ways: the first one is to provide high-quality services to others. The second way is to provide authentic feedbacks towards others. In addition, to evaluate a node's local feedback trustiness, approach based on similarity measurement is employed. If local feedback trustiness is too low, compensation calculated by exponential smoothing is applied. This design is employed to combat malicious collectives and slandering in large-scale communities. The computational framework of EigenTrust which is proposed by S. D. Kamvar at Stanford University is used to compute global reputations of all the nodes in the Constellation Model. In the Constellation Model, nodes (stars) in a solar system can be organized using a Peer-to-Peer way. Distributed Hash Table protocol such as Chord which is proposed by I. Stoica, et al. at University of California, Berkeley can be used to implement the distributed ranking mechanism. We have implemented a prototype of Constellation Model. Experimental results show that, our model can reflect dynamic characteristics of trust better. Our model can also improve the evaluation accuracy of global reputation by leveraging feedback credibility. In Comparison with EigenTrust, our model shows an improved robustness with the presence of malicious behaviors in the Constellation Model.

GridDEV is a DEVS-based platform for evaluation of service grid. Through the analysis of SOA, we characterize important features of service grid and select four components as the base of grid modeling. With DSDEVS, this paper models the basic components selected, as well as the relationships between them. As a result, the model fully formalizes the gird system; hence facilitates the design and optimization of grid services. Based on this model, we map the DEVS component into elements of simulator development library SimGrid, and construct the platform GridDEV for grid performance and reliability evaluation.

Grid enables resource sharing and dynamic allocation of computational resources. It is a great challenge to make numerous resources available on-demand to guarantee the Quality-of-Service for jobs. This paper presents a two-stage optimization model for resource allocation in grid. Job constraints are classified into mandatory constraints and negotiated constraints. In the first stage, a preprocessing procedure such as resource discovery deals with the mandatory constraints. This has been fulfilled as our previous work. In the second stage, negotiated constraints are treated as Knapsack Problem-based optimization problem. Centralized scheduling and decentralized scheduling have been considered in this paper. This work is fulfilled as part of the Constellation Model for grid resource management. We formulate centralized scheduling as Multi-Constraint Multiple Knapsack Problem (MCMKP). In centralized scheduling, jobs are submitted to a global job queue. A global scheduler assigns each job to a proper grid site according to the scheduling strategy. The scheduling is done periodically (e.g. daily or weekly). We formulate decentralized scheduling as Multi-Dimensional Knapsack Problem (MDKP). In decentralized scheduling, jobs are submitted to local job queues. Allocation decisions are made by local schedulers individually. Jobs that can not be executed immediately are sent to a global waiting queue. When local scheduling is initialized, a local scheduler can select jobs from both the local job queue and the global waiting queue. Objectives of both centralized scheduling and decentralized scheduling are to optimize the utility defined by a grid economy approach. The defined utility makes the trade-offs between user-concerned metrics and system-concerned metrics. Heuristic algorithms such as Very Large-Scale Neighborhood Search proposed by R. K. Ahuja and C. B. Cunha [2005] can be used to solve the combinatorial optimization problem. We implemented a prototype of the Constellation Model. Genetic algorithms for constrained optimization which is proposed by S. Venkatraman and G. G. Yen [2005] have been implemented to solve the above optimization problems. Experimental results show that, performance metrics such as gained utility, response rate, and resource utilization are improved and resources are allocated in an optimal way.

In the paper, we investigate the memory access technology on cell broadband engine architecture (CBEA), and develop a profiling infrastructure for memory management on the architecture. By registering the dynamic memory allocation and providing details of trace of memory access, the infrastructure provides the data partition information automatically which alleviates the burdens of programmer and provides a safety guarantee for aggressive data prefetch for computing task. On the other hand, the profile information is useful for analyzing the patterns of memory access and helpful for further performance optimization. Experimental results show that applications implemented based on our SDK library not only support aggressive memory access method without the requirement of external data partition information, but also could be optimized aggressively under the guideline of the profile information provided by the proposed SDK library.