A Dual Mode WiMAX/WLAN CMOS RF transceiver for the 2.5 and 3.5GHz frequency bands is presented comprising one transmitter and two receivers. Current consumption of the direct conversion transceiver is 94/115mA in TX and 83/105mA in RX mode (2.5/3.5GHz, 1 RX path active). Unwanted carrier and sideband leakage in transmit path can be calibrated using a dedicated downconversion mixer in a feedback loop configuration. The transmitter output power can be controlled over a dynamic range of 45dB in 1dB steps. Due to low PLL phase noise and high transmitter linearity an EVM of <-38dB has been achieved at -2dBm output power. Noise figure of the receiver is 3.4/4dB and EVM is -38/-36dB in the 2.5/3.5GHz frequency bands.

A K-band CMOS low-noise amplifier with a noise figure of 4.26 dB and a peak gain of 18.86 dB is presented. The low-noise amplifier has a peak gain frequency of 20.3 GHz and an input referred I dB compression point of -16 dBm. These are believed to be the lowest noise figure and highest gain values reported to date at these frequencies in a standard CMOS technology.

A 2 GHz programmable-gain amplifier (PGA) using 0.12-μm CMOS technology is presented in this paper, which has a 51 dB gain control range with 3 dB gain control steps. The maximum output power of this PGA achieves 9 dBm while the 1-dB compression point is located at 8 dBm. A high linearity denoted by the oIP3 of 22 dBm at the maximum gain has been achieved. A new configuration to digitally implement a dB-linear gain characteristic is demonstrated in this paper, which simultaneously enables an adaptive power consumption.

A 2 GHz programmable-gain amplifier (PGA) using 0.12-/spl mu/m CMOS technology is presented in this paper, which has a 51 dB gain control range with 3 dB gain control steps. The maximum output power of this PGA achieves 9 dBm while the 1-dB compression point is located at 8 dBm. A high linearity denoted by the oIP3 of 22 dBm at the maximum gain has been achieved. A new configuration to digitally implement a dB-linear gain characteristic is demonstrated in this paper, which simultaneously enables adaptive power consumption.

In this paper, an LDMOS class-AB balanced power amplifier with a 3-dB bandwidth of 800 MHz at a center frequency of 2 GHz is presented. To the best of the authors' knowledge, this is the largest bandwidth reported so far at these frequencies in an LDMOS technology. 50 Watt output power, high efficiency, high linearity and input-and output-matching better than -10 dB have been achieved over this large frequency band. An advanced stability improvement is introduced in this paper.

An improved and complete method for the small-signal and high-frequency noise modeling of SiGe HBTs in a BiCMOS process is presented. A comprehensive survey of the suggested parameter-extraction methodology for the SiGe HBT transistor model in conjunction with the analytically derived equations is given. The suggested transistor model is compatible with BiCMOS processes and takes into account the parasitic effects like the extrinsic capacitances and substrate effect. The accuracy of the proposed transistor model is verified by on-wafer S-parameter measurements up to 40 GHz. An important proof of the accuracy of the proposed parameter-extraction methodology is the presented physical noise model that can accurately predict the measured noise parameters up to our measurement frequency limit of 18 GHz. The noise model accuracy at various temperatures and biases is examined. Finally, the effect of the on-wafer contact pads on the noise performance of the transistor is investigated in detail.

With the recent advances in CMOS technologies, the MOSFETs offer competitive low noise performance at high frequencies comparable with their bipolar counterparts and become attractive candidates even for challenging high frequency applications with their low cost and high integration level. Therefore, the transistor model accuracy becomes a crucial factor for predicting the RF circuit performance accurately in a broad frequency range. An overview of a high frequency noise modeling approach based on a direct parameter extraction technique is presented in this paper. Moreover, the presented parameter extraction methods are evaluated by means of broadband noise parameter and S-parameter measurements. A temperature noise model predicts all four noise parameters at any frequency and can be used to determine the dominant noise source of the small-signal equivalent circuit. The model can be verified by comparing the measured noise parameters with the simulation results over a broad frequency range. Finally, a practical circuit example of an amplifier using a 0.12 μm CMOS technology at 24 GHz is given.

A 2W HiVP power amplifier for GSM mobile communication system is designed using 0.12-mum CMOS process. To solve the problem of low breakdown voltage in deep-submicron CMOS technology, the new High Voltage/High Power (HiVP) device configuration is used. With HiVP configuration, a large voltage can be divided by several devices, so that the voltage drop on each device is reduced. Hence the low-cost CMOS technology can be adopted for the design of power amplifier which will be used in a mobile phone. In this paper, an analytical overview of theory and practice of the HiVP power amplifier are discussed.

A 2W HiVP power amplifier for GSM mobile communication system is designed using 0.12-μm CMOS process. To solve the problem of low breakdown voltage in deep-submicron CMOS technology, the new High Voltage/High Power (HiVP) device configuration is used. With HiVP configuration, a large voltage can be divided by several devices, so that the voltage drop on each device is reduced. Hence the low-cost CMOS technology can be adopted for the design of power amplifier which will be used in a mobile phone. In this paper, an analytical overview of theory and practice of the HiVP power amplifier are discussed.

This work describes the complete process to model the high frequency noise characteristics of a SiGe HBT based on a direct parameter extraction technique. The parameters of the equivalent circuit have been extracted from S parameter and DC measurement data in a simple and accurate way. The elements of the model have been determined gradually starting from the outer shell by operating the transistor at various bias conditions. A direct extraction method to obtain the substrate network elements and the extrinsic capacitances is also presented which enables the determination of the base resistance from the Z parameters. Noise parameter measurements have been carried out and a good agreement has been achieved both in S parameter and noise parameter data which is a proof of the physical validity of the parameter extraction and the modeling method.

Large-signal modeling results of SiGe HBTs with HICUM (High Current Transistor Model) are presented. Moreover, a new and robust method to determine the substrate network elements of bipolar transistors from S-parameter measurements is proposed in this work. The investigated substrate network is compatible with HICUM and includes the substrate- collector depletion capacitance, substrate resistance and capacitance.