The calibration and performance of the LHCb Calorimeter system in Run 1 and 2 at the LHC are described. After a brief description of the sub-detectors and of their role in the trigger, the calibration methods used for each part of the system are reviewed. The changes which occurred with the increase of beam energy in Run 2 are explained. The performances of the calorimetry for $\gamma$ and $\pi^0$ are detailed. A few results from collisions recorded at $\sqrt {s}$ = 7, 8 and 13 TeV are shown.

The aim of CABAC, is to provide to the LSST camera CCDs the necessary parallel and serial clocks, the power supply of the output amplifiers (OD) and most of the biases, excluding the HV substrate bias. The LSST focal plane is made of 189 large (4k*4k pixels) and highly segmented (16 outputs) CCDs. Each pixel will be read at a speed of 550kHz for a total readout (3.2 Gpixels) of 2s. To achieve this speed, each CCD will be driven by two CABAC in order to provide the necessary large current to move the 4004 lines of the sensor. CABAC will be implemented on a large REB (Raft Electronics Board) located inside the cryostat, the nominal operating temperature will be -26C. One CABAC is designed to provide : 4 parallel clocks of more than 15V amplitude, rise and fall time of less than 2us on a 66nF capacitive load, and a 8 bit programmable output current capability of 300mA max. 4 serial clocks with more than 15V amplitude, rise and fall time of 60ns on a capacitive load of 300pF, and a 8 bit programmable output current capability of 16mA max. 2 output drains, 8 bit programmable voltage from 13 to 36V with a nominal output current of 16mA each. 3 high level biases, 8 bit programmable from 13 to 36V 2 low level biases, 8 bit programmable from 0 to 5V Finally, for monitoring purpose, an internal dual multiplexer can provide 2 of any CABAC output, including the temperature sensor, and 6 external inputs. A deactivable internal pulser can inject pulse inside the CCD RD (reset drain) allowing electronic calibration of the readout chain. In order to save power during the 15s exposure, CABAC can be put in standby mode. This mode reduces the supply current by a factor of 10 for the clocks circuitry, and can set the OD voltages to a programmable value in order to reduce the glow inside the CCDs. Programation of CABAC is done via a SPI bus. CABAC is designed in CMOS H35 from AMS vendor, encapsulated in a QFN100 package with bottom pad, it is currently under tests.

We present a progress status of a new concept of PID detector called FDIRC, intended to be used at the SuperB experiment, which requires π/K separation up to a few GeV/c. The new photon camera is made of the solid fused-silica optics with a volume 25× smaller and speed increased by a factor of 10 compared to the BaBar DIRC, and therefore will be much less sensitive to electromagnetic and neutron background.

A Front-End (FE) design based on commercial operational amplifiers has been developed to read-out signals from a Multianode PhotoMultiplier Tube (MaPMT). The overall design has been optimised for single photo-electron signal from the Hamamatsu H8500. The signal is collected by a current sensitive preamplifier and then it is fed into both a ECL fast discriminator and a shaper for analog output readout in differential mode. The analog signal and the digital gates are then registered on VME ADC and TDC modules respectively. Performances in terms of linearity, gain and timing resolution will be discussed, presenting results obtained on a test bench with differentiated step voltage inputs and also with a prototype electronic board plugged into the H8500 PMT illuminated by a picosecond laser.

The BaBar detector operated successfully at the PEP-II asymmetric e+e− collider at the SLAC National Accelerator Laboratory from 1999 to 2008. This report covers upgrades, operation, and performance of the collider and the detector systems, as well as the trigger, online and offline computing, and aspects of event reconstruction since the beginning of data taking.

In this Technical Design Report (TDR) we describe the SuperB detector that was to be installed on the SuperB e+e- high luminosity collider. The SuperB asymmetric collider, which was to be constructed on the Tor Vergata campus near the INFN Frascati National Laboratory, was designed to operate both at the Upsilon(4S) center-of-mass energy with a luminosity of 10^36 cm^-2s^-1 and at the tau/charm production threshold with a luminosity of 10^35 cm^-2s^-1. This high luminosity, producing a data sample about a factor 100 larger than present B Factories, would allow investigation of new physics effects in rare decays, CP Violation and Lepton Flavour Violation. This document details the detector design presented in the Conceptual Design Report (CDR) in 2007. The R D and engineering studies performed to arrive at the full detector design are described, and an updated cost estimate is presented. A combination of a more realistic cost estimates and the unavailability of funds due of the global economic climate led to a formal cancelation of the project on Nov 27, 2012.

During 2011 the LHCb experiment at CERN collected 1.0 fb-1 of sqrts = 7 TeV pp collisions. Due to the large heavy quark production cross-sections, these data provide unprecedented samples of heavy flavoured hadrons. The first results from LHCb have made a significant impact on the flavour physics landscape and have definitively proved the concept of a dedicated experiment in the forward region at a hadron collider. This document discusses the implications of these first measurements on classes of extensions to the Standard Model, bearing in mind the interplay with the results of searches for on-shell production of new particles at ATLAS and CMS. The physics potential of an upgrade to the LHCb detector, which would allow an order of magnitude more data to be collected, is emphasised.

The LSST camera will have more than 3000 video-processing channels. The readout of this large focal plane requires a very compact readout chain. The correlated "Double Sampling technique", which is generally used for the signal readout of CCDs, is also adopted for this application and implemented with the so called "Dual Slope integrator" method.We have designed and implemented an ASIC for LSST: the Analog Signal Processing asIC (ASPIC). The goal is to amplify the signal close to the output, in order to maximize signal to noise ratio, and to send differential outputs to the digitization. Others requirements are that each chip should process the output of half a CCD, that is 8 channels and should operate at 173 K.A specific Back End board has been designed especially for lab test purposes. It manages the clock signals, digitizes the analog differentials outputs of ASPIC and stores data into a memory. It contains 8 ADCs (18 bits), 512 kwords memory and an USB interface. An FPGA manages all signals from/to all components on board and generates the timing sequence for ASPIC. Its firmware is written in Verilog and VHDL languages. Internals registers permit to define various tests parameters of the ASPIC. A Labview GUI allows to load or update these registers and to check a proper operation.Several series of tests, including linearity, noise and crosstalk, have been performed over the past year to characterize the ASPIC at room and cold temperature.At present, the ASPIC, Back-End board and CCD detectors are being integrated to perform a characterization of the whole readout chain.

LHCb is the experiment at the Large Hadron Collider at CERN designed for performing studies of CP-symmetry violation and rare decays of B-hadrons. Its calorimeter system allows to trigger on photons and electrons by associating the information from a scintillating pad signing charged particle (SPD), a pre-shower tagging electromagnetic particles (PS), an electromagnetic calorimeter (ECAL) and a hadronic calorimeter (HCAL). We present the principles and procedures for the fine time-alignment throughout the commissioning and the first collision phases. We give a particular emphasis to the choices made in the electronic design of the calorimeters to deal with the signal shape and spill over. Also we summarise the achieved levels of synchronisation.

An overview of ongoing studies on the Hamamatsu H-8500 Multi-Anode Photomultiplier (MaPMT) is presented. This device will be used for the FDIRC Particle Identification Detector (PID) of the SuperB experiment. The H-8500 MaPMT has been chosen for its excellent single photon timing capabilities and its highly pixilated design. Results on timing studies, gain uniformity, single photoelectron detection efficiency uniformity and cross-talk are presented.

The DIRC-like time-of-flight detector (FTOF) is a ring imaging Cherenkov counter designed to improve the charged particle identification on the forward side of SuperB. Here we review the main characteristics of this device, summarize the results of a prototype test done last year in the SLAC Cosmic Ray Telescope and present the future steps needed to build the FTOF.

The science focal plane of the Large Synoptic Survey Telescope is made up of 21 modules designated "raft towers". Each raft tower module (RTM) is an autonomous, fully-testable and serviceable 144 Mpixel imager consisting of nine highly-segmented CCDs with complete readout electronics chain. To minimize noise and obscuration the RTM is housed in a compact enclosure fully contained within the camera cryostat. The RTM is required to meet strict performance goals for image plane flatness, readout speed, noise, and power dissipation. Key components include the 4K x 4K fully-depleted CCDs with 16 outputs each, ceramic CCD support structure, and ASIC electronics for video processing and clock/bias generation. In addition to CCD signal handling, the RTM electronics also includes monitoring for temperature, voltage, and current, makeup heater control, ASIC configuration and readback, powerdown modes, and specialized diagnostic outputs. Digitized data are transmitted out of the camera cryostat over a single 3Gb/s serial link.We describe the conceptual design of the CCD array, front and back end electronics, and mechanics, then discuss test system integration and present initial measurements of flatness metrology, optical, electronic, and thermal performance.

An overview of the electronics chains for the two charged particle identification (PID) detectors of the SuperB experiment is presented. The PID group is designing different detectors for the barrel (FDIRC) and forward (FTOF) regions. Both are based on time measurements, respectively in the 100 ps and 10 ps rms resolution domains.

The ATLAS detector has been designed for operation at the Large Hadron Collider at CERN. ATLAS includes electromagnetic and hadronic liquid argon calorimeters, with almost 200,000 channels of data that must be sampled at the LHC bunch crossing frequency of 40 MHz. The calorimeter electronics calibration and readout are performed by custom electronics developed specifically for these purposes. This paper describes the system performance of the ATLAS liquid argon calibration and readout electronics, including noise, energy and time resolution, and long term stability, with data taken mainly from full-system calibration runs performed after installation of the system in the ATLAS detector hall at CERN.

The ATLAS detector has been designed for operation at CERN's Large Hadron Collider. ATLAS includes a complex system of liquid argon calorimeters. The electronics for amplifying, shaping, sampling, pipelining, and digitizing the calorimeter signals is implemented on the Front End Boards (FEBs). This paper describes the design, implementation and production of the FEBs and presents measurement results from testing performed at several stages during the production process.

A full custom analog CMOS circuit for obtaining a photomultiplier readout with a 16 bit resolution over 7 V has been developed. It is part of the R&D program for the photomultiplier tube front-end readout of the Pierre Auger Observatory northern site. It performs signal duplication and amplification with three gains: 0.15, 1 and 6. Each amplifier has a resolution of 10 bit and can measure signals with durations of several microseconds with a good baseline stability, for an input charge of up to tens of nano-Coulombs. The amplification is performed by current feedback amplifiers with a bandwidth of 60 MHz. The input impedance, adapted to the coaxial cables, is stable over the whole working range.A prototype was submitted in April 2004 and successfully tested. The linearity over the working range is less than 1%. It was also successfully tested on the Auger surface detector element installed at Orsay (comprised of a Cherenkov water tank equipped with Photonis XP 1805 9" diameter photomultiplier tubes). The resolution over 7 V is 16.6 bit. This circuit is the first step towards a "system-on-a-chip" (SoC) solution for a photomultplier tube readout equipped with a fast ADC for signal digitization. A setup using a single cable for both the signal and the photomultiplier high voltage power supply was shown to be successful. (c) 2006 Elsevier B.V. All rights reserved.

A new type of ring-imaging Cherenkov detector is being used for hadronic particle identification in the BaBar experiment at the SLAC B Factory (PEP-II). This detector is called DIRC, an acronym for Detection of Internally Reflected Cherenkov (Light). This paper will discuss the construction, operation and performance of the BaBar DIRC in detail.

The construction and beam test results of the ATLAS electromagnetic end-cap calorimeter pre-production module 0 are presented. The stochastic term of the energy resolution is between 10% and 12.5%GeV1/2 over the full pseudorapidity range. Position and angular resolutions are found to be in agreement with simulation. A global constant term of 0.6% is obtained in the pseudorapidity range 2.5<η<3.2 (inner wheel).