A new concept for full-wafer processing and testing for semiconductor laser fabrication in the AlGaAs-GaAs material system will be presented. The approach is based on chemically assisted ion beam etching for the laser-mirror formation. The technique routinely provides excellent mirror quality with mirror roughness of less than 200 angstrom, resulting in mirror reflectivities of about 30% and scattering losses of less than 2%. Lasers with two etched mirrors have been fabricated that show equivalent output power/current (P/I) characteristics to lasers on the same wafer with both mirrors cleaved, up to more than 40 mW (CW) for uncoated mirrors. Single-mode operation exceeding 50 mW output power has been achieved for an SQW-GRINSCH ridge laser structure with coated, etched mirrors.Furthermore, the etching technique has been used to fabricate special devices and structures for on-wafer parametric laser and beam property characterization. This new approach to full-wafer testing allows efficient on-wafer functional testing of a large number of lasers on a 2-in wafer, with considerable improvement in testing throughput. The concept also incorporates many test sites for process characterization which provide important feedback for process improvement/optimization. In addition to the above advantages of full-wafer processing and testing, the availability of high-quality etched mirrors will provide the potential for lasers with specially shaped mirrors, and will open up new opportunities for opto-electronic integration. The approach described has been developed for lasers to be used in optical storage at wavelengths of 830 and 856 nm. However, the basic concept can be applied to semiconductor laser fabrication in any other material system and wavelength range. The major difference will be the adaptation of the mirror-etching process to the composition of the material.

A new approach for large-scale semiconductor laser fabrication is presented. In this ‘‘full-wafer processing and testing’’ concept, the mirrors are fabricated, not by cleaving the wafer but by forming them by means of a chemically assisted ion beam etching process. This allows for on-wafer mirror passivation and testing of the finished devices. Full-wafer technology changes the traditional way of discrete device fabrication and testing to a method more akin to today’s very large-scale integrated (VLSI) technology. Consequently, it provides similar advantages in cost and throughput. Additionally, it allows other electrical and electro-optical device components to be monolithically integrated on the wafer. Currently, we are routinely fabricating AlGaAs/GaAs diode lasers with a single quantum well graded index separate confinement heterostructure (SQW-GRINSCH)-type ridge structure using full-wafer technology. Such lasers exhibit excellent beam properties in single mode up to at least 50 mW output power. Their functional characteristics are indistinguishable from comparable lasers with cleaved facets obtained from the same wafer for comparison purposes. This result reflects the high quality of the etched mirrors. Typically, their surface roughness is less than 200 Å, with mirror reflectivities of about 30% and losses due to mirror scattering below 2%. Having functional parts on the uncleaved wafer allows automated full-wafer testing that encompasses wafer characterization and part screening. This not only eliminates part handling, with its associated yield loss, it also permits a much expanded scope of testing in a fraction of the time previously required.

A Josephson sampler with 2.1 ps resolution is reported. The sampler was made with Nb edge junctions, and consists of a sampling junction to which a Faris pulser is coupled directly. Two experiments are connected to the sampler: a two-junction interferometer and another Faris pulser. A new and simple electronic delay allows a flicker-free display on an oscilloscope of the waveform sampled. A current sensitivity of 0.8 μA was achieved. It was possible to measure the switching transitions of the two-junction interferometer over its whole vortex boundary, including vortex-to-vortex transitions which occur at low bias currents. To our knowledge, this is the fastest Josephson sampler made to date.

An electronically adjustable time delay circuit for superconducting technology is reported. In conjunction with a superconducting sampler on the same chip, the delay circuit has allowed measurement of waveforms with an apparent resolution of 8.5 ps. The delay circuit permits flicker-free oscilloscope displays of fast waveforms, and provides the circuitry needed for further speed advances in superconducting sampling and other ultra-fast measurement techniques.

The paper first summarizes requirements for a main memory with Josephson junctions and reviews the work carried out on an experimental main memory model containing an array of single-flux-quantum cells, line drivers, and address decoders with a total of nearly 4500 Josephson junctions. In the second part, theoretical and experimental investigations on the y drive system, including sense circuit, are presented. The investigations deal with both the read and write phases. Finally, the on-chip logic circuits and the address decoders are discussed, and the experimental results presented. Drivers and decoders based on the principle of current steering in superconducting loops are intended to be used on a fully populated main-memory chip.

Applications of superconductivity in electronics are mainly based on the Josephson effect. After an introduction to the Josephson effect, its applications in computer circuits and in magnetometers will primarily be described.

Detailed investigations have been carried out on two-junction interferometers. These devices have potential as memory elements. Information is stored as single-flux quanta (SFQ cells) in overlapping vortex modes and is destructively read out by switching from a vortex to the voltage state. The devices are fabricated with a lead alloy and the junction oxide is formed by rf oxidation. Most investiga...

Schottky-barrier field-effect transistors have been realised in silicon epitaxial films on high-resistivity silicon substrates. The 1 μm wide gates are produced by projection-masking techniques. The maximum transconductances observed are 42 mA/V per mm gate length; the maximum frequency of oscillation fmax was 8 GHz.