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T.M. Mak received the graduate degree from Hong Kong Polytechnic University. He is a technologist with Intel Corporation's Sort/Test Technology Development Group, working on test methodology development. He has been with Intel for more than 27 years and has worked on a variety of areas including test development, product engineering, design automation, and design for test. He mentored MARCO/FCRP (Focus Center Research Program) research for five years. He twice (1997 and 2004) received the SRC Outstanding Industrial Mentor Award. His current research interest ranges from defect based testing, fault effects as a result of nanometer technology, circuit level, and physical design test issues, IO interface and analog testing, fault tolerant and on-line testing. He received the best paper award in 2004 International Test Conference and a best panel award from 2004 VTS. He currently holds 14 patents with one more pending. He is a senior member of the IEEE.
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论文共 35 篇作者统计合作学者相似作者
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VLSI Test Symposiumpp.1-6, (2013)
IEEE Transactions on Very Large Scale Integration (VLSI) Systemsno. 9 (2012): 1621-1633
IEEE Transactions on Computersno. 4 (2012): 448-457
ICCADpp.191-196, (2009)
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