飞思卡尔半导体(Freescale Semiconductor)是全球领先的半导体公司,全球总部位于美国德州的奥斯汀市。专注于嵌入式处理解决方案。飞思卡尔面向汽车、网络、工业和消费电子市场,提供的技术包括微处理器、微控制器、传感器、模拟集成电路和连接。飞思卡尔的一些主要应用和终端市场包括汽车安全、混合动力和全电动汽车、下一代无线基础设施、智能能源管理、便携式医疗器件、消费电器以及智能移动器件等。在全世界拥有多家设计、研发、制造和销售机构。Gregg Lowe是总裁兼CEO,该公司在纽约证券交易所股票代码(NYSE):FSL,在2013年投入了7.55亿美元的研发经费,占全年净销售额的18%。 2015年2月,飞思卡尔与 NXP达成合并协议,合并后整体市值 400 亿美金。并购将在2015年下半年彻底完成。交易完成后,飞思卡尔股东将获得 6.25 美元 + 0.3521 NXP 股份 / 每股 的回报,占合并后公司 32% 股权。同时,飞思卡尔市值将达到 118 亿美金,合并后实体整体市值达到含债 167 亿美金。
Thermally enhanced PBGA (TEPBGA) package with internal heat spreader is becoming more and more popular due to the ever growing power dissipation requirement of the advanced CMOS logic devices. The additional stiffness provided by the Cu heat spreader also helps the package to remain flat during SMT reflow process. However, it has been observed that, in some cases, TEPBGA package would show large warpage in accelerated stress test such as air temperature cycling. The excessive warpage may increase yield loss during test. In this work, room temperature package warpage of TEPBGA package after temperature cycling were examined with three types of Cu alloys together with factors like stress condition and bill of material. In-situ monitoring with strain gages attached on the heat spreader was performed to understand the deformation behavior of package during temperature cycling. Hardness test on Cu heat spreaders was done at different stages of the stress. The correlation between the warpage and Cu material properties is discussed. A finite element model was also created to assess the impact of cycling condition on the thermal stress and driving force for package warpage. The results of these analyses will be used to provide a robust solution to ensure the flatness of TEPBGA package in temperature cycling. Finally, the packages were assembled to PCB board and solder joint reliability tests were performed to understand the impact of package warpage on solder joint reliability.
Die attach film(DAF) has being widely applied to various high density packages due to its bleedless, consistent bond line thickness and simple operation without dispensing even skip cure post attachment compared with traditional liquid-type die attach material. However, void always is one of major concerns, especially for DAF applied between die and substrate in plastic ball grid array packages. In this paper, the thermal history of DAF for encapsulated units is analyzed since it is put into assembly and the experiment is designed with different thermal history to illuminate its impact on void performance. Simultaneously void formation mechanism also is studied by tracking void status during the whole assembling process. As the result, it was shown that the void issue is caused by insufficient gap filling and thermal history play an important role in gap filling capability. Based on thermal history analysis, heating at wire bond process is a key step due to its long staging time and high temperature. DAF with short thermal history has super gap filling capability. Even voidless result can be achieved if skipping heating at wire bonding compared with about 10% void percentage for encapsulated samples under normal building condition. It can be explained that cross-link occurs under thermal condition and gap on the substrate can not filled completely because it became rigid. Scenarios for void reduction also are addressed based on this investigation in this paper.
A study was conducted on BGA lead-free C5 solder joint system to assess the effect of Germanium addition to Sn3.5Ag solder alloy through comparison study of Sn3.5Ag vs. Sn3.5AgGe. The main objective of this study is to find a way to resolve solder surface oxidation after thermal processes, while determining if there’s any adverse effect on the solder joint by Germanium addition. The result of this study showed that addition of Germanium in Sn3.5Ag C5 solder system resolved solder surface oxidation after thermal processes, without any negative impact to the solder joint and solderability. Experimental works were carried out to observe the melting properties and solder surface morphology by Differential Scanning Calorimetry (DSC) and SEM. Solder surface oxidation was measured by EDX. Shear and pull strength was measured by Dage which is representative of the intermetallic (IMC) strength between the C5 solder sphere and Cu/Ni/Au pad finishing. Solderability test was conducted per Jedec standard. Tray and Packaging Drop Tests were done to gauge solder joint performance against impact force. A comprehensive study was done to study the effect of microstructure and interface intermetallic of both solder system at ambient, high temperature storage (HTS) at 150ºC for 24, 48, 96, 168, 504 and 2000 hours and multiple reflow of 1x, 2x, 3x, 6x towards the joint integrity. In each read point, Sn3.5AgGe has significantly higher ball shear and ball pull strength. EPMA microstructure analysis after cross-sectioning on bulk solder and IMC revealed traces of Germanium that contributed to the significant increase in ball shear and ball pull strength, while did not cause any bulk solder and IMC morphology changes. Both solderability and drop test passed. In conclusion, addition of Germanium in Sn3.5Ag lead-free solder is able to resolve surface oxidation problem after thermal processing, with improvement in solder joint strength for overall lead-free package robustness.
Copper (Cu) ball on gold (Au) bump (COG) bonding is developed as a practicable approach to solving the challenges posed by Cu wire bonding on large-scale integrated circuit devices. In the COG bonding, there are two interfaces, Cu-Au and Au-Al couples, which is totally different from either Cu or Au wire bonding. In this paper, the COG bonding is studied on an experimental chip of 69um bond pad opening and 4-layer central via pattern design with current wire bonders. Tests of wire pull, ball shear and crater are adopted in investigating the bonding strength at the interfaces and the potential damage of the underlying metals of bond pads after the COG bonding. The intermetallic compounds (IMC) formation at the two interfaces, Cu-Au and Au-Al couples, are studied on the cross-sectioned assembled samples. Two kinds of stress tests, High Temperature Baking (HTB) and Temperature Cycle (TC) are used to investigate the IMC change and growth. The results show that qualified bonding strength on all of bond pads exists and no damage such as crater is observed on the underlying metals of the bond pads after chemical etching. At the Au-Al interface, a comparable Au-Al IMC is formed on as-bonded samples, and it gradually grows thick after the stress tests and its corresponding content also changes along with temperature and time. But in contrast there is no observable formation of Cu-Al IMC at the Cu-Au interface on as-bonded samples. Undergoing 1008 hours HTB at 175oC, only a very thin Cu-Au IMC appears at the Cu-Au interface. After all, the Cu-Au IMC appearance hardly affects the IC’s mechanical performance.
Power Quad Flat No-lead (PQFN) packages are extensively used in automotive applications. Features such as solder die attach material, thick copper lead frame, exposed heat sink and heavy gauge aluminum wire, are adopted to ensure good thermal management and reliability performance. Solder voids, cavities formed between power die and lead frame during solder reflowing process, are major defects in die bonding process, and are detrimental to packages’ thermal, mechanical and reliability performances. In this study, the effects of solder voids on the thermal performance of PQFN package are first evaluated by numerical simulation. The thermal response of the package is predicted for different void sizes and locations. The solder voids raise slightly the junction temperature of the package when the voids do not cover a major portion of the die attach area. Then, the effects of the solder voids on the package’s reliability performance are assessed by carrying out two tests, Temperature Cycling (TC) and High Temperature Operating Life (HTOL), to the actual samples of different void sizes and locations. The electrical function inspection and Scanning Acoustic Microscope (SAM) inspection are performed to the samples at planned time points to find any electrical and mechanical failures. No functional failure or abnormal delamination has been observed throughout 500 cycles of the TC test and 408 hours of the HTOL test.