瑞萨电子

As the wiring of LSI devices continues to shrink, the pitch of the bonding pads becomes smaller and smaller. This makes it more difficult to form connections using flip chip bumps and increases the cost of the interposer substrate. A direct fanning-out packaging technology, named as “SIRRIUS”, gives a solution for this problem. The SIRRIUS package consists of a Cu base plate, a fine-pad-pitch embedded LSI chip, built-up resin layers, and multi-layer fanning-out wiring. An experiment in which chips with 80-μm-pitch, four rows of pads are embedded clarifies that using a low-viscosity resin and optimizing its thickness are important for achieving fine-pitch interconnects with high reliability. By measuring the displacement of the mounted chips and laser vias, and improving their position accuracy, the feasibility of fabricating the SIRRIUS package with a lump method is demonstrated. A 31-mm-square, 900-pin-count SIRRIUS package with three-layer wiring, 15 μm wide, is successfully fabricated. Its total thickness is only 0.69 mm including the Cu plate. Evaluation of package-level and board-level reliability show no electrical failures or cracks after 600 and 1000 cycles, respectively. Our “SIRRIUS” package has following features; 1) small package thickness, 2) low cost process due to directly connecting the Cu plating to fine-pitch LSI pads, and 3) high heat dissipation, low package warpage and high reliability, due to the rigid Cu plate. Therefore, the SIRRIUS package is an attractive approach to achieving thin and highly reliable fine-pad-pitch system LSI packages for replacing FCBGA packages.

This paper presents the RX VPU, a newly developed Vector Processing Unit (VPU) designed as a coprocessor for the RX series of embedded microcontrollers. The RX VPU adopts a variable-length vector architecture and features a compact, low-power implementation suitable for embedded systems. It is specifically designed to accelerate CNN inference on embedded devices while maintaining low power consumption. The RX VPU provides instructions optimized for int8-quantized CNNs, which are widely used in embedded inference workloads, enabling efficient execution of compact CNN models. The architecture is particularly optimized for anomaly detection workloads using int8-quantized CNN models, where inner-product accumulation operations account for approximately 40% of all executed instructions. This work introduces a 4× widening reduction MAC instruction that accelerates these operations within a single instruction. Using this instruction, inference throughput on the Arm ML-Zoo anomaly detection model improves by 1.85×, achieving up to 30.0 inference/s. The coprocessor also achieves 1025.6 GFLOPS/W at 600 MHz, demonstrating that highly efficient ML inference can be achieved even under stringent power and area constraints.

Background Despite high recanalization rates with endovascular thrombectomy for large vessel occlusion stroke, a large proportion of patients remain disabled. This study aims to investigate the clinical impact of persistent hypoperfusion that was detected immediately after recanalization. Methods In this multicenter retrospective study of patients with large vessel occlusion with near‐complete or complete recanalization, perfusion maps were generated from post‐recanalization digital subtraction angiography. Focal hypoperfusion within the ischemic territory was detected and categorized as regional or cortical according to spatial distribution. The primary outcome was 90‐day functional independence (modified Rankin Scale 0 to 2). The associations of no‐reflow and outcomes were examined by multivariable logistic regression. Results Among 375 patients (median age 69 [interquartile range 57–77] years; 67.5% men), persistent hypoperfusion was detected in 29.6% of patients. Patients with hypoperfusion had higher baseline National Institutes of Health Stroke Scale (median 14 versus 12, P=0.076) and more thrombectomy passes (P=0.021). The presence of persistent hypoperfusion was strongly associated with reduced functional independence (adjusted odds ratio [aOR]=0.23, 95% CI 0.13–0.39, P<0.001), higher rates of hemorrhagic transformation (aOR=1.88, 95% CI 1.14–3.11; P=0.013) and symptomatic intracranial hemorrhage (aOR=2.95, 95% CI 1.20–7.23; P=0.018). Quantitative analysis revealed minimum regional cerebral blood flow as a key factor of functional outcome (aOR=1.67, 95% CI 1.07–2.60; P=0.023). There is no significant agreement with 24‐hour computed tomography perfusion‐defined hypoperfusion (κ=0.106, P=0.524). Conclusions Persistent hypoperfusion could be detected immediately post‐recanalization in one‐third of successfully treated large vessel occlusion strokes. The adverse impact to functional outcome highlights its potential as an intraprocedural biomarker for future adjunctive therapies.

This paper presents a topology-driven organic interposer design methodology for achieving RDL layer reduction in automotive Universal Chiplet Interconnect Express Advanced (UCIe-A) 2.5D chiplet packages while preserving signal integrity and manufacturability. By explicitly analyzing dominant crosstalk mechanisms in the bump-under region, the proposed methodology derives practical topology modifications based on via-row conversion and optimized ground (GND) shield placement under mass-producible design-rule constraints. The dominant crosstalk contributors are first identified and ranked using an X32 UCIe-A interface to enable clear attribution of inter-signal-layer, PAD-to-RDL, and multi-level crossing effects. Based on these insights, the topology-driven approach is extended to a full X64 interface representative of automotive applications. Cumulative distribution function (CDF)-based aggregate far-end crosstalk (FEXT) evaluation at 16 GHz, corresponding to the Nyquist frequency of a 32 Gbps NRZ signal, is employed to efficiently screen design variants and capture worst-case victims governing parallel-bus eye closure. Final signal integrity is validated through 32 Gbps eye-diagram simulations. Simulation results demonstrate that the proposed topology-driven design enables up to four-layer RDL reduction (e.g., from 10 to 6 layers) while preserving UCIe-A compliance, suppressing P95 and worst-case aggregate FEXT, and maintaining robust 32 Gbps eye openings. This work provides a scalable and manufacturable framework for cost-effective organic interposer design in high-reliability automotive UCIe-A 2.5D chiplet packages.

This work investigates the impact of gamma $(\gamma)$ radiation on the performance metrics (quality factor and insertion loss) of a thin-film piezoelectric-on-silicon (TPoS) resonator, as well as the phase noise of the oscillator employing that resonator. The TPoS resonator is integrated into a sustaining oscillator circuit using a radiation-hardened hex inverter (AP54RHC04), enabling robust operation in radiation-prone environments. The oscillator was subjected to a cumulative exposure of approximately 1,009,968 mR from a Cobalt-60 source, delivered in two stages: a low-dose phase (809,568 mR over 24 hours) followed by a high-dose phase (200,400 mR over 25 minutes). Performance metrics were evaluated before and after these exposures to assess radiation-induced degradation. The results demonstrate the strong robustness and resilience of the oscillator; despite the total dose, the quality factor $(Q)$ of the resonator degraded by approximately 10%, the insertion loss (IL) increased modestly by 1.2 dB, the resonant frequency exhibited a stable shift of approximately 46.7 ppm, and the oscillator phase noise exhibited a minimal degradation of approximately 3 dBc/Hz at a 1 kHz offset frequency.