This work investigates receiver linearization in a four-antenna multiple-input multiple-output (MIMO) system operating in the presence of a strong blocker. The received signals are first spatially combined using either maximal ratio combiner (MRC) or zero-forcing combiner (ZFC), followed by a dual-input digital post-distortion (DI-DPoD) stage that compensates for nonlinear distortion generated by low-noise amplifiers (LNAs) driven into compression. The DI-DPoD model is derived from a prior calibration of the receiver's nonlinear behavior and leverages both the desired and blocker components at the combiner output. Measurement-based results show that DI-DPoD reduces distortion-induced error power by approx. 20 dB beyond the combiner output, achieving nearly identical normalized mean squared error (NMSE) performance for both ZFC and MRC-based front ends across varying blocker powers, signal-to-noise ratio (SNR) levels, and angles of arrival. The findings highlight the importance of jointly exploiting spatial selectivity and calibrated nonlinear modeling for robust wideband receiver linearization.
A $\mathbf{2 9 0 - G H z}$ push-push square mixer implemented in $\mathbf{2 8}-\mathbf{n m}$ CMOS for sub-terahertz wireless transmitters is presented. Achieving high output power near 300 GHz in CMOS is challenging because mixers often serve directly as the transmitter output stage without a dedicated power amplifier. In the proposed architecture, the LO signal is applied to the gate while the IF signal is injected at the source, enabling improved isolation and independent optimization of LO switching and IF drive conditions. Simulation results show that this injection scheme provides higher $\mathbf{R F}$ output power than conventional mixers. The mixer is biased at $V_{G}=0.8$ Vand driven with $P_{L O}=$ 10 dBm to maximize output power before compression. With an on-chip LO balun and optimized matching network, the prototype achieves -14.8 dB peak conversion gain and -9.3 dBm output power at 290 GHz. Compared with prior CMOS mixers near 300 GHz, the proposed design achieves competitive output power.
This paper presents a power amplifier (PA) for cellular handsets operating in the frequency range 3 (FR3) band that employs distortion compensation. The compensation circuit uses a vector-sum phase shifter in which the phase is controlled by the envelope amplitude, thereby flattening the PA's AM/PM characteristics. The PA was fabricated using a GaAs HBT process. Continuous-wave (CW) measurements at 8 GHz achieved flat AM/PM behavior and peak gain and power-added efficiency (PAE) of 32 dB and 42%, respectively. Measurements with modulated signals yielded an adjacent-channel leakage ratio (ACLR) of -37.4 dBc and an error vector magnitude (EVM) of –34.5 dB, representing improvements of 7 dB relative to operation without distortion compensation.
Line modes emerging at the edge of 2D Chern photonic topological insulators (PToIs) exhibit robust unidirectionality and immunity to disorder and perturbations. When identical line modes are placed in close proximity, far-end crosstalk is inherently suppressed because backscattering is topologically forbidden. However, near-end crosstalk (NEXT) becomes a severe problem. The underlying cause for NEXT is the dispersion crossing of the neighboring line modes within the topological bandgap. Here, we demonstrate that dispersion engineering of coupled line modes provides an effective route to suppress NEXT. We introduce a simple fabrication approach for realizing Chern topological lines by employing permanent magnets to bias YIG-based PToIs. The magnets are modeled to ensure the required magnetic bias profile. Both simulations and experiments confirm $\geq 20 ~\text{dB}$ NEXT suppression between two topological line modes separated by only a few unit cells.
This paper presents a wideband phase-invariant variable gain amplifier (VGA) adopting a gain core and matching network (MN) co-design technique. The core-MN codesign methodology expands the design space by incorporating the phase variation of the MNs, which was often overlooked in conventional designs. This approach enhances design flexibility and enables wideband phase compensation. Specifically, by configuring the gain-dependent phase variation (GDPV) of the MNs and the active gain core to exhibit opposite polarities, the overall GDPV of the VGA is minimized and flattened across a wide frequency range. Implemented in a 28 nm CMOS process, the VGA achieves a peak RMS phase error (RMSPE) of 1.38° and a peak GDPV of 2.78° with a gain tuning range (GTR) of 21 dB within the $\mathbf{S}_{\mathbf{2 1}}$ 3-dB bandwidth $\boldsymbol{(} \mathbf{1 0. 9 - 2 3. 6} \text{GHz} \boldsymbol{)}$.
This paper presents a new class of load-modulated power amplifiers (PAs), named as the inverse-balun load-modulated power amplifier (IBMA). For the first time, it is discovered that one coupled-line-based balun topology can be reconfigured from a 180° power combiner to a 0° power combiner by performing the short-to-open transformation at each termination. Building on this newly identified 0° power divider/combiner, the IBMA is introduced. Similar to existing load-modulated PAs, IBMA employs one main amplifier and one auxiliary amplifier adopting Doherty-like biasing, with the two common-mode ports of the inverse balun combined into one main branch. However, unlike conventional Doherty PAs or load-modulated balanced amplifiers (LMBAs), the IBMA achieves ultra-wide bandwidth using only two transistors as the core amplifying blocks. To validate the proposed architecture, a GaN-based IBMA prototype is designed and fabricated on PCB, covering 1.3-3.3 GHz. Experimental results demonstrate a peak output power efficiency of 40-61, 6-dB output back-off (OBO) efficiency of 40-53%, and an output power of 41-44 dBm across the band.
This paper presents a Ku-band continuous-mode harmonic-tuning Doherty power amplifier (CMHT-DPA) using $0.12-\mu \mathrm{m}$ GaN HEMT MMIC technology. Detailed design considerations of the broadband impedance-inverting network (IIN) and phase compensation network (PCN) are discussed and implemented, together with the continuous-mode loading (CML) for achieving wideband operation while maintaining high output power back-off (OBO) efficiency. Measured results show that the proposed DPA exhibits a $\mathrm{P}_{\text{sat }}$ of $3 8. 7 ~ \text{d B m}$, with a peak PAE of 31.3% and a PAE of 28.2% at 6-dB OBO. The small-signal gain is up to 17.9 dB within the 3-dB bandwidth from 13.6 to 16.4 GHz, corresponding to an 18.7% fractional bandwidth. Compared to previously published GaN DPAs in a similar frequency range, the proposed DPA achieves the highest efficiency at both saturation and 6-dB OBO and the largest fractional bandwidth, with the obtained FoMs among the best.
This work presents a wideband D-band low-noise amplifier (LNA) realized in a 40-nm bulk CMOS technology. A five-stage differential common-source architecture is employed to achieve high gain and low noise figure (NF). Broadband interstage matching is accomplished using doubly-tuned transformer networks. The proposed LNA delivers a peak gain of 22.3 dB at 139.5 GHz and achieves a minimum NF of 6.2 dB at 123 GHz. The LNA provides a 3-dB bandwidth spanning from 118.6 - 155.9 GHz, corresponding to a fractional bandwidth (FBW) of 27.2%, which is the widest bandwidth among recently reported D-band CMOS LNAs. The design consumes 61.5 mW dc power, exhibits an input 1-dB gain compression point ($I P_{1 d B}$) of -27 dBm, and occupies an area of 0.636 mm2.
A quantum random phased array (QRPA) for physical layer covert communication is presented. The QRPA uses true quantum shot noise to temporally mask the beam state, eliminating the need for pre-shared random sequences. The proposed electronic-qubit (E-Qubit) circuit consists of a microwave phase shifter coupled to a tunable quantum random number generator (tQRNG). Progressive phase offset between multiple E-Qubits produces a steerable directional beam with an adjustable probability of occurrence. The tQRNG is validated using the NIST SP 800-22 statistical test suite, verifying highentropy randomness. Experimental results at 5.25 GHz demonstrate a tunable relative phase shift of 165.7° under varactor voltage bias control. A four-element array simulation verifies the system's beampatterns, including a directional covert beam that occurs 0.33% of the time. This work demonstrates that non-deterministic quantum noise can drive tunable beam switching for advanced low probability of detection (LPD) applications and high-level security.
This work presents an analog pre-distortion (APD) linearizer that employs a piecewise linear shape to accurately approximate the nonlinear inverse characteristics of a power amplifier (PA). The APD amplitude characteristic is realized using a cascade of two nonlinear diode impedances, designed to enter conduction at different input amplitudes. The APD phase characteristic is achieved with a dual-branch architecture, a delay line, and an attenuator. The APD bandwidth is 3 to 5 GHz, and it is able to replicate the inverse PA characteristics with a gain error of 0.2 dB, and phase error of 0.4° at 3.8 GHz. As compared to the PA-only case, this APD improves by up to 21 percentage points the normalized root mean square error (NRMSE) and by up to 14 dB the adjacent channel leakage ratio (ACLR). With its wideband, DPD-like performance, this piecewise APD offers a viable replacement for digital linearizers.
This paper proposes a segment-refined Adaptive Gaussian Mixture of Experts (AGME) Digital Predistortion (DPD) model that intelligently allocates modeling resources to efficiently linearize power amplifiers (PAs) with strong local nonlinearities. The method utilizes Gaussian radial basis functions (GRBFs) for smooth soft-partitioning of the PA's input amplitude range. Central to the approach is a residual-driven algorithm that identifies the most nonlinear amplitude regions. This allows the framework to adaptively augment the model by applying specialized expert models exclusively to the critical nonlinear amplitude regions, while leaving the model structure in other regions unchanged. Experimental results on a Doherty PA with a OFDM 100 MHz signal demonstrate that the proposed method achieves a superior ACPR of $\mathbf{- 4 9 d B c}$, representing a 2 dB improvement over the GMP, while utilizing significantly fewer coefficients.
This paper presents a generalized interdigital bandpass filter that simultaneously achieves wideband flat group-delay (GD) and magnitude responses using tapped-feeding and unequal-length coupled lines. Four filters centered at 3.5 GHz with target GDs of 2.35, 2.40, 2.45, and 2.50 ns are designed and fabricated, each providing over 500-MHz(14.3%) bandwidth, a maximum GD variation of 0.03 ns, and insertion loss below 2.5 dB. The fabricated filters occupy a compact $12.5 \times 12.5 \text{mm}^{2}$ footprint, corresponding to $\left(\lambda_{g} / 4\right)^{2}$
We demonstrate how quantum annealing can support the design of a electromagnetic structure-a Rotman lens. Since the Rotman lens design space spans several billion configurations and electromagnetic simulation of each design takes several hours, exploring even a small fraction of this space is impractical. To address this, we utilize the quantum annealing combined with a factorization machine in an active learning framework to efficiently identify optimal Rotman designs from minimal data. Our results show that, out of a 249 design space, an optimal design was found in just 1,684 iterations, achieving performance that surpasses that of a conventional genetic algorithm.
This work presents a planar microstrip ferrite isolator that utilizes both the phenomenon of edge-guided propagation and that of absorption due to gyromagnetic resonance. Nonreciprocal transmission is realized through asymmetric stub perturbations, eliminating the need for lossy absorbers or shorted strips and enabling compact, low-cost fabrication. Simulations and measurements confirm low insertion losses of less than 0.9 dB, combined with isolation and reflection coefficients greater than 20 dB over a fractional bandwidth of approximately 11 %. Compared to conventional edge-guided or resonance-based designs, the proposed hybrid approach improves backward-to-forward loss ratio while maintaining a simple planar implementation, providing a practical path toward highly performance, integrable nonreciprocal microwave components.
This work presents a compact wideband LNA employing a 5-in-1 transformer. The design integrates a sourcedegeneration LNA with shunt-series feedback (SD-SSF) and a drain-to-gate transformer feedback path combined with a coupling-tuned resonant tank (CTRT). The design reduces the number of active stages through the current reuse technique, lowering chip area and power consumption while maintaining broadband gain and low noise. Implemented in 65-nm CMOS, the LNA achieves a peak gain of 13.8 dB from 11 to 27.3 GHz, with an in-band noise figure (NF) of $2.5-4.5 ~\text{dB}$ and a minimum NF of 2.5 dB. The circuit occupies a 0.13 mm2 core area and consumes 8 mW, demonstrating efficient wideband performance with reduced size and power.
This work presents a 265–317-GHz 2-way frequency doubler with a wideband asymmetric Marchand balun, implemented in 65-nm CMOS. The proposed balun is realized by asymmetrically adjusting the coupling coefficients and electrical lengths of the two coupled-line sections and incorporating an output phase-compensation segment. EM simulations show amplitude- and phase-imbalance bandwidths $(\pm 1 \text{dB}/\pm 1^{\boldsymbol{\circ}})$ of 30–240 GHz and 116–240 GHz, respectively. Leveraging the asymmetric balun and the 2 -way combining architecture, the doubler achieves a maximum output power of −1.2 dBm at 298 GHz, a 3-dB bandwidth of 52 GHz (265–317 GHz), and more than 40-dBc fundamental rejection over 250–300 GHz, while consuming 410 mW from a 1.2-V supply.
This paper presents an ultra-compact and broadband fully-differential rat-race coupler in 180-nm CMOS process, utilizing a novel folded inverted coupled-line (FICL) structure. By tuning the coupling coefficient $k$ of the FICL, the phase response of the differential transmission line is significantly tailored, enabling a drastic reduction in the electrical length required to achieve a 90° phase shift while simultaneously expanding the operational bandwidth. The prototype achieves a measured insertion loss below 1-dB from 1.93 to 6.65 GHz, with amplitude imbalance under 0.2-dB from 0.8 to 10.47 GHz and phase difference within 2° from 0.8 to 13.59 GHz. Port isolation better than 45-dB is from 1.65 to 6.49 GHz. The core size of the proposed coupler is only $0.774 ~\text{mm} \times 0.874 mm$, corresponding to an exceptionally compact $0.000099 \lambda_{0}{ }^{2}$ at 3.5 GHz. To the best of our knowledge, this work exhibits the smallest footprint and the broadest bandwidth.
Radio-frequency (RF) high-power ($>=500 \mathrm{W}$) plasma systems require fast, tunable impedance matching. However, conventional variable vacuum capacitor (VVC)-based networks suffer from slow mechanical tuning capabilities and wear. Solid-state solutions based on GaN/SiC MOSFETs offer a faster alternative. However, existing approaches either rely on complex multi-device structures or complex control, or are limited in power capability. This work introduces for the first time a low complexity, high-power, switched-capacitor impedance tuning network approach that uses a single MOSFET and a preceding capacitor as the basic switching unit. The method makes use of self-biasing the transistor via its body diode to reduce drain-source capacitance. Furthermore, a topology evaluation framework was implemented to identify networks that reduce the current and voltage stress on the transistors to an acceptable level. The first demonstrator realized using this method was measured at 500 W and 13.56 MHz, paving the way for solid-state, high-power impedance matching.
This paper presents a compact dual-band (DB) filter based on metal insert technology. It consists of three parts and utilizes a parallel connection of two single-band (SB) filters. The two filter case parts are equipped with waveguide (WG) interfaces and establish two isolated channels for SB filters when connected. The metal insert supports two arrays of U-shaped slotline resonators - when loaded into their designated channels, these form two SB filters. To improve selectivity of the SB filters, each channel is complemented with a ridge that enables control of cross-coupling. This allows for the implementation and control of one transmission zero (TZ) above the passband in each SB filter.
This paper presents a $\mathbf{7 - 1 5 ~ G H z}$ IF reflectionless receiver featuring wide operating bandwidth and fast automatic gain control (AGC). The IF reflectionless amplifier (IFRA) absorbs out-of-band reflected signals to suppress the intermodulation interference, thereby achieving flat response and improving the precision of post-stage AGC. The noise self-canceling LNA is implemented with tri-coupled transformer (XFMR) to extend the bandwidth. A dual-stage AGC achieves high accuracy and fast gain control through two feed-forward loops. Verified in a conventional $40-\text{nm}$ bulk CMOS technology, the proposed receiver achieves a $\mathbf{7 - 1 5 ~ G H z}$ RF bandwidth with 2.2 GHz baseband bandwidth. The dB-linear gain error over 25 dB gain range is within $\pm \mathbf{1} \mathbf{~ d B}$. The proposed receiver attains the settling time of $43.8-76.3 \text{ns}$, a noise figure (NF) of 10.6 dB, and an OP1dB of 3.8 dBm. Meanwhile, it supports 500 MHz 64-QAM modulation and 8-channel 100 MHz 64-QAM carrier aggregation (CA).
