Hafnium oxide (Hf02) based ferroelectrics have gained significant attention as non-volatile ferroelectric random-access memories (FeRAM) due to its scalability and integrability in complementary metal oxide semiconductor (CMOS). To enable large scale FeRAM with CMOS integration, a large polarization at low temperature processing and low electric field is essential. Various reports show high polarization at the cost of high processing temperature and higher electric fields. In this paper, we report a low field (3.14 MV / cm) and large polarization (2Pr ~72 $\mu \mathrm{C}/\text{cm}2)$ in atomic layer deposition (ALD) grown (at 200 o C) ferroelectric Hf0.5Zr0.502 (HZO) thin film at lower post metallization annealing at 600o C. We discuss the impact of the source of oxygen from H20 precursor in ALD process in creating O-vacancies during deposition with X-Ray diffraction analysis (XRD). Then we discuss the role of low thermal expansion coefficient of tungsten (W) as top and bottom electrode to induce in -plane tensile strain during annealing to enhance orthorhombic phase (o-phase) - essential to get high polarization. A high dielectric constant $\varepsilon \mathrm{r}\sim 42$ at −3V shows the improved quality of the ferroelectric film. Finally, we discuss the impact of electric field and frequency on the polarization.
Out of various modeling approaches for high electron mobility transistors (HEMT), the physics-oriented models are the most advantageous ones considering accuracy, prediction beyond measured data and scalability, etc. In this regard, we have proposed a simplified compact DC model which captures current-voltage (I-V) and capacitance-voltage (C-V) characteristics of (AlxGa1-x)2O3/Ga2O3 HEMT, the most recent power HEMTs. We have also proposed an RF model that captures unity current gain cutoff frequency and power gain ranging from low frequencies up to MHz of range.
The new generation SOCs requires a thermal solution to maintain temperatures within operating limits. Design and optimization of suitable thermal solution and upfront thermal analysis are key to design thermal friendly design based on all critical workloads in very fast manner. There are two common methods of predicting SOC thermal performance: computational simulation and experimental measurement. These two approaches include complicated operations and experimental setup. Thus, it is quite difficult to build computational simulations that fully capture the complex logical relationships between the properties of a material, geometry, power and their related factors, and some of these relationships may even be unknown. Therefore, there is an urgent need to develop intelligent and high-performance prediction models that can correctly predict the SOC thermal solution at a low temporal and computational cost. In this work, a new methodology for optimization of SOC Thermal Performance process is developed, using Regression-Based Reduced-Order Modelling Techniques. This methodology can be applied to any type of platform configurations to reduce computation effort, results reduction in overall design time and cost. Also, this approach (Implemented through software applications-tool) can be deployed internally as well as customer experience thermal tool, allows customers to predict the optimum thermal solutions tailored to their project requirements. This tool is developed using blending different regression models for better prediction of SOC thermal performance, it comprises different types of heat sink models (extruded, folded fin, heat pipe embedded, and vapor chamber) allows user to select right tradeoff between performance and cost. In this work, a new methodology to estimate thermal performance analysis is demonstrated for complex inhouse SOC with about 100X faster and with about 95% accurate reference to industry solutions available. In this analysis all data are normalized to ensure sensitive design details are protected
Even though multiple reports are available on photodetectors, the problem that still remain unaddressed is the low photoresponsivity while trying to increase the range of detection. In this work, broadband (UV-visible) photodetector was demonstrated by integrating zero-dimensional (0D) WS2-QDs on two-dimensional (2D) monolayer MoS2. WS2-QDs are sensitive to UV light, and MoS2 is sensitive to visible light. The maximum responsivity of the fabricated WS2-QDs/MoS2 device was found to be ~ 392 A/W. In this work, not only the photodetection range but also photoresponsivity is improved, which is a major step in the design of next-generation 2D materials based optoelectronics.
Molecular memristor comprising a Ru-coordinated bis ligated complex has been designed. Depending on different operating conditions such as Voltage and temperature, its current-voltage characteristics changes gradually. Whereas the voltage helps to achieve different molecular conductance states, temperature variation from 300K to 4K can control various supramolecular dynamical components. Imposing different operating conditions can lead to practically all the possible memristive functionalities starting from bipolar, unipolar, volatile, non-volatile, ternary, and binary responses with gradual analog and sharp digital transitions as well as diode characteristics. A mathematical model comprising of multiple parameter design space has been constructed to model all these characteristics.
Smart textiles play a significant role in wearable devices for monitoring the physiological parameters of the human body, such as heart rate, temperature, pressure, etc. The electrocardiograph (ECG) is the most used heart diagnostic tool that records the heart's electrical signals (heart rhythm). The current ECG electrodes used in the hospital for ECG signals are wet electrode types that use Ag/AgCl gel electrodes. Here the Ag/AgCl gel-type electrode sticks on the human skin for an extended period until the ECG reading is wholly taken. The gel used is disposable, sticky, and does not feel comfortable for the user's long-term monitoring. This research has been made to develop ECG electrodes with textile materials. Here the 12-lead ECG was reduced to a 3-electrode system. Two different types of conductive textile materials were used to create electrodes. The nylon yarn coated with the Silver nanoparticle and two-ply yarn of nylon coated with Stainless Steel nanoparticle is taken for the development of conducting material. The conductive yarn is stitched into the cotton fabric using the lock stitch method. The readings were taken by placing the commercial and the textile electrodes parallel on the right arm, left arm, and right leg readings are recorded. The material's morphological structure and surface roughness are analyzed using SEM, and XRD is used to analyze the material's crystallinity. The yarn is tested for its anti-microbial property to investigate the material's biocompatibility. For silver yarn case, the voltage range is -0.4V to 1.2 V, whereas, for stainless steel, the voltage range is from -0.4V to 0.7V. That implies silver yarn is relatively more sensitive than stainless steel yarn for detecting ECG signals
Ferroelectricity in HZO-based thin films and its integration of ferroelectric field effect transistors (FeFET) into standard CMOS platforms has germinated new prospects in the field of non-volatile memory and non-volatile computing. The FeFET has emerged from a theoretical concept to many experimental demonstrations in recent years. FeFETs can be widely used in a variety of fields, including non-volatile memory, neuromorphic computing, logic-in-memory (LiM), and others. This paper proposes a novel silicon-on-insulator (SOI) based junction-less ferroelectric field effect transistor (JLFeFET). Further, an investigation of a non-volatile latch for non-volatile logic-in memory computing is also done using the proposed JLFeFET. The proposed JLFeFET offers huge possibilities for the design of low-power and high-speed non-volatile logic-in-memory applications. Using the TCAD simulations, JLFeFET of 20 nm HfO2 thickness has been demonstrated that achieves a memory window (MW) of 0.34 V. The fabrication flow is also proposed with an easy integration of the JLFeFET device in silicon-on-insulator (SOI) process. Further, the proposed non-volatile latch with JLFeFET displays significantly low power with respect to its non-volatile counterpart implemented using magnetic tunnel junction (MTJ) devices.
This work presents a 5T −2C pixel circuit based on amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) for flexible displays utilizing improved stacked voltage-programmed pixel circuit topology. Due to a low operating voltage of 5 V and reduced programming time of 8 $\mu\mathrm{s}$ , the proposed circuit finds its application in large screen HD displays as it can provide a very high frame rate of 120 Hz. Moreover, a good compensation ability of the proposed circuit against the threshold voltage variations of the driving TFT in the range of −0.2 volts to 2 volts from the nominal voltage of 0.7 volts, makes it suitable for flexible AMOLED displays. The error in organic light emitting diode (OLE D) current is within 0.4% over the range of data voltage (3.8 V to 6 V) when the substrate is subjected to both compressive and tensile strains of $\pm 0.3$ % and within 10% due to threshold voltage variations under electrical stress. The adapted SPICE level-3 flexible TFT model efficiently captures the variations in threshold voltage due to mechanical as well as electrical stress. As a result, the proposed 5 $T$ 2C pixel circuit reveals good performance for applications in low-voltage flexible displays.
This paper presents a 28 GHz source-degenerated cascode low noise amplifier (LNA) in 22 nm fully depleted silicon on insulator (FDSOI) technology with a redistribution layer (RDL) gate inductor. In a source-degenerated cascode LNA, high quality factor (Q) of the gate inductor is necessary to achieve a low noise figure (NF). However, it is hard to push the quality factor of an on-chip inductor beyond a point. This work demonstrates that very high Q inductors can be realized using a multi-layer RDL technology. Taking advantage of the designed high Q RDL inductor, the NF of a millimeter-wave (mmWave) LNA is significantly reduced. Overall, the designed single-stage LNA achieves a 1.29 dB NF, 12.2 dB gain at 28 GHz, with a DC power consumption of 7.7 mW only.
In this paper, we present detailed physical insights into the electrostatic discharge (ESD) behavior of high-voltage amorphous silicon (a-Si:H) thin-film transistors (TFTs). Device architecture which provides a 4-5x times improvement in ESD robustness with the same spatial considerations is discussed. The physics behind the improvement in ESD robustness is explored, and technological parameters' impact on ESD behavior is studied. Transmission line pulse (TLP) characteristics are discussed, and the failure behavior is explored.
Organic electronic devices gained much interest in the last few decades due to their various application in biosensing, gas sensing, photo-sensing, memory device, synaptic devices for neuromorphic computing, flexible electronics application, wearable device, LED, and OPV. Despite all these various applications, organic electronic devices lack behind their inorganic counterpart because of their poor environmental stability. In this study, the effect of light on P3HT OFET was observed in atmospheric conditions. Electrical characteristics showed that p-type doping is high in the presence of light. It was also suggested by the red shift in Raman data and by the change in surface potential after light exposure by Kelvin Probe Force Microscopy analysis.
Cadmium (Cd), popularly used in electroplating, batteries, and paints, is a well-recognized carcinogen and a toxic non-essential element for the human body. Hence, developing an effective sensor for detecting Cd (II) from water is a critical requirement. In this work, an electrochemical sensor based on green synthesized sulphur-doped carbon nanospheres (S-CNs) modified carbon paste electrode (S-CNs/CPE) has been developed that demonstrates a limit of detection (LOD) of ~14.4 μM towards Cd (II) in water using differential pulse voltammetry (DPV) technique. Interference studies and real sample analysis reveal the effectiveness of the developed S-CNs/CPE.
In this work, a robust-compact model based on 2T-ferroelectric FET (FeFET)-MOSFET oscillator based spiking neurons is developed and investigated for external temperature effects. The compact model is rigorously tuned and validated to existing literature for improving the accuracy of investigations. Emulation of neurons that can exhibit both the excitatory and inhibitory dynamics that are typically shown in cortical neurons. The compact model is tuned to reliably mimic regular spiking type cortical neurons with Zr-doped HfO 2 (HZO) and Si-doped HfO 2 (HSO) based FeFET(s). The analytical simulations has shown alterations at FeFET oscillations and no visible changes in the digital spikes output for the regular spiking type cortical neurons dynamics.
Silicon photovoltaic (PV) modules have a high susceptibility to moisture ingression. The impact of moisture is such that it delaminates the ethylene vinyl acetate (EVA) layer and short-circuits the PV modules by degrading the silver paste at the contacts of the solar cells. In this paper, experimental determination of the flow of moisture in silicon PV modules using SHT25 humidity and temperature sensors has been carried out. For analysis, three configurations have been proposed viz. backsheet-printed circuit board with sensor (PCB)- EVA-glass, EVA-PCB-glass, and backsheet-EVA-PCB-EVA-glass. The obtained experimental results were fitted with the analytical equations to determine the diffusivity of both EVA and backsheet materials. The obtained diffusivity of EVA is 120 times that of the backsheet indicating that diffusion through EVA is an instantaneous process.
The power conversion efficiency (PCE) of organic solar cells (OSCs) has recently progressed significantly with a rapid increase from 10% to 19% due to state-of-the-art research on non-fullerene acceptor molecules and various device processing strategies. However, OSCs still exhibit significant open circuit energy loss (~0.6 eV) due to disorder and excitonic nature of the organic semiconductors. In this work, we explored the role of energetic disorder on the total energy loss of bulk heterojunction OSCs. For this purpose, different donor-acceptor combinations were used to fabricate the OSCs, and various electrical characterizations were carried out in detail. The approximation of the energetic disorder was measured in term of Urbach energy (E U ) from the band tail of spectra. The correlation between open circuit energy loss due to different recombination processes and Urbach energy were observed. As E U was decreased, the energy loss decreased due to more ordered molecular packing and lower energetic disorder, resulting in better device performance. These finding show the need of reducing the energetic disorder, hence lower energy losses for boosting the PCE of the OSCs.
We propose a multilayer meta-device in metal/insulator/metal configuration that exploits broadside coupling of the incident THz radiation to the metastructure mediated through the VO 2 spacer layer. We theoretically demonstrate that, by changing the field strength of the incident radiation, the field confinement and thus, the spectral response of the structure can be modulated by means of initiating insulator to metal phase transition in VO 2 spacer layer by exploiting the strong electron-electron correlation in such structures. Hence, the all-optical modulation of the THz field can be attained by means of active tuning. The outcomes of our work hold tremendous potential in attaining active control of metamaterials by all-optical route as well as pave the way for ultrafast sensing, switching applications and nonlinear studies.
A conventional way of device dicing is by manual saw dicing, stealth dicing of an entire wafer by defining the dicing lines at the design level. There are several factors that come into picture that at times limits our fabrication of critical MEMS devices, especially on those which have a released structure or a membrane amidst. We are familiar with the fact that MEMS release can happen in two different approaches, either wet or dry. Though there are existing self dicing techniques employed where “die singulation” happens by DRIE itself, we do find a lot of limitations when it comes to separation of devices with sensitive membranes or suspended structures. We will look at the conventional strategies of sample loading and unloading in a dry etch chamber, the difficulties that are to be considered while handling released structures, etc and showcase an easier way of doing the same by successfully releasing them without any damage to the membranes / suspended structures. The method we look at is at the design level, which can be a part of any device design that might require a die-by-die separation at the end.
In this work, we present a discussion on an efficient and economical ‘Double Exposure’ (dual exposure or multiple exposures) method to achieve lithographic pattern alignments on opposite sides of various substrates (Silicon, GaN, GaAs, SiN) using Direct Writing tools and a single (standard) alignment marker photo mask. By exposing and developing the same photoresist (PR) multiple times, while using the corresponding lithographic tools in concert, the efficiency can be significantly improved while drastically reducing the resource cost with no compromise in the final resolution. The process has been optimized and demonstrated for repeatability in the lithography step followed by both etching and/or deposition (lift-off) processes. The proposed process is especially beneficial in the Backside Alignment (BSA) of Single- Side Polished (SSP) Silicon wafers. This has also been proven for BSA applications in full-fledged process flows for MEMS/NEMS and Heterogeneously-Integrated Devices.
An engineered electron blocking layer structure has been proposed to alleviate the significant electron leakage problem in InGaN/GaN multiple quantum well based micro-LED at lower current density (@ 1A/cm 2 ). The simulation results show that the level of electron concentration leakage in the p-region is drastically reduced by ~ 10 16 times compared to a reference structure (Sample A), added with improved hole injection efficiency @ 1 A/cm 2 . As a result, the internal quantum efficiency is enhanced by ~1.4 times with a 50% reduction in input operating voltage compared to Sample A to reach 1 A/cm 2 . In addition, the efficiency droop in our proposed structure is reduced from 45% to 10% @ 200 A/cm 2 compared to Sample A.
A cost-effective, flexible tactile sensor with a PDMS (polydimethylsiloxane) layer with a nanostructure pattern serving as the dielectric layer has been demonstrated. The creation of the PDMS layer with a nanostructure design uses an anodized porous alumina (APA) layer as a mold. The APA is created by electrochemically etching the aluminum material in oxalic acid. Due to the great elasticity and deformability of the nanostructures on the PDMS layer, the created tactile sensor device demonstrated remarkable sensitivity. For a pressure of 0.1 kPa, the tactile sensing device was shown to have a sensitivity of 1.1 kPa-1. The sensor can find applications in tactile sensing in low-pressure ranges (0-0.3kPa), where soft touch is desirable for non-destructive sensing.
