This paper analyzes techniques of estimating solutions for the transcendental thermionic emission equation, used in characterizing forward electrical behavior of high-temperature-capable Schottky diodes. Two optimization procedures are investigated: the Newton-Raphson approach and Halley’s method. Equation manipulations are presented for both techniques, which facilitate convergence and avoid numerical overflows. Suitable parameter initialization, ease of implementation and convergence speed are also discussed. Both methods give fully compatible current-voltage estimations, which are also relevant for experimental measurements, as obtained on practical SiC-Schottky diodes.
Identifying defect patterns in a wafer map during manufacturing is crucial to find the root cause of the underlying issue and provides valuable insights on improving yield in the foundry. Currently used methods use deep neural networks(DNN’s) to identify the defects. These DNN’s are generally very huge and have significant inference time. They also require GPU support to efficiently operate. All these issues make these models not fit for on-line prediction in the manufacturing foundry. In this paper, we propose an extremely simple yet effective technique to extract features from wafer images. The proposed method is extremely fast, intuitive, and non-parametric while being explainable. The experiment results show that the proposed pipeline outperforms conventional deep learning models on the tested dataset. Our feature extraction requires no training or fine-tuning while preserving the relative shape and location of data points as revealed by our interpretability analysis.
This paper presents a simple testing methodology for chemosensitive RH sensors, which was applied to study the response of a conductive polymer Poly3,4-EthyleneDiOxyThiophene: Polystyrene Sulfonate (PEDOT: PSS) mixed with different binders: Polyvinylpyrrolidone (PVP), Polyethylene Glycol (PEG) and Ethyl Cellulose (EC) at 11 RH levels in a cycling manner (hysteresis). These binders enhanced the adhesion of the RH-sensitive material to the substrate and contributed to characteristic linearisation and more negligible hysteresis. As a test vehicle, we used an Inter Digital Transducer (IDT) made of Polyimide (PI), having a finger/space dimension equal to 25 micro-meter and a sensitive area of 4mm x 4mm. IDTs were fabricated by photolithography on Cr/Au metalized PI substrate (in vacuum by EB). The enhanced electrical characteristics of sensors obtained by mixing PEDOT: PSS with binders were analyzed and discussed in detail.
This study aims to analyze and compare the characteristics of Metal-Insulator-Metal (MIM) capacitors, focusing on the effect of the stacking selection of thick dielectric materials, for future applications requiring robustness to high voltages and temperatures. The 300 nm-thick dielectric stacks under investigation include SiO 2 and Si 3 N 4 materials deposited using plasma-enhanced chemical vapor deposition (PECVD) at a high temperature (300°C), as well as Al 2 O 3 deposited through reactive sputtering at room temperature. The experimental results presented in this work highlight the importance of the stacking choice of these dielectric materials for minimizing the residual stress and the temperature coefficient of capacitance (TCC) and enhancing the overall dielectric constant. These factors contribute to achieving increased capacitance density, with mechanical and electrical resistance to harsh conditions.
This article presents an approach for implementing a Cylindrical Nanowire Single Channel Field Effect Transistor (SCFET) without the use of doping in the channel region (dopingless). Using an appropriate work function for the outer metal electrode and the Charge Plasma (CP) process, the n-type semiconductor is produced, where a single channel is used. By placing the gate length (LG) at 1$\theta$ nm, with channel and oxide thicknesses of 5 and 1 nm each, Sentaurus Technology Computer-Aided Design (TCAD) simulations are employed to compare the electrical properties of the proposed device to a normally undoped double gate MOSFET. Instead of two channels with identical spacing among vertical stackings, the NWSCFET has a single narrow channel. Utilising the linked Drift-Diffusion (DD) technique and Shockley-Read-Hall Recombination (SRH) method, the device performance has been quantitatively assessed. In accordance with the charge plasma and single-channel approach, the current obtained for the single-channel device has almost been doubled when compared with a Cylindrical Gate-All-Around double-channel NW MOSFET. In addition to the above parameters, the Short Channel Effects (SCE) have been reduced up to a certain extent.
