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The matching problem formulated as Maximum Cardinality Matching in General Graphs (MCMGG) finds the largest matching on graphs without restrictions. The Micali-Vazirani algorithm has the best asymptotic complexity for solving MCMGG when the graphs are sparse. Parallelizing matching in general graphs on the GPU is difficult for multiple reasons. First, the augmenting path procedure is highly recursive, and NVIDIA GPUs use registers to store kernel arguments, which eventually spill into cached device memory, with a performance penalty. Second, extracting parallelism from the matching process requires partitioning the graph to avoid any overlapping augmenting paths. We propose an implementation of the Micali-Vazirani algorithm which identifies bridge edges using thread-parallel breadth-first search, followed by block-parallel path augmentation and blossom contraction. Augmenting path and Union-find methods were implemented as stack-based iterative methods, with a stack allocated in shared memory. Our experimentation shows that compared to the serial implementation, our approach results in up to 15-fold speed-up for very sparse regular graphs, up to 5-fold slowdown for denser regular graphs, and finally a 50-fold slowdown for power-law distributed Kronecker graphs. This implementation has been open-sourced for further research on developing combinatorial graph algorithms on GPUs.
Tracing is a basic approach to analyzing performance and understanding MPI program behavior patterns. However, MPI event trace requires increasingly large storage space as the parallel scale grows. Besides MPI event trace, many performance analysis tasks (e.g., performance variance detection, proxy synthesis) also require detailed runtime performance metrics, which further aggravates the storage issue. In this paper, we propose a scalable tracing tool to effectively record and compress MPI event trace and related runtime performance metrics. The tool analyzes the data redundancy caused by loops and SPMD (single program multiple data) property of MPI programs. According to the analysis, the tool can compactly reorganize and store the data. Compared with existing trace compression methods, our tool can achieve generally higher compression ratio and less time cost.
The majority problem can be stated as follows: there is a collection of n bank cards that belong to different bank accounts. The only way to "read" these cards is through one or more two-input "equivalence testers". Each tester accepts two cards and outputs "yes" if two input cards correspond to the same bank account or "no" if they do not. The objective of the majority problem is to design a solution that uses the minimum number of tests to determine if more than n/2 cards belong to the same bank account and then find these cards. We first review two sequential solutions, including the Boyer-Moore optimal linear solution (i.e., with a time complexity of O(n)). Then, we introduce an optimal elimination solution together with a special structure to support a cost-optimal parallel solution that solves the problem in O(log n) using O(n/ log n) processors (i.e., testers). That is, this solution matches the optimal sequential solution with O(n) operations.
Sparse Matrix-Vector (SpMV) multiplication is a frequently encountered computational kernel, that is notorious for achieving only a small fraction of system peak performance. The optimization of this kernel and the identification of bottlenecks that limit its performance have been the subject of considerable research efforts. Nevertheless, obtaining an unbiased matrix dataset that can expose these bottlenecks remains a recurring challenge. To this end, we propose a feature-based artificial matrix generation method, that associates the most common SpMV bottlenecks with core matrix features, and develop a generator program that can quickly produce a wide variety of matrices on the fly for performance analysis. To evaluate our generator, we compare the performance of artificial and real matrices, across three different platforms: a CPU, a GPU and an FPGA.
The presentation of Peachy Parallel Assignments at parallel and distributed computing education workshops is an effort to promote the reuse of high-quality assignments, both saving precious faculty time and improving the quality of course assignments. These assignments must have been used in class and are selected for being easy to adopt by other instructors and for being "cool and inspirational" so that students spend time on them and talk about them with others. The assignments and their materials are also archived on the Peachy Parallel Assignments website.In this paper, we present two new assignments. The first has students implement the Mandelbrot set in Python, combining an interesting image with Python's ease of use. The second assignment is a substantial project to implement a programming contest judge. It requires that students use many parallel and distributed computing concepts, with the added benefit of solving a "real problem" and creating software with which students may have personally interacted.