This study proposes a compact Vivaldi-based phased array antenna (PAA) for the non-destructive detection of internal defects in tree trunks at varying heights. The proposed PAA comprises four specially designed Vivaldi elements operating from 0.6 to 1.4 GHz, enabling deep penetration into tree trunks while maintaining high resolution. To achieve a compact design with a narrow inter-element spacing of 0.4 and reduced mutual coupling, the outermost elements are slightly inclined, where is the wavelength at the center frequency. Additionally, a slotted metal reflector is placed behind the elements to improve impedance matching at low frequencies. The array is excited using Wilkinson power dividers to ensure stable amplitude and phase distribution. The measurement results show that the proposed PAA can steer its beam from -30 degrees to 30 degrees while maintaining an active voltage standing wave ratio (VSWR) below 2.5. It achieves a gain of 12-13 dBi while steering the beam. These characteristics, including a wide bandwidth, high gain, compact size, and beam-steering capability, make the proposed PAA highly suitable for scanning tree trunks and detecting defects at different heights. The proposed PAA was further validated on a real tree trunk, confirming its effectiveness for defect detection in practical scenarios.
Arithmetic circuits are the basic building blocks of frequently used computational systems. As the functions used in the computational system increase, the design constraint effects are proportional to the requirement. Approximate computing is a technique with the advantage of controlling design constraints by trading off accuracy. Approximation has major challenges in image processing, speech processing, and machine learning. So, an image-processing blending application, noise removal, or changing the transparency of images are designed using arithmetic circuits like adders and subtractors, respectively. Here, an 8-bit Dadda multiplier and a restoring divider are designed using approximate compressors and subtractors, respectively. The approximate full adders and full subtractors are implemented using tabular manipulation methods and logic-level pruning. The full adders are replaced either in the MSB or the LSB positions for better accuracy and error analysis. Image processing blending application, and background removal are performed using MATLAB, and design constraints are evaluated using Synopsys DC Compiler. The results show the logic-level pruning compressors, multipliers, and restoring dividers get a 40%-70% gain in PDP.
This investigation proposes a mathematical framework for the drain current as well as short-channel effects of an n-type heterojunction gate-all-around (GAA) nanowire tunnel field-effect transistor (TFET) architecture that incorporates a core-insulator within the channel (HJ-CI-GAA-NW-TFET). An analytical model for drain current is formulated employing Kane's interband tunneling model in conjunction with the shortest tunneling length approach. To derive the drain current and SCEs, numerical integration of the tunneling generation rate over the entire device volume is performed. The influence of variations of gate work function, diameter of the core-insulator, gate oxide thickness, and source doping concentration on several electrical parameters is systematically evaluated. Furthermore, the drive current is computed at a scaled channel length of 10 nm and under different gate-source voltages (V GS) spanning from 0.8 to 1 V. The analytical model developed yields results that agree well with Silvaco 3D TCAD simulations, reinforcing the validity of the analysis with just a 7% marginal deviation for different device parameters.
Behavioral models for Power Amplifier (PAs), particularly those based on Neural Networks (NNs), often suffer from high computational complexity when handling wideband signals. In this paper, we present a novel behavior model for wideband GaN PAs based on a Two-Sided Temporal Convolutional Neural Network (TST-CNN). The model uses a specialized convolutional layer to process the input data in order to extract the essential basis functions needed to accurately capture the dynamic memory effects and static nonlinearities of the PA. These enhanced features are then fed into a Fully Connected (FC) layer to establish the predictive model. Due to the efficient feature extraction enabled by the convolutional structure, the proposed architecture successfully handles strong memory effects without a significant increase in model complexity. The experimental results, obtained at a carrier frequency of 2.14 GHz using a 100 MHz wideband signal emulating 5th Generation (5G) wireless technologies, demonstrate that the TST-CNN outperforms current state-of-the-art models by achieving an Adjacent Channel Power Ratio (ACPR) of -52.1 dB. Furthermore, the TST-CNN requires only 237 coefficients, resulting in a high reduction in computational complexity compared with existing approaches, which makes it a very effective solution for future wideband communication systems.
This paper presents a developed iterative algorithm based on a Time-Domain Electric Field Integral Equation (TD-EFIE) formulation to analyze electromagnetic coupling in antenna systems. The primary objective is to determine the optimal immunity distance d that ensures mutual electromagnetic compatibility (EMC) between two antennas when one is subjected to atransient electromagnetic field. The proposed methodology employs the Method of Moments (MoM) in the time domain, utilizing Laguerre polynomials as temporal basis functions for stable recursive solution through a Marching-On-in-Degree (MOD) scheme. Space hybrid meshing techniques are applied to accurately model complex geometries. The core functionality of the algorithm consist in iteratively solving a coupled matrix system to compute transient induced currents, and comparing them with threshold values to determine the minimal safe separation distance. Validation through case studies-coupling between parabolic antennas and between a parabolic and a wire antenna demonstrates strong agreement with commercial simulator FEKO, confirming the algorithm's accuracy and computational efficiency. An evaluation of the proposed algorithms is conducted with respect to their computational complexity, CPU requirements, efficiency, and residual error. The resulting matrix system exhibits a computational complexity of where N and M denote spatial and temporal degrees of freedom, respectively. Compared with simulations performed using FEKO, the proposed algorithm achieves up to 40 & times; reduction in CPU time while maintaining strong accuracy agreement.
This paper presents two CMOS-based memtranstor emulator architectures capable of accurately replicating the flux-charge (phi-q) relationship and pinched hysteresis loop (PHL) characteristics of an ideal memtranstor. Both designs employ a voltage differencing inverting buffered amplifier (VDIBA) along with two second generation current conveyors (CCIIs), an analog multiplier, and a few passive components to realize nonlinear charge-flux coupling. The first topology offers a compact, hardware-efficient design with tunable butterfly-shaped PHLs, whereas the second design introduces an external control voltage that enables quadrant-dependent operation and adjustable hysteresis slopes. The proposed emulators operate at a low supply voltage of +/- 0.9 V, exhibit an operating frequency range of 35-50 kHz, with an average power consumption of 12.65 mW. Further, the emulator operates reliably for low frequencies up to 3 kHz, by appropriately setting the values of passive components. The tunability of the proposed memtranstor design is demonstrated by adjusting the bias voltage, excitation frequency, and capacitance. To validate the practical feasibility of the proposed architecture, a full-custom layout of the memtranstor emulator has been designed, occupying a silicon area of 12882.93 mu m2 (165.06 & times; 78.05 mu m). The post-layout results show close agreement with the pre-layout simulations while preserving the distinct memtranstance states of the emulator. Furthermore, the robustness of both designs is verified through extensive process-voltage-temperature analyses, confirming stable and reliable performance under device mismatch and environmental variations. The proposed memtranstor emulator circuits have been designed and simulated using Cadence Virtuoso 180 nm gpdk CMOS technology framework. The practical utility of the proposed emulators is further validated through two applications namely a chaotic oscillator-exploiting their nonlinear dynamics and an artificial synapse circuit-demonstrating long-term potentiation and depression for neuromorphic computing. In addition, the hardware implementation of the proposed memtranstor emulator and chaotic oscillator has been carried out, to experimentally verify the functionality of the design. All these results highlight the proposed VDIBA-CCII-based memtranstor emulators as compact, tunable, and energy-efficient circuits for nonlinear, chaotic, and neuromorphic hardware systems.
In this article, ultra-wideband (UWB) single-element and two-port multiple-input-multiple-output (MIMO) antenna structures with circular polarization (CP) characteristics are designed to support numerous modern wireless systems. The basic CP element is designed to obtain an ultra-wide operating bandwidth. In the design process, a circular stub is integrated into the ground plane, and a circular slot is structured into the patch to achieve CP. On the other hand, a rectangular stub is used to improve the axial ratio bandwidth (ARBW). The elemental antenna achieves an impedance bandwidth (IBW) of 97.96% (4.13-12.06 GHz), an ARBW of 49.62% (5-8.3 GHz), a peak gain of 5.75 dB, and a minimum efficiency of 80%, maintaining small dimensions of 20 mm 20 mm 1.6 mm (0.275 lambda( 0) & times; 0.275 lambda( 0) & times; 0.022 lambda( 0)). Meanwhile, a two-element UWB MIMO radiator of 20 mm 44 mm 1.6 mm (0.275 lambda( 0)& times; 0.606 lambda( 0) & times; 0.022 lambda( 0)) is designed and experimentally validated. It addresses the challenges of achieving wide impedance and axial-ratio bandwidths while maintaining a compact size and high isolation for MIMO operation with attractive diversity performance. It achieves an impressive ultrawide IBW of 100% (4-12 GHz), ARBW of 42.73% (4.6-7.1 GHz), and 10.90% (7.8-8.7 GHz) while offering improved isolation. The MIMO geometry exhibits outstanding diversity performance, with an envelope correlation coefficient (ECC) < 0.01, diversity gain (DG) > 9.92 dB, total active reflection coefficient (TARC) < 10 dB, and channel capacity loss (CCL) < 0.2 bits/s/Hz. These features render the proposed UWB MIMO antenna exceptionally appropriate for various wireless communication uses, such as microwave C-band (4-8 GHz), WiMAX (5.725-5.850), WLAN (5.150-5.825 GHz; 5.925-7.125 GHz), and satellite communication in X-band (downlink: 7.25-7.745 GHz and uplink: 7.9-8.4 GHz).
To overcome the limitations of narrow bandwidth, structural complexity, and limited tunability in existing graphene-based terahertz absorbers, structural complexity, or inconvenient tunability in existing graphene-based terahertz absorbers, this paper proposes a tunable broadband terahertz absorber based on a graphene proportional metasurface. Here, "proportional" refers to the fixed ratio between the graphene pattern feature size () and the unit cell period (), that is, , as well as the consistent size ratios among different resonant regions. The design employs a classic three-layer structure, consisting of a gold reflective layer, a silicon dioxide dielectric layer, and a graphene resonant absorption layer. Through systematic optimization, the absorber achieves a high-efficiency absorption bandwidth exceeding 90% across a range of 3.003 THz, with a peak absorption rate of 98.8% at 2.61 THz and an average absorption rate of 94.6% over the entire bandwidth. It also exhibits excellent impedance matching characteristics and angular adaptability. Research indicates that the broadband absorption property of the device originates from the electric field coupling effect between different resonant units. This coupling effect causes multiple absorption peaks to overlap, thereby broadening the bandwidth. Furthermore, by applying an external voltage to adjust the Fermi level of graphene, the absorption bandwidth can be continuously tuned. The device offers flexible dynamic control capabilities and demonstrates good tolerance to the incident angle of electromagnetic waves. This study provides a feasible approach for designing structurally simple and tunable high-efficiency terahertz absorbers. The proposed design holds potential application value in fields such as terahertz detection, communication, and stealth technology.
Small-signal model of a MOSFET is an equivalent circuit that represents its electrical components and specifies the device's electrical characteristics. The non-quasi-static (NQS) model is among the most precise small-signal models utilized in the design of analog and RF circuits. This work introduces an innovative device design known as Gate Stack Silicon on Insulator Schottky Barrier (GS-SOISB CGAA) cylindrical MOSFET and analog/RF characteristics are extracted utilizing the Silvaco 3D device simulator. An analytical model of GS-SOISB CGAA is also introduced and validated against the simulation findings. The NQS model of the GS-SOISB cylindrical MOSFET is formulated to ascertain the extrinsic and intrinsic parasitic components utilizing Y-parameters in both the on and off states, respectively. The analog/RF characteristics and NQS model parameters of the GS-SOISB cylindrical MOSFET have been compared with those of the SOISB cylindrical MOSFET and the SB cylindrical MOSFET. The revolutionary device has a lower gate-source capacitance (C GS) of 7.95% and 8.79%, a gate-drain capacitance (C GD) of 7.22% and 4.57%, and an overall gate capacitance (C GG) of 7.91% and 8% than SB and SOISB cylindrical MOSFETs. Compared to conventional SB cylindrical and SOISB cylindrical MOSFET structures, the proposed device shows reduced extrinsic parameters of the NQS model by 7.93% and 3.99% in C gde and C gse, respectively, and 33.4% and 23.9% in R D and R S. The revolutionary device's intrinsic gate-drain capacitance (C gd) reduces by 7.13% and 4.29%, and its intrinsic gate-source capacitance (C gs) reduces by 7.93% and 8.79% as compared to SB and SOISB cylindrical MOSFETs.
The photovoltaic (PV), wind turbine (WT), and battery energy storage (BES) based hybrid system design and optimal placement using chaotic quasi-oppositional crayfish optimization algorithm (CQOCOA) in a radial distribution network (RDN) under load uncertainty is the main objective of this study. Here, crayfish optimization algorithm (COA) is modified and improved by adding quasi-oppositional behavior to it. Then chaos theory is added to speed up the convergence pace and avoid the local optimality. For optimal placement of hybrid PV/WT/BES system, simultaneous active power loss and annual operation costs minimization is taken as the objective to enhance the efficacy of the RDN. The uncertainty modeling of PV and WT distributed generation (DG) is considered for power generation as solar irradiance and wind speed can change. This algorithm is validated on 69-bus and 94-bus to establish the potency of the suggested CQOCOA algorithm. The active power loss cost is also evaluated after the installation of hybrid PV/WT/BES system. Adjusting the growing load demand, 25% increased load and 10% decreased load is considered for load uncertainty modeling. In both (69-bus and 94-bus) systems, the placement of hybrid PV/WT/BES system using the CQOCOA method reduces the active power loss by 58.93%, 60.53%, 53.53%, and 62.19%, 65%, 62.99% for normal, 25% increased, and 10% decreased loading conditions, respectively. In yearly running cost of hybrid system design by CQOCOA method for 69-bus at normal and 10% decreased load gives yearly savings of 25 364$, 31 951$, 88 951$ and 16 511$, 1527$, 25 608$ than COA, DAOA, and AOA methods. The comparative study of results revealed that the CQOCOA algorithm is better than several optimization algorithms.
Nuclear magnetic resonance (NMR) spectroscopy is a powerful technique for molecular analysis, yet its widespread use is limited by the bulky size and high cost of conventional radio frequency (RF) coils, which restrict portability and accessibility in clinical and field applications. To address this challenge, we propose a miniature birdcage coil implemented on a flexible printed circuit board (F-PCB) with a Flame Retardant-4 (FR-4) substrate. The compact design, with a thickness of only 0.25 mm, enables the development of portable and user-friendly NMR spectrometers without compromising performance. The coil generates a highly homogeneous magnetic field with 95% uniformity across a wide range of Larmor frequencies and achieves a magnetic field strength of 327 mu T. Unlike traditional fixed-frequency coils, the proposed design incorporates a programmable band-pass function controlled by variable capacitors and a microcontroller, allowing electronic tuning across 1-13 MHz without hardware modifications. Finite element method (FEM) simulations confirm the coil's ability to maintain field homogeneity and high signal-to-noise ratio (SNR) over diverse operating conditions. Compared to existing RF coil designs such as planar, Helmholtz, or conventional birdcage coils, the proposed mini-birdcage coil offers superior portability, tunability, and uniform excitation, thereby enhancing NMR signal acquisition and broadening applicability. This advancement holds promise for medical, pharmaceutical, biological, and geological applications, enabling portable NMR systems that improve diagnostic capabilities and expand accessibility in resource-limited environments.
A harmonic-included canonical section-wise piecewise linear (CSWPL) model with both bias and frequency information is presented in this study. This new model is verified by means of fundamental and harmonic load-pull simulation data for a 10-W gallium nitride (GaN) packaged transistor considering a wide range of input power. According to the proposed model, the harmonic behavior of the device under test (DUT) can be captured more accurately than what is currently available in the existing fundamental-only CSWPL model, which is very helpful for the designers of power amplifiers (PAs). Further, the proposed model is implemented in Keysight advanced design system (ADS) simulator by using a frequency-domain defined device (FDD), which is then applied to the design of a single-ended broadband PA. In accordance with the results achieved, the GaN-based PA has a power added efficiency (PAE) greater than 60% and an output power greater than 40 dBm over the frequency range of 2 to 3 GHz. A very good match exists between the simulation results of the proposed model and the actual measurements of real PAs, which demonstrates the suitability of the presented model for practical PA applications.
This paper presents a low-voltage, low-power second-generation voltage conveyor (VCII) that achieves enhanced bandwidth and reduced power consumption. The proposed VCII employs dynamic threshold MOS (DTMOS) technique to operate under reduced supply voltages, while resistive compensation is incorporated to extend the bandwidth. Two novel memristor emulator designs are introduced based on the proposed VCII. The grounded memristor emulator utilizes a single VCII, a resistor, a capacitor, and an NMOS transistor, whereas the floating emulator configuration employs two VCIIs, a resistor, and an NMOS transistor. The proposed VCII achieves a bandwidth of 325 MHz, an output impedance of 38 Omega at terminal Z, and a power consumption of 0.068 mW. Simulation results further demonstrate that the proposed grounded and floating memristor circuits exhibit distinct pinch hysteresis loops (PHL) in the voltage-current plane up to a frequency of 80 MHz and 1.5 GHz and power consumption of 0.12 and 0.25 mW, respectively. The designs have been validated using 180 nm CMOS technology parameters, operating at a low DC supply voltage of +/- 0.45 V. Both proposed memristor designs show robust and satisfactory performance across a wide frequency range. The layout and postlayout simulation results of the proposed VCII and both memristor emulators have also been carried out, occupying areas of 2116.13, 2205.02, and 4759.53 mu m2, respectively. In addition, the process corner simulation of the proposed memristor is also included. The practical relevance of the memristor is demonstrated through the successful realization of low-pass, high-pass, and band-pass filter circuits, highlighting their suitability for next-generation memristive computing.
In this work, authors have deeply investigated a combination of gallium nitride (GaN) and gallium oxide (Ga2O3) semiconductors, which are considered strong potential candidates for solar-blind ultraviolet (UV) photodetectors. Using Silvaco TCAD software, the proposed structure contains platinum as a Schottky contact on the top of the Ga2O3 absorbed layer. An intermediate GaN layer was deposited on the sapphire (Al2O3) substrate, and it has a crucial role in increasing the photogeneration rate of the used photodetector. The proposed device shows distinct current-voltage behavior under dark and illumination conditions. A high responsivity in the deep UV region has been demonstrated. Different parameters, such as doping concentration, work function, traps, and temperature effect, have been investigated to highlight the potential of the proposed structure for the next generation of UV-Schottky photodetectors with excellent spectral selectivity and self-powered effect.
Current unmanned aerial vehicle (UAV)-based remote sensing systems for soil moisture detection face several challenges, including large antenna size, low efficiency, and measurement errors caused by non-overlapping dual-polarization coverage. To address these issues, this study proposes an efficient and compact L-band shared-aperture dual-polarized microstrip antenna design. The key innovation lies in the integration of four techniques. First, an air gap between parasitic patches and the dielectric substrate broadens the operational bandwidth. Second, a high-impedance surface (HIS) structure suppresses surface waves, significantly improving efficiency, gain, and radiation characteristics. Third, metallic patches combined with a Chebyshev impedance matcher provide precise frequency tuning and wideband impedance matching. Finally, a compact stacked structure with a multilayer symmetric feed network enables a shared-aperture dual-polarized layout, overcoming coverage misalignment and size limitations typical of non-coaxial airborne antennas. The proposed antenna achieves excellent performance in the target frequency band. It demonstrates an average efficiency of 95%, a voltage standing wave ratio (VSWR) below 1.37, a peak gain of 13.42 dB, a 3-dB beamwidth of 44.1 degrees, and a sidelobe level below -12.79 dB. Comparative analysis shows that this shared-aperture design offers substantial performance improvements and establishes a new benchmark for efficient, compact dual-polarized microstrip antennas in low-altitude L-band remote sensing applications.
The growing demand for compact and efficient dual-band antennas in modern wireless and satellite systems motivates the need for designs that offer high gain, low cross-polarization, and broad operational versatility. Based on concentric spiral shape, developed from square iterations, this research proposes a low-profile linearly polarized printed fractal radiator. Both the scaling factor () and the rotation angle () control the design of the antenna, allowing it to operate in two bands with a fixed aperture. The suggested radiator attains resonance at and GHz, which correspond to X- and Ku-band frequencies, using a RO-5880 substrate with a dielectric constant 2.2. The simulated and measured findings demonstrate excellent agreement with gain of and dBi, cross-polarization levels below dB, and radiation efficiencies over . The proposed small-sized dual-band antennas meet the need for efficient, innovative wireless and satellite systems. These findings confirm that the antenna is suitable for wireless and DBS applications, and they hint at its potential applicability to IoT and 5G with the minimal design up-gradation.
Gallium nitride (GaN) high electron mobility transistors (HEMTs) inherently demonstrate nonlinear behavior due to input capacitance modulation and bias-dependent variations at elevated power levels, resulting in significant phase distortion and diminished intermodulation performance in power amplifiers (PAs). This paper presents a distinctive parallel R-C loaded matching technique aimed at mitigating these nonlinearities in GaN monolithic microwave integrated circuit (MMIC) PAs designed for frequency-modulated continuous-wave (FMCW) radar applications. The intrinsic device-level sources of nonlinearity are examined, and the efficacy of the proposed network in suppressing amplitude-phase (AM-PM) distortion and enhancing intermodulation distortion (IMD) characteristics is comprehensively assessed. Utilizing this technique, a 15-20 GHz three-stage GaN MMIC PA is designed and simulated, achieving over 30 dB small-signal gain, 23%-31% power-added efficiency (PAE), and a peak power of 39.3 dBm at 17 GHz. The PA demonstrates excellent linearity, with AM-PM variation constrained within +/- 2 degrees at saturation. The final design occupies a compact 3.37 & times; 2.59 mm2 footprint, rendering it highly suitable for high-throughput FMCW radar transmitters. Additionally, full electromagnetic (EM) co-simulation, including quad flat no-lead (QFN) packaging and bond-wire parasitics, is conducted to validate performance robustness under practical integration constraints.
Analytical models of base transit time for SiGe-HBTs usually neglected carrier recombination in the base under the assumption of very thin base. The validity of this assumption is questionable under intermediate injection level (IIL) condition, which is common for highly-scaled devices operating in the high-current regime. However, consideration of recombination in the base along with various nonideal physical models reported in the literature under IIL condition leads to the analytical intractability of the governing differential equation (GDE). Therefore, this work intends to develop an analytically tractable - model of SiGe-HBTs applicable under IIL conditions. The model also considers the effects of base width modulation (BWM) on to simulate the effects of the base pushout phenomena usually occurred at high-current regime. Close match of the simulated model data and experimentally measured data for the collector current density, total transit time, unity gain-bandwidth cutoff frequency and maximum frequency of oscillation validates the model quite well. It is noteworthy that significant deviation from the measured data has been observed for the model that does not consider recombination at high-current regime. Therefore, the proposed model not only provides the justification of the consideration of the effects of carrier recombination in the base to develop analytical model but also shows the practical significance of the developed model to guide the device engineers to design modern highly-scaled SiGe-based HBT devices operating in the high current regime, thereby meeting the requirement of sustainable industrialization to facilitate sustainable development goal 9 (SDG 9).
This paper proposes a design method for broadband power amplifier (PA) using irregular matching structure based on an improved multi-objective optimization algorithm, aiming at expanding its operating bandwidth. Initially, the gravitational search algorithm is enhanced by reconstructing the gravitational constant function for improving its global optimization capability. Subsequently, a fast non-dominated sorting mechanism combined with a crowding distance strategy is introduced for multi-objective optimization problems. Furthermore, to effectively overcome the bandwidth limitations that are inherent in conventional PA, the proposed multi-objective gravitational search algorithm is employed for optimizing the irregular structure matching network. For verification, a broadband high-efficiency PA is designed and fabricated, covering a frequency range of 0.4-4.0 GHz with a relative bandwidth of 163%. Measurement results show that the PA with the irregular matching structure maintains an efficiency of 59.1%-64.4% across the entire operating band, with a saturated output power of 40.3-41.8 dBm.
In this study, TCAD simulation is employed to model the Indium Phosphide High Electron Mobility Transistor (InP HEMT) device. Using Sentaurus, we simulate the transfer characteristics, transconductance curves, output characteristics, and S-parameters of the device with variations in barrier thicknesses and spacer thicknesses. Based on these simulations, we further discuss the underlying mechanisms by which barrier thickness and spacer thickness influence the electrical characteristics of HEMT devices. The results demonstrate that variations in both barrier thickness and spacer thickness affect the transfer characteristics and output characteristics of the device, and also induce variations in S-parameters.
