Design and analysis of the performance of an inverse Class-J power amplifier (PA) with cascaded output matching techniques in a broad bandwidth are presented. To meet the requirements of the second harmonic termination, PA operates in traditional J-class mode at saturated capacity and suggests modifying the inverse of it. It is found that the inverse Class-J PA achieves higher output power and efficiency in the desired frequency range of 2.4 to 6 GHz. The proposed design is simulated and implemented using CGH40010F, a CREE package GaN HEMT. The inverse Class-J PA has a drain efficiency (DE) of 72
This paper presents a novel quad-gate metal–oxide–semiconductor (MOS) high electron mobility transistor (HEMT) (MOS-HEMT) structure for enhanced Analog/radio-frequency (RF) performance of gallium nitride (GaN) devices. This study shows that a quad-gate structure significantly improves the device scalability and performance compared to the traditional double gate (DG) MOS-HEMTs. It is shown that a quad gate MOS-HEMT offers an increase in transconductance (gm) and an increase in total drain current (Id), driven by both channel parallelism and enhanced per-channel electrostatic coupling. An analysis of various Analog/RF Figures of Merit (FOMs) demonstrates that a lateral GaN width of 300 nm (corresponding ov 80 nm) configuration yields the highest cut-off frequency (fT) of about 85 GHz and superior Transconductance Generation Factor (TGF). The study underscores the quad gate MOS-HEMT’s potential for high efficiency and precision Analog/RF applications, particularly in mixed-signal processing, amplification, and high-power sectors. This novel quad-gate MOS-HEMT device architecture offers significant advantages over the traditional DG configuration, marking a promising advancement in power semiconductor technology.
Portable multimedia devices with multiple signal processing techniques and architectures require low power consumption. Earlier research has relied on voltage over-scaling to exploit error resilience, limiting errors through computational and architectural methodologies. This paper explores logic complexity reduction as an alternative method to maximize the benefits of flexible numerical accuracy. It investigates various types of approximate or imprecise Full Adder (FA) cells that are the building blocks of multi-bit approximate adders. Approximate computing is a promising solution for faster, energy-efficient, and less complex circuits. Approximate arithmetic circuits intentionally introduce errors into the circuit’s output to improve power and area efficiency by reducing complexity. Compared to the prior design (mirror adder apprx), the proposed multi-bit adder based on the proposed AHA5 full adder shows a 57.9
In error-tolerant applications such as image processing and neural network acceleration, the design of low-power architectures is critical. Approximate computing has emerged as an effective paradigm for developing energy-efficient arithmetic units by relaxing computational accuracy. This paper proposes a novel 4:2 approximate compressor architecture that complements exact compressors to form high-performance approximate multipliers. The proposed designs are synthesized using 90-nm CMOS technology in Cadence Genus and evaluated in terms of power, delay, and area. Simulation results demonstrate substantial improvements compared to existing state-of-the-art approximate multipliers. For 8-bit and 16-bit implementations, the proposed PM1, PHM, and PM2 multipliers achieve area reductions of 45
A key challenge in wideband antenna design is the inherent trade-off between achieving wider bandwidth and maintaining high gain, as well as balancing structural modifications with the overall antenna size. This work presents a simulation-based design and performance analysis of a modified antipodal Vivaldi antenna (AVA) for enhanced performance. A basic AVA is first designed on a low-cost FR-4 epoxy substrate of size 54 mm × 35 mm × 1.6 mm. To enhance bandwidth, cuts are introduced in the radiation slots and the feed-line section. To improve gain and directivity, an “inverted double V” metamaterial unit cell is designed and then incorporated as a 6 × 6 array on the aperture of the modified AVA. The proposed antenna operates over a wide frequency range of 3.4 – 23.7 GHz (S11 < –10 dB), covering the Ultra-wideband (UWB), S-, C-, X-, Ku-, and K-band applications, with a maximum gain of 10.1 dB. Comparative analysis shows that our proposed design outperforms several previously reported designs and provides a valuable simulation-based reference for further experimental and practical implementations. The novelty of this work lies in the integration of a compact AVA structure with a novel metamaterial array and other optimized structural modifications, resulting in improved performance while maintaining low cost and compact size, thereby addressing key challenges in wideband antenna design.
