It is of great significance to study the response mechanism and performance improvement strategy of bismuth telluride(Bi2Te3)photoelectric detector in long-wave infrared band.Firstly,through selection of the growth temperature zone during chemical vapor deposition(CVD),the thermodynamically-led morphology controlled synthesis of nanostructures was achieved,and the shape was changed from tri-angular nanosheets to nanowires.It is revealed that the long-wave infrared photoresponse of Bi2Te3 nanowire photoelectric detector is dominated by the photothermoelectric effect.Through the optimization of electrode material,the responsivity of the detector is improved to 17 V/W,and the noise equivalent power is 0.22 nW·Hz-1/2.The asymmetric electrode structure was constructed to solve the problem that the micro-nano photothermoelectric detector has no response voltage output under global light illumination.In addition,the Bi2Te3 nanowire photothermoelectric detector exhibits a short response time of 53 μs,breaking the limit of millisecond response speed of traditional thermal photoelectric detectors.Compared with other complex structural designs,the Bi2Te3 nanowire photoelectric detector has comparable per-formances,which provides a new idea for the design of two-dimensional photothermoelectric detectors.
In the context of the nuclear resonance scattering experiment within the high-resolution spectroscopy line station system(HEPS-B5)of the high energy photon source,in order to meet the time measurement demands of high-resolution time-to-digital conversion at the picosecond level for test sam-ples,a four-channel interpolated delay chain time-to-digital converter(TDC)chip based on SMIC 180 nm process was developed.The TDC chip utilized an interpolated delay chain method with a chain structure that combining both"coarse counting"and"fine counting"to improve measurement resolution,and combined with a clock counter to achieve a wider dynamic measurement range.In order to prevent the transmission of metastable states,a two-stage inverter was employed as the basic delay unit,and the data was safely transferred between different clock domains though an asynchronous first-in-first-out(FIFO)buffer.Experimental test results demonstrate that the TDC chip offers a time resolution of 56.3 ps and a dynamic measurement range spanning from 0 to 262 μs,effectively meeting the high-precision time mea-surement requirements for nuclear resonance scattering experiments.
In order to predict interconnect short circuit and open circuit failures of multi-chip modules(MCMs),ANSYS parametric design language(APDL)was used to realize the three-dimensional automatic modeling for a highly integrated dual-channel MCM consisting of two Si switch chips and two GaAs low noise amplifier chips.The heat conduction analysis of the MCM under different working conditions was carried out.Based on the theory of atomic flux divergence(AFD),the interconnect reliability for the MCM under different operating temperatures and voltages was analyzed by the finite element analysis(FEA)method.AFD distribution and temperature distribution of the MCM under different working conditions were obtained,as well as the relationship curves of temperature,AFD and operating voltages.The results show that the temperature of chips and plastic sealing material increases with the increase of the operating voltage.Meanwhile,the interconnect reliability decreases dramatically with the rising of temperature and operating voltage.The research results can provide reference for the layout design for MCMs to ensure the interconnect reliability.
For power MOSFETs,whether a smaller source-drain leakage current can be obtained at a high external voltage is one of the important indexes for evaluating device performance.To solve the problem of excessive source-drain leakage current of shield gate trench MOSFET with a breakdown voltage of 150 V,two effective optimization methods were proposed,including lowering the rapid annealing tem-perature after ion implantation and reducing the Ti adhesion layer thickness of contact hole.Combined with the theoretical calculation,the reasons for the reduction of leakage current via above methods were analyzed from the angle of influence of defects.By using these two methods,the defect concentration near pn junction in source region is reduced,resulting in a smaller reverse current generated by pn junction,thus reducing the leakage current and effectively solving the problem of large source-drain leakage cur-rent,which improves the yield of the product.
Shield gate trench(SGT)MOSFET was used as the research object to study the pheno-menon and physical mechanism of single particle microdose effect induced by heavy ions.Heavy ion irradiation test on 30 V SGT MOSFET at different bias voltages was carried out,and the changing trend for the transfer characteristic curves of the device after heavy ion radiation was analyzed to reveal the deg-radation rule of single particle microdose effect.It is found that heavy ion incident will cause the increase of subthreshold current and lead to negative drift of threshold voltage,and the negative drift of subthreshold voltage is more serious under negative gate voltage.Experimental results combined with TCAD simulation further reveal that the positive oxide trap charge at the Si/SiO2 interface of the gate ox-ide side wall is the main reason for the degradation of device threshold voltage and subthreshold voltage.The results can provide guidance for the evaluation and modeling of single particle microdose effect of SGT MOSFET.
