A 270 V high voltage dc (HVDC) architecture of more electric aircraft (MEA) mostly adopts two-stage power factor correction (PFC) converter due to the specific input-output relation, which is difficult to meet the demanding for high power density and low-voltage stress. In this article, a new hybrid three-phase (3ph) step-down PFC rectifier is proposed. It integrates a Vienna PFC converter with a diode-based switched capacitor converter (SCC) by capacitor multiplexing, which results in a low-voltage gain in a simpler structure without compromising the input power quality. Different from two-stage structure, the proposed topology can reduce the voltage stress by half in 3ph PFC system, which is more conducive to device selection. Furthermore, based on the integration of the proposed method, the neutral-point potential (NPP) self-balance on split capacitors of Vienna PFC converter is naturally achieved without any extra control strategy. Finally, a 1-kW experimental prototype with 98.1% efficiency of 115 ac/50-800 Hz to 270 Vdc is built to verify the analysis results.
Totem pole power factor correction rectifiers (TPPFC) have gained popularity with the advantage of a minimal number of devices for optimal performance, but cause a high output voltage due to the inherent step-up characteristic, limiting the single-stage applications. As the switched capacitor converters (SCCs) feature low voltage stress and high-power density, a hybrid soft-switching step-down PFC rectifier is proposed in this paper, which integrates TPPFC with ladder SCC by redundant switch multiplexing. Similar to the traditional TPPFC, the proposed converter can achieve unity power factor and comply with IEC61000-3-2 Class C in universal-input applications. With critical conduction mode (CRM) control, some active switches are turned ON and OFF under soft-switching condition. Therefore, high efficiency performance is realized. Besides, an adaptive synchronous timing multiplexing control strategy is presented, achieving low voltage gain and natural capacitor voltage balance characteristics. Finally, a 300W step-down prototype with 97% peak efficiency and PF of 0.99 is built to verify the theoretical analysis results.
介绍了四川大学"电工技术基础"课程开展的混合式教学改革,突出"以学为中心"的教育理念,将传统课堂教学和网络教学的优势相结合,通过设计线上线下的教学环节、合理分配教学内容,综合运用超星泛雅平台进行课前、课中、课后及课程评价的整体设计,进行混合式教学模式的探索与实践,实现线上线下教学的有机结合,提升了教学效果.
全面推进课程思政建设是落实立德树人根本任务和将社会主义核心价值观融入教育教学全过程的重要举措.针对"电工技术基础"课程的教学特点和教学内容,探索课程与思政教育的结合方式,提炼课程蕴含的思政元素,将道德规范、社会主义核心价值观、科学知识、思维方式等有机融入课堂教学中,建立全过程、全方位的课程思政体系.
本文基于FPGA硬件实现机制设计一种 QDR存储器电路单元,巧妙地组织像素数据结构,将输入图像的像素数据能够在帧内的全部像素地址随机读写,具有一个像素时钟同时对4 个像素点源数据的读取和计算的功能,保证图像视频流的全屏像素映射变换实时输出.
Inspired by the idea of mobile targets localization by the antenna array, a novel localization methodology for the partial discharge (PD) source in power systems is proposed by using ultra-high frequency (UHF) sensor-arrays in this paper. Due to the broadband feature of UHF-signals emitted from PD source, a focusing algorithm, i.e., two-sided correlation transformation (TCT) algorithm, is utilized to transform the PD signals to the narrowband ones, which improves the accuracy of the direction-of-arrival (DoA) estimation at the sensor-array under the severe electromagnetic surroundings. Then, with the DoAs obtained from multiple sensor-arrays, a spatial localization paradigm for the PD source is introduced. Finally, the PD source can be localized within a spatial sphere formed by the multiple skew DoA-lines from these sensor-arrays. Based on the simulation with the experimental PD UHF-signal data, it is shown that the proposed methodology accurately localizes the PD source within the a small range of sphere under the severe testing situations, which improves the accuracy of PD source localization compared with the classic time-difference-of-arrival (TDoA) method.
To improve the efficency of the PCI bus between processors,a design method of the PCI bus driver for data transmisson between processors is presented.Firstly,a embedded system,which is composed of PowerPC processor and DSP(Digital Signal Processor),is described.DSP processes all kinds of digital signals,for example,image,video etc.,and sends the results to the PowerPC processor.PowerPC processor is responsible for routine management and remote network.Then,the key technologies in the PCI device driver design based on the linux operation system,for example,DMA technology,zero-copy techno-logy etc.,is proposed.Finally,by the key technologies design case and experiments based on the embedded system,the PCI driver adopting the key technologies improves the capacity and efficency of data transmission between the PowerPC and DSP.
When the scenery of brightness light contrasts shade,and CCD sensor exposure time is large,bright bloom in the image will happen.At night,the lamp lighting of car will cause the typical phenomenon,often are called"smear and blooming". The antiblooming of CCD system is a difficult problem,many factories,scholars are seeking the best solution.The reasons of CCD blooming are analyzed in this paper.By changing the pixels driving sequence,the top of bright blooming area is eliminated,and the image quality is improved.
引言 在视频监控、远程视频播放等系统中,通常需要将视频图形数据通过网络传输到远程处理机上.作为数字信号处理专用处理器,DSP虽然在视频压缩等方面有很大的优势,但对诸如任务管理,网络通信等功能的实现较困难.运行于通用嵌入式处理器的Linux操作系统,开源,可以根据需要修改内核,支持各种网络协议,并且其任务调度机制性能卓越.综合二者的优点,嵌入式视频平台可以由DSP完成图形处理功能,并通过高速接口把视频数据传输给嵌入式微处理器,然后由嵌入式Linux系统完成网络传输功能.
基于问题学习法(PBL)是一种课程结构和方法,它强调学生同时发展高层次的思维方式、掌握知识基本概念和实践能力。本方法让学生面对的是实际状况下的问题,学生自己就是解决问题的主角。结合四川大学电工学课程教学的现状,文章探讨了如何利用PBL等教学法提高教学质量,提高非电类学生对本课程的学习兴趣。
A hardware interface design and corresponding driver structure are presented in this paper, which were used to implement real time video data transmission between ARM (AT91RM9200) and DSP (TMS320DM642) through HPI. The embedded Linux driver achieves storage mapping IO and physical memory remapping, avoids redundant copy of video data between application process and the kernel, increasing data transmission efficiency.
In order to guarantee the radar data communication in the air traffic control system,a new HDLC protocol controller based on the FPGA parallel technology was presented.In terms of the HDLC frame structure and the theory of cyclic redundancy check,the implementation of the modules,constructing and deconstructing HDLC protocol frame,producing and checking the CRC code,and adopting the FPGA new technology were discussed.A new parallel high level data link controller(HDLC) was designed using the hardware description language on the FPGA device.The HDLC protocol controller can construct or deconstruct the multi-channel HDLC protocol frames in parallel way.As a result,it improved the robust and reliability of the whole system.
According to the theory of radar detector, a new advanced plane radar display terminal is presented in this paper, Based on the technologies of DSP and FPGA, the terminal possesses the functions of radar data acquisition, radar signal processing, the detected aims displaying, etc. The innovation of this paper locates that a high efficiency display method, named partial-screen-updating method, is designed and the comparison between the full-screen-updating method and the partial-screen-updating method in performance shows that the partial-screen-updating method has higher displaying performance than the full-screen-updating method in a radar detector.
A method to develop TI DSP′s hardware drivers is introduced in this paper.In CCS studio,the DSP/BIOS device driver is configured to IOM (I/O Mini-driver)model which could be used for devices that handle I/O.The application and the drivers are insulated.Once the hardware driver is encapsulated to a library,the application can communicate the hardware by calling DSP/BIOS′s API.It makes the development of application more general and transplantable.In this paper,the development characteristic of C5000 DSP′s McBSP/DMA and USB drivers are embodied.
An all-digital carrier phase acquisition scheme was presented to solve the problem of carrier phase recovery,which is specially critical and hard in the demodulation of trellis-coded quadrature amplitude modulation(TC-QAM).Algorithms,such as automatic frequency control(AFC),automatic gain control(AGC),phase-amplitude tracking(PAT),and phase ambiguity detecting (PAD),were jointly used in this scheme.Simulations indicated that,in the condition of without any preambles,carrier phase could be acquired fast and tracked steadily,and this scheme still worked well even in low SNR level condition.
文章介绍了美国MAXIM公司的MAX1487芯片在RS485标准接口中的应用,给出MAX1487芯片的内部结构、管脚功能及其工作原理,并提供了其在PC机与单片机远程多机串行通讯的应用电路、通信原理、数据包协议、通讯程序流程图.另外,还介绍了单片机C51编写的通讯软件及用C++Builder建立在Window98/95环境下的计算机端通信软件的实现.