In this work,three logical fault tolerant techniques are applied on a SpaceWire interface circuit after analysis of SpaceWire error handling mechanism,as the reliability is of great importance to this communication standard which is specially presented for spacecraft onboard communication.The techniques are including:1.An implementation of SED-DED Hamming encoding on module FIFO,2.Fault tolerant design of state machine,3.The implementation of TMR registers.Those techniques are all implemented on Xilinx FPGA with evaluation and analysis of penalty of performance and area.