A complex study was performed on a set of AlGaN/GaN high-electron-mobility transistor structures grown by metalorganic vapor phase epitaxy on miscut Si(111) wafers with a highly resistive epitaxial Si layer to investigate the influence of substrate miscut on their properties. The results showed that wafer misorientation had an influence on the strain evolution during the growth and surface morphology, and could have a strong impact on the mobility of 2D electron gas, with a weak optimum at 0.5° miscut angle. A numerical analysis revealed that the interface roughness was a main parameter responsible for the variation in electron mobility.

В докладе показаны актуальные результаты разработки отечественной технологии выращивания гетероструктур на основе нитрида галлия (GaN) на сверхвысокоомных эпитаксиальных структурах кремния диаметром 150 мм. Получены структуры Ga(Al)N/Si диаметром до 150 мм с подвижностью электронов в 2DEG более 1500 см2В-1с-1, изготовлены тестовые транзисторы GaN HEMT с напряжением отсечки порядка -6,5 В, максимальным током стока насыщения 570 мА/мм, крутизной транзисторов не менее 100 мСм/мм и пробивным напряжением более 200 В.

Исследованы механические свойства поликристаллических слоев кремния в зависимости от температуры роста слоя при осаждении их методом CVT. Показано, что основным технологическим параметром, определяющим величину и направление прогиба кремниевых структур, является температура роста слоя кремния.

Представлены состав, описание основных узлов и принцип работы экспериментального образца установки «Эпифаз ТМ 200-01» газофазной эпитаксии из металлоорганических соединений (ГФЭ МОС) для роста III-N-гетероструктур на подложках диаметром до 200 мм

Продемонстрированы новые результаты разработки отечественной технологии Ga(Al)N-on-Si. Разработка ведется АО «Эпиэл» в тесном сотрудничестве с НТЦ микроэлектроники РАН. Получены первые отечественные гетероэпитаксиальные структуры Ga(Al)N/Si диаметром 100 мм для HEMT-транзисторов с подвижностью электронов в канале 2DEG выше 1500 см2В-1с-1, выращенные на сверхвысокоомных эпитаксиальных структурах Si на МОГФЭ-системе Dragon-125, разработанной в НТЦ микроэлектроники РАН.

Представлены результаты изучения морфологии поверхности и структуры слоев AlN, сформированных аммиачной МЛЭ на темплейтах 3C-SiC/Si(111) on-axis- и 4° off-axis-разориентации. Опробован технологический режим низкотемпературной эпитаксии зародышевого слоя AlN на поверхности 3C-SiC(111). Среднеквадратичная шероховатость поверхности (5 х 5 мкм) слоев AlN толщиной 150 ± 50 нм составила 2,5-3,5 нм на темплейтах 3C-SiC/Si(111) on-axis и 3,3-3,5 нм на 4° off-axis. Показано уменьшение шероховатости смачивающего слоя AlN при изменении скорости роста. Получены монокристаллические слои AlN(0002) со значениями FWHM (ω-геометрия) 1,4-1,6°. The paper presents the surface morphology and crystal structure of AlN layers formed by ammonia MBE on 3C-SiC/Si(111) on-axis and 4° off-axis disorientation. It offers the technological approach of low-temperature epitaxy of the AlN nucleation layer on the 3C-SiC (111) surface. Root mean square roughness (5 х 5 |xm) of AlN layers with thickness of 150 ± 50 nm was 2,5-3,5 nm onto on-axis templates and 3.3-3.5 nm onto 4° off-axis. It appears that the RMS roughness of the AlN surface is changing with the growth rate variation. Single-crystal AlN(0002) layers with FWHM values (ω-geometry) of 1.4-1.6° have been obtained.

Высокая плотность структурных дефектов является основной проблемой при изготовлении электроники на гетероструктурах «кремний на сапфире» (КНС). Современный метод получения ультратонких структур КНС с помощью твердофазной эпитаксиальной рекристаллизации позволяет значительно снизить дефектность в гетероэпитаксиальном слое КНС. В данной работе ультратонкие (100 нм) слои КНС были получены путем рекристаллизации и утонения субмикронных (300 нм) слоев кремния на сапфире, обладающих различным структурным качеством. Плотность структурных дефектов в слоях КНС оценивалась с помощью рентгеноструктурного анализа и просвечивающей электронной микроскопии. Кривые качания от дифракционного отражения Si(400), полученные в ω-геометрии, продемонстрировали максимальную ширину на полувысоте пика не более 0,19-0,20° для ультратонких слоев КНС толщиной 100 нм. Формирование структурно совершенного субмикронного слоя КНС 300 нм на этапе газофазной эпитаксии обеспечивает существенное уменьшение плотности дислокаций в ультратонком кремнии на сапфире до значений ~1 • 104 см-1. Тестовые n-канальные МОП-транзисторы на ультратонких структурах КНС характеризовались подвижностью носителей в канале 725 см2 Вс-1. The high density of structural defects is the main problem on the way to the production of electronics on silicon-on-sapphire (SOS) heteroepitaxial wafers. The modern method of obtaining ultrathin SOS wafers is solid-phase epitaxial recrystallization which can significantly reduce the density of defects in the SOS heteroepitaxial layers. In the current work, ultrathin (100 nm) SOS layers were obtained by recrystallization and thinning of submicron (300 nm) SOS layers, which have various structural quality. The density of structural defects in the layers was estimated by using XRD and TEM. Full width at half maximum of rocking curves (ω-geometry) was no more than 0.19-0.20° for 100 nm ultra-thin SOS layers. The structural quality of 300 nm submicron SOS layers, which were obtained by CVD, depends on dislocation density in 100 nm ultrathin layers. The dislocation density in ultrathin SOS layers was reduced by ~1 • 104 cm-1 due to the utilization of the submicron SOS with good crystal quality. Test n-channel MOS transistors based on ultra-thin SOS wafers were characterized by electron mobility in the channel 725 cm2 V-1 s-1.

Technique based on FIB and PCE for the formation of nanoscale silicon fins on silicon-on-sapphire structures was demonstrated. The stability of the obtained mask to PCE was investigated depending on the dose of ionic exposure. It was found that the Si fin 150 nm in height and a width of less than 40 nm was obtained by implantation of Ga+ ions with a dose of 3 square 1017 to 4 square 1017 CM-2. Current-voltage characteristic of contacts to nanosized fins was researched. The gate dielectric Al2O3 2-3 nm thick was deposited by the ALD method. In the created prototypes of the transistor, the length of each channel was 1.2 mu m, and the gate - 100 nm. The obtained I-V characteristics prove the good controllability of the channel in the nanosized fin and demonstrate the operability of the devices.

The complexity of optimizing the technology of heteroepitaxy is an important limiting factor of the application of silicon-on-sapphire (SOS) structures. In order to eliminate this technological barrier, we study the gas-phase formation of the initial silicon layer on the R-plane of sapphire. The parameters of the deposited layers are analyzed using industrial quality-control methods and X-ray diffraction, SEM, and Raman-spectroscopy. The resistivity-distribution profiles are obtained by the spreading-resistance (SRP) method. It is shown that the initial stage of growth at a temperature of 910–930°C leads to a decrease in the autodoping of the silicon layer with aluminum from the substrate. Heat treatment of the initial layer formed at a temperature of 945–965°C makes it possible to obtain a high structural quality of SOS structures in a wide range of deposition temperatures (960–1005°C) of the main layer layer. Comparison of the SOS structures obtained with optimal parameters of the developed mode and by means of the conventional process shows a decrease in the full width at half-maximum of the rocking curve to ~0.24°, a decrease in mechanical compressive stresses to 0.8–1.96 GPa, and homogeneity of the resistivity profile to a depth of 180–350 nm. Application of the developed technological modes can significantly improve the homogeneity of the control parameters of the SOS in a single process, which improves the performance of the manufacturing process.

The main technological problem in the manufacture of electronics on silicon-on-sapphire (SOS) structures is the high density of defects in silicon-on-sapphire layers. The modern method of obtaining ultrathin SOS structures using solid-phase epitaxial recrystallization and pyrogenic thinning can significantly reduce the defectiveness in these layers. Nevertheless, the effect of the defectiveness of submicron SOS layers on the structural perfection of ultrathin layers remains unclear. In this work, ultrathin (100 nm) SOS structures have been obtained on submicron (300 nm) SOS structures with different structural quality. The crystallinity of 300 nm layers before the recrystallization process and ultrathin layers has been determined using X-ray diffraction and transmission electron microscopy. It has been found that the lowest values of the full width at half maximum (FWHM) of 0.19°–0.20° have been observed for an ultrathin SOS structure obtained based on the most structurally perfect SOS layers of 300 nm. It has been shown that a more perfect near-surface layer of the basic SOS structure of 300 nm and a double implantation regime make it possible to reduce the density of structural defects in the ultrathin Si layer by an order of magnitude to achieve ~1 × 10 4 cm –1 .

Results of surface morphology and crystalline structure had shown for Ga(Al)N layers which was grown by MBE on 3C-SiC/Si(111) virtual substrates with on-axis and 4 degrees off-axis orientation. Roughness values had increased up to similar to 7 nm for on-axis and to similar to 5 nm for 4 degrees off-axis orientation after 560 nm deposition of GaN. Monocrystalline GaN(0002) was verified by co-rocking curve measurement with FWHM 0.61-0.76 degrees for on-axis and 0.55-0.65 degrees for 4 degrees off-axis orientation. Wafer bow shown the ascending up to similar to 18 mu m for on-axis and similar to 12 mu m for 4 degrees off-axis orientation and tensile strain for all samples had been confirmed.

High-resistivity silicon layers were deposited on different high-doped wafers with arsenic, antimony and boron doping. The Si-layers were formed at 950-1050 °C with various vapor-gas mixture composition: SiH 4 , SiH 4 +SiCl 4 , SiH 4 +SiHCl 3 , SiHCl 3 . Resistivity thickness profile was measured by spreading resistance probe (SRP) method. Unusual resistivity profile incline was detected for isotype junction. It was found that the phenomenon of doping segregation appears when Si-layers deposit on arsenic high-doped wafers. To our knowledge, arsenic segregation in relation to autodoping phenomenon was studied for the first time. It was discovered that the increase of growth rate and HCl etching procedure change the incline of SRP-profile. Pre-epitaxy wafer annealing allowed to decrease the concentration of arsenic on wafer surface.

Thin (300-600 nm) heteroepitaxial silicon layers were deposited on R-plane sapphire wafers via hydride-chloride CVD technique using SiH 4 and SiCl 4 gas-vapor mixture with PH 3 doping gas diluted by H 2 . Obtained layers were studied with AFM, XRD, SEM, UV scattering and surface PV methods. Influence of SiH 4 :SiCl 4 volume ratio on process and layer parameters was investigated. It was found that the growth rate of Si layer was increased when the volume concentration of SiCl 4 increased (at 900-1000 °C). Therewith the separate increase of SiH 4 and SiCl 4 volume ratio in gas-vapor mixture leads to a change of surface microrelief and Si-sapphire interface parameters. It was determined that the RMS (Rq) roughness of Si surface and microrelief height were decreased when the SiH 4 :SiCl 4 volume ratio in gas-vapor mixture changed from 8:1 to 4:1. XRD and SEM analysis of layers confirmed the improvement of the structure with increasing SiCl 4 volume concentration.

A fundamentally new method for synthesis of thick (200-400 nm) epitaxial films of silicon carbide on single-crystal Al 2 O 3 substrates is proposed. The method develops the previously discovered method of topochemical substitution of atoms during the transformation of Si into SiC. In the proposed method, a layer of epitaxial Si of orientation (100) or (111) is being preliminarily deposited on the sapphire via CVD or other technique. Then, using a topochemical reaction between the CO gas and the deposited epitaxial silicon film, a part of Si atoms is being substituted by carbon atoms. As a result, the silicon film transforms into SiC film. As experimental studies have shown, in the process of this transformation a high-quality epitaxial SiC layer can be formed on the sapphire surface under certain synthesis conditions. A detailed investigation of grown SiC layers using the methods of electron diffraction, ellipsometry, Raman spectroscopy, X-ray diffractometry and scanning microscopy is conducted and an analysis of experimental data is given. Formation of both cubic 3C-SiC and hexagonal SiC polytypes during the transformation of Si into SiC was revealed by the XRD method. A detailed analysis of the current state of the problems of growth of epitaxial SiC layers on Al 2 O 3 using various methods is provided. The method developed in this study opens up completely new perspectives not only for synthesis of semiconductors, but also for creation of new classes of composite, heat-resistant and other solid coatings.

В данной работе представлены результаты разработки и исследования процесса формирования эпитаксиальных слоев кремния, полученных с помощью хлоридного газотранспортного переноса в сэндвич-системе.Изучено формирование моно-и поликристаллических слоев на различных кремниевых подложках, а также на структурах типа «кремний с диэлектрической изоляцией» (КСДИ, EPIC).Исследованы распределения температуры в сэндвич-системе и толщины эпитаксиального слоя по площади подложки.Изучены зависимости скорости роста слоя от температуры пластины-источника и подложки, соотношения Cl/H и величины зазора между пластинами в сэндвич-системе.Скорость роста поликристаллических слоев на КСДИ достигает  мкм/мин при толщине слоев - мкм, монокристаллических слоев Si на кремниевых подложка - мкм/мин при толщине слоев - мкм.Наиболее значимой особенностью процесса хлоридного газотранспортного переноса кремния с практической точки зрения является то, что при формировании эпитаксиальных слоев в качестве источника кремния можно использовать отбракованные пластины и структуры, прошедшие различные циклы эпитаксиального

Thin (300 and 600 nm) epitaxial silicon layers were deposited on R-plane sapphire wafers by CVD technique using SiH 4 and SiCl 4 mixture gas diluted by hydrogen. Quality parameters of epitaxial silicon on sapphire (SOS) wafers were studied by means of XRD, AFM, UV scattering and surface PV methods. Resistivity profiles of layers were measured. Quality of SOS in dependence on initial growth (up to 80-100 nm thickness of layer) temperature and growth (up to necessary thickness) temperature was observed. Optimal temperature ranges of layer growth were experimentally estimated. Using of low growth temperature (about 945-960 °C) of initial layer growth and high growth temperature (above 960 °C) of residual layer allowed to enhance quality of SOS wafer and get uniform resistivity profile of layer. Practical application of this technique allowed to produce SOS wafers of high quality in wide optimal temperature range, increase thermal stability of SOS and process efficiency.