The instability of the p-type metal effective work function of high-k/metal gate metal-oxide-semiconductor stacks after high temperature treatment results in device threshold voltage shifts and is one of the big challenges for the gate-first integration of high-k dielectrics in the future complementary metal-oxide semiconductor process flow. The exact cause of this instability is a subject of intense debate. In this article, it is shown that by implanting the gate stack with a fluorine dose of 10(15) cm(-2), it is possible to achieve an appropriate silicon valence band-edge effective work function of 5.1 eV for p-type metal-oxide-semiconductor devices. It is also shown that the fluorine doping can be accomplished not only with F+, but also with BF2+ ions. The influence of the implantation energy on the obtained effective work function is demonstrated and discussed. The origin of the induced shift is also discussed. Leakage current measurements show that the leakage properties of high-k stacks are not worsened by F implantation, while the implantation of BF2 slightly affects the leakage currents. (c) 2011 American Vacuum Society. [DOI: 10.1116/1.3521471]

This paper discusses the effective work function instability in high-κ-based MOS gate stacks, which occurs after high temperature (1070 °C) processing. Theories which have been put forward to explain this effect are discussed and unified to a consistent phenomenological model. The Vfb roll-off effect is also discussed and can be described by the model.

In this letter, an ion implantation approach to engineer the effective work function is discussed and an empirical model to explain the mechanisms of work function change is proposed. It is shown that by doping a TiN/HfSiOx stack with La and F, a silicon conduction band edge and valence band edge metal effective work function of 3.8 and 5.4 eV, respectively, can be achieved. The empirical correlation of the achieved effective work function to the electronegativity of the dopant element is explained.

Effective work function instability of high‐κ/metal gate MOS stacks after high temperature treatment results in device threshold voltage shifts and is one of the problems associated with the gate‐first integration of high‐κ dielectrics in the CMOS process flow. The exact reason for this instability is subject of intense debate. In this paper it is shown that a positive threshold voltage shift due to thermal treatment can be compensated by implanting the lanthanoids lanthanum or dysprosium into the high‐κ stack.

In this paper the tuning of the n-metal effective work function by implantation of lanthanum is demonstrated. The effect of implantation and thermal annealing on the device flat-band voltage is presented. It is shown that lanthanum doping of the gate stack produces a negative shift of the flat-band voltage of -0.53 V for a lanthanum does of 5x10^1^4 cm^-^2, after the device undergoes S/D anneal conditions. The results are discussed within the framework of a phenomenological dipole model and compared with other results

While the debate about the exact cause of Fermi level pinning in metal-high-k dielectric gate stacks is ongoing, several solutions for engineering the threshold voltage Vt of the gate stacks have been proposed. Engineering the flat-band voltage Vfb translates into an effective control of the threshold voltage. This study uses ion implantation as a tool to adjust Vfb by doping the gate stack. It is shown that lanthanide implantation can modulate the effective work function for n-type gate electrodes. Ion implantation of dysprosium (Dy) and lanthanum (La) into the gate stack achieves significant flat-band voltage shifts of about −1 and −3V, respectively, for a dose of 1×1014cm−2. By increasing the implantation dose and energy, larger shifts in the flat-band voltage are obtainable.

With the replacement of traditional polysilicon and silicon dioxide by metal gates and high-k dielectrics, respectively, in the MIS gate stack for the 45 nm technology node, higher than expected device threshold voltages have been observed due to the effect of Fermi-level pinning. While the debate as to the exact cause of Fermi-level pinning is ongoing, several attempts (capping layers, new gate metal compositions) have been made to curb this effect. In this paper, the tuning of metal gate work function by ion implantation is investigated as a tool for controlling the threshold voltage. Lanthanide incorporation is used to achieve a flat-band voltage shift of more than -1 V for n-MOS capacitors. It is shown that by adjusting dose and energy, the flat-band voltage shift can be tuned to a desired value, without substantial damage to the insulating quality of the gate. This translates to an effective shift in the threshold voltage.