Modest channel carrier mobility in SiC-MOSFETs with NO annealed gate oxides has been the main factor hampering development of low power devices (300 – 650 V). A very fast interface trap, noted as NI, has been suggested to be the main culprit for poor inversion channel carrier mobility. The origin of the NI trap is unknown, but it is likely a property of the SiO 2 and it is enhanced during post nitridation. In this study we show that the NI trap is also detected in 4H-SiC/AlN and 4H-SiC/Al 2 O 3 MIS-capacitors. Observations are done using conductance spectroscopy and capacitance voltage measurements at cryogenic temperatures. This strongly suggests that the NI trap is a property of the SiC surface and not the dielectric used to form the SiC/dielectric interface. Furthermore, a scanning transmission electron microscopy (STEM) was performed to confirm that there are no SiO 2 layers or islands present at the 4H-SiC/AlN and 4H-SiC/Al 2 O 3 interfaces.

Modest channel carrier mobility in SiC-MOSFETs with NO annealed gate oxides has been the main factor hampering development of low power devices (300 – 650 V). A very fast interface trap, noted as NI, has been suggested to be the main culprit for poor inversion channel carrier mobility. The origin of the NI trap is unknown, but it is likely a property of the SiO2 and it is enhanced during post nitridation. In this study we show that the NI trap is also detected in 4H-SiC/AlN and 4H-SiC/Al2O3 MIS-capacitors. Observations are done using conductance spectroscopy and capacitance voltage measurements at cryogenic temperatures. This strongly suggests that the NI trap is a property of the SiC surface and not the dielectric used to form the SiC/dielectric interface. Furthermore, a scanning transmission electron microscopy (STEM) was performed to confirm that there are no SiO2 layers or islands present at the 4H-SiC/AlN and 4H-SiC/Al2O3 interfaces.

Very fast interface traps have recently been suggested to be the main cause behind poor channel-carrier mobility in SiC metal–oxide–semiconductor field effect transistors. It has been hypothesized that the NI traps are defects located inside the SiO2 dielectric with energy levels close to the SiC conduction band edge and the observed conductance spectroscopy signal is a result of electron tunneling to and from these defects. Using aluminum nitride and aluminum oxide as gate dielectrics instead of SiO2, we detect NI traps at these SiC/dielectric interfaces as well. A detailed investigation of the NI trap density and behavior as a function of temperature is presented and discussed. Advanced scanning transmission electron microscopy in combination with electron energy loss spectroscopy reveals no SiO2 at the interfaces. This strongly suggests that the NI traps are related to the surface region of the SiC rather than being a property of the gate dielectric.

The channel carrier mobility in commercially available 4H-SiC MOSFETs with NO annealed gate oxides is still far below the theoretical limit. It has been suggested that the main reason is high density of very fast interface traps, labeled NI, located inside the oxide very close to the SiC conduction band edge. The NI traps are usually not observed at room temperature but can be detected at cryogenic temperatures. In this study we use conductance spectroscopy and high-low CV analysis of MOS-capacitors at cryogenic temperatures to show that the very fast NI traps are practically absent in oxides grown using sodium enhanced oxidation.

Very fast interface traps have recently been suggested to be the main cause behind the rather poor inversion channel mobility in nitrided SiC metal-oxide-semiconductor-field-effect-transistors (MOSFETs). Using capacitance voltage analysis and conductance spectroscopy on metal oxide semiconductor capacitors, at cryogenic temperatures, we find that these fast traps are absent in oxides made by sodium enhanced oxidation, and high inversion channel-carrier mobility in MOSFETs made by sodium enhanced oxidation is observed.

Fast near-interface (NI) traps have recently been suggested to be the main cause for poor inversion channel mobility in nitrided SiC metal-oxide-semiconductor-field-effect-transistors. Combining capacitance, conductance, and thermal dielectric relaxation current (TDRC) analysis at low temperatures of nitrided SiC MOS capacitors, we observe two categories of fast and slow near-interface traps at the SiO2/4H-SiC interface. TDRC reveals a suppression of slow near-interface traps after nitridation. Capacitance and conductance analysis reveals a high density of fast NI traps close to the SiC conduction band edge that are enhanced by nitridation. The very fast response of NI traps prevents them from detection using TDRC or deep level transient spectroscopy.

The inversion channel electron mobility in 4H-SiC MOSFETs with NO annealed gate oxides is still well below its theoretical limit. The physical reason behind the reduced mobility is not yet fully established but has for example been attributed to a high density of very fast interface traps close to the conduction band edge. These traps are not detected by high-low CV analysis at room temperature but are observed by conductance spectroscopy at low temperatures. In this study we demonstrate how conventional high-low CV analysis of MOS capacitors at cryogenic temperatures can be applied to detect and quantify these very fast traps.

The state-of-the-art technology for gate oxides on SiC involves the introduction of nitrogen to reduce the density of interface defects. However, SiC metal–oxide–semiconductor (MOS) field-effect transistors still suffer from low channel mobility even after the nitridation treatment. Recent reports have indicated that this is due to near-interface traps (NITs) that communicate with electrons in the SiC conduction band via tunneling. In light of this evidence, it is clear that conventional interface trap analysis is not appropriate for these defects. To address this shortcoming, we introduce a new characterization method based on conductance–temperature spectroscopy. We present simple equations to facilitate the comparison of different fabrication methods based on the density and location of NITs and give some information about their origin. These techniques can also be applied to NITs in other MOS structures.

The low channel-carrier mobility in commercial SiC MOSFETs has been attributed to fast electron traps labeled “NI.” These traps exhibit anomalous behavior compared to other interface trap signals. Furthermore, the electrical parameters extracted from a conventional interface trap analysis of the NI signal are not physically reasonable. To explore the origin of these traps, we fabricated SiC MOS capacitors and measured the conductance across a range of temperatures (between 50 and 300 K). By analyzing the surface electron density at the signal peaks, it is evident that these traps are in fact near-interface traps (NITs)—they are located within the oxide and exchange electrons via a tunneling mechanism. We also developed a model for the conductance generated by NITs and demonstrated a good fit to the experimental data. The knowledge that the NI signal is due to NITs will help in directing future efforts to improve SiC MOSFET performance.