Micro-Digital Sun Sensor (μDSS) is a sun detector which senses relative position of micro-satellites to the sun in space. It is composed of a solar cell power supply, a RF communication block and an imaging chip which is called APS+. The APS+ integrates a CMOS Active Pixel Sensor (APS) of 368×368 pixels, a 12 bit Analogue to Digital Converter (ADC), digital Input and Output (I/O) circuits, timing signal generators and drivers, and digital signal processing circuits for centroid calculation. The paper describes the implementation of a prototype of the μDSS APS+ using a standard 0.18μm CMOS process. As a space application, it is particularly characterized by its low power consumption. The reduction of power consumption is mainly achieved by windowing, which is enabled by a specific active-pixel design in APS. The functions of the blocks in APS+ are tested. The test results will be discussed following in the paper.

We discuss optimizations of pinned photodiode (PPD) pixels for indirect time of flight sensors. We focus on the transfer-gate and dumping gate regions optimization, on the PPD dimension and shape to assure fast lateral charge transfer and on the epitaxial layer thickness for a good tradeoff between fast vertical charge transfer and high quantum efficiency at near infrared region. The overall performance of the pixel is quantified by the demodulation contrast of the pixel at specific frequencies. The operation frequency of the device is determined by the required ambiguity range of the application and the required distance noise. In order to reach a reasonable distance noise, the pixel needs to allow modulation frequencies up to 100 MHz. In this paper, we present TCAD simulation and experimental data on demodulation contrast, impulse response time, and quantum efficiency of 10 × 10 μm pixels. We introduce a setup for impulse response measurement and we compare this to the demodulation contrast. We also discuss the optimization of the dump gate and dump diffusion. With the best pixel we measured a quantum efficiency of about 45% at 850 nm, a demodulation contrast of 47% at 80 MHz, and an impulse response time <; 5 ns.

The dynamic range and the signal-to-noise ratio of a CMOS image sensor depend on the saturation level of the photodiodes. A very high charge handling capacity or the full well of the photodiode is desired. The thermionic emission of the electrons from the photodiode to the collection node of the pixel reduces the full well capacity of the photodiode. The effect of operating temperature on this thermionic effect on full well capacity is studied in this paper. As the temperature increases, electrons gain thermal energy and are able to overcome the potential barrier between the photodiode and the collection node. This is observed as an increased feedforward voltage. The feedforward voltage shows a logarithmic relationship with temperature changes. The rate of change of the feedforward voltage is not uniform and depends on the position of the quasi-Fermi level. For lower temperature ranges, the change in the feedforward voltage observed is linear, while, for higher temperature ranges, the change is logarithmic in nature.

The charge handling capacity or the full well of the photodiodes used in CMOS image sensors is a very important characteristic because it affects the saturation level and the dynamic range of the image sensor. The scaling of the pixel size to increase the spatial resolution is also reducing the barrier separating the photon detection and the collection node in a standard pinned photodiode (PPD). The barrier reduction and the thermionic emission of the electrons allow some of the charges from the photodiode well to feed into the collection node, resulting in a feedforward voltage. In conventional readout of the pixels, this feedforward voltage is neglected and lost when the collection node is reset. The barrier height of the transfer gate (TG) determines the quantity of electrons held back in the photodiode well. Thus, the knowledge of this barrier height is very important in determining the true charge handling capacity of the photodiode potential well. Experiments with standard PPDs showed that a barrier height of around 0.5 V is needed to hold the electrons in the photodiode potential well. This is analogous to the barrier potential for charge-coupled devices reported in the literature. Furthermore, the barrier height dependence on the charge storing time in the photodiode well and the structural dimensions of the TG and photodiode length are also explored in this paper.

CMOS image sensors have become very popular in low cost imaging devices. In order to realize images of high quality, the image sensors need to have a high resolution, be able to achieve a high Signal-to-Noise ratio (SNR) and have a wide dynamic range. To increase the spatial resolution of the image sensors, the pixel size has been scaling down allowing integration of more pixels in a given die area. On the side, this scaling process reduces the potential barrier separating the charge generation centers from collection centers in modern CMOS photodiodes. This reduces the charge handling capacity of the photodiode well as well. Electrons contained within a well possess thermal energy, and thus acquire random thermal velocities. A sufficient barrier is thus needed to prevent the overflow of electrons when the photodiode potential well is full. In classical CCDs it was found that the minimum barrier needed to hold the electrons in the photodiode well is around 0.4V-0.6V. However the charge handling capacity of the CMOS pinned photodiodes are not well studied. In this paper, the minimum barrier potential needed in a pinned photodiode and the feed-forward of electrons are presented for dependencies on variations in photodiode geometry, temperature and bias voltages.

Perception of the environment in 3D has always been an important sensory input for machine vision applications. 3D imaging sensors have been investigated for several decades. Recently, novel solid state 3D technologies have emerged, leading to 3D vision systems with radically improved characteristics. At present these new technologies make full-range 3D data available at high frame rates, and thus open the path toward a much broader application of 3D vision systems for machine vision applications. This book chapter reviews state-of-the-art commercial solid state 3D cameras and presents their working principle, their range measurement precision and linearity, and typical machine vision applications. At the end of the book chapter the pro and cons of each technology are listed and the latest camera model of each technology is presented. Hence the reader will be aided in selecting the most suitable 3D camera for a given machine vision application. Furthermore the advantages of a 3D vision system over a conventional 2D vision system are demonstrated through the examples.

This paper presents a radiation degradation study on 4-Transistor (4T) complementary metal-oxide-semiconductor (CMOS) image sensors designed in standard 0.18-μm technology. The significant contribution of this paper is a systematic evaluation of the X-ray radiation effects on image sensors from the individual device level, to the pixel level and to the level of the entire sensor. The major degradation parameters of the sensor have been analyzed. This paper also includes test structures of varying geometries of in-pixel MOSFETs, pinned photodiodes (PPD), and transfer gates (TG). Characterization was performed during different X-ray doses up to 109 krad. The major degradation-an increase in the dark signal-is analyzed by modifying the TG charge transfer time and integration time. The PPD and the TG are the elements most sensitive to the dark signal of the sensor. The radiation-related dimensional effects on the sensors are also evaluated, which show different results compared to 3T pixels. The transfer-gate length influences the dark signal due to not only the electric field variation in the TG channel but also the local defect generations. In-pixel MOSFETs are used to identify the origin of increases in radiation-induced dark signal. Shallow trench isolation (STI) oxides are responsible for the radiation degradation of the sensor. A slight degradation of the quantum efficiency was observed after radiation in the short-wavelength region. Basic hardening-by-design techniques are also presented. The discussion results of the radiation-related dimensional effects on the sensors together with the STI effect can be used as a guideline for future layout designs of radiation-tolerant sensors. Identifying the pixel dark current origin can help to determine where and how to suppress the pixel dark current generation more effectively.

The micro-Digital Sun Sensor (μDSS) is a sun detector which senses a satellite’s instant attitude by detecting its attitude angle with respect to the sun. It is composed of a solar cell power supply, a RF communication block and an imaging chip, which is called APS+. The APS+ integrates a CMOS Active Pixel Sensor (APS) of 368×368 pixels, a 12 bit Analogue to Digital Converter (ADC), and digital signal processing circuits. This paper describes the implementation of a prototype of the μDSS APS+ fabricated in a standard 0.18μm CMOS process. The APS+ is particularly characterized by its low power consumption (a factor 10 lower compared to the state-of-the-art) since power is a critical specification for space application. The power is mainly reduced by “profiling” and “windowing”, which are enabled by a specific active-pixel design. The measurement results are discussed following in this paper.