High performance 15 kV n-GTOs were demonstrated for the first time in 4H-SiC. The device utilized a 140 μm thick, lightly doped n-type drift layer, with 1450°C lifetime enhancement oxidation, which resulted in a carrier lifetime of 17.5 μs. The p+ backside injector layer was thinned to minimize parasitic resistances. A room temperature forward voltage drop of 5.18 V was observed at a current density of 100A/cm2. A 1 cm2 device showed a leakage current of 0.17 μA at 15 kV. The 4H-SiC n-GTO showed latching characteristics, and showed a turn-off time of 170 ns in a resistive load switching setup, which represents about a factor of 45 improvement in turn-off speed over 4H-SiC p-GTOs with comparable voltage and current ratings.

An investigation into the increased leakage currents and reduced blocking voltages associated with 1450°C lifetime enhancement oxidation for the 4H-SiC p-GTOs is presented. Roughening of the 4H-SiC surface due to localized crystallization of SiO2, or crystobalite formation, during the high temperature oxidation was identified as one of the main causes of this issue. A factor of 30 difference in permeability to O2between amorphous SiO2and crystobalite caused uneven oxidation, which resulted in significant roughness. This roughness, placed at the metallurgical junction between the gate and the drift layer, where the E-field is greatest, is believed to be responsible for the premature breakdown characteristics. A 2-step lifetime enhancement process, which moves this roughness to the lower E-field region of the device was introduced to alleviate this issue. A 15 kV 4H-SiC p-GTO with the 2-step lifetime enhancement process demonstrated a significant reduction in VFover the 1300°C oxidized devices, without any impact on blocking characteristics.

Ultra High Voltage (UHV) 4H-SiC N-IGBTs, with drift layer thicknesses ranging from 140 μm to 240 μm, were fabricated and characterized. A blocking voltage of 25 kV, and a forward voltage drop (VF) of 12.8 V were measured from a 9 mm x 9 mm device with a 240 μm drift layer. A positive temperature coefficient of VF was observed, which is desirable for paralleling, but unusual for a bipolar device. The cause of this behavior was investigated using a test structure that allowed separate observations of electron and hole currents in the 4H-SiC IGBT structure. It was revealed that the hole current increases with temperature, due to increases in charge injection and carrier lifetimes at elevated temperatures, while the electron current decreases with temperature due to a unipolar resistance component in its path, most likely due to JFET resistance, formed by depletion regions extending into the lightly doped drift region. The concept of Carrier Storage Layer (CSL) was implemented in UHV 4H-SiC N-IGBTs to suppress this effect, resulting in a negative temperature coefficient of VF. A 15 kV 4H-SiC N-IGBT with a 1x1016cm-3 doped CSL showed a VF reduction of 3 V at a collector current of 20 A, at a junction temperature of 150°C, compared to a 15 kV SiC N-IGBT without a CSL at the same collector current value.

The impact of the lifetime enhancement process using high temperature thermal oxidation method on 4H-SiC P-GTOs was investigated. 15 kV 4H-SiC P-GTOs with 140 μm thick drift layers, with and without 1450°C lifetime enhancement oxidation (LEO) process, were compared. The LEO process increased the average carrier lifetime in p-type epi layer from 0.9 μs to 6.25 μs, and it was observed that the effectiveness of the lifetime enhancement process was very sensitive to the doping concentration. The device with the LEO process showed a significant reduction in forward voltage drop and a substantially lower holding current, as expected from the carrier lifetime measurements. However, a slight reduction in blocking capability was also observed from the devices treated with LEO process. The common emitter current gain (β) of the wide base test NPN BJT was approximately 10X higher for the wafer with LEO process.

Due to their fast switching speed, knee-free forward characteristics, and a robust, low reverse recovery body diode, SiC MOSFETs are ideal candidates to replace silicon IGBTs in many high-power medium-voltage applications. 1700 V SiC MOSFETs have already been released to production at Wolfspeed based on its 2 n d Gen technology. In this paper, we present our latest results in high voltage 4H-SiC MOSFET development. A low specific on-resistance of 4.7 mΩ⋅cm 2 has been achieved on 1700 V, 20 mΩ 4H-SiC DMOSFETs at 250°C based on a 3 rd generation planar MOSFET platform, which is less than half of the resistance of the previous generation devices. A detailed analysis has been carried out with respect to the static and dynamic characteristics, third quadrant conduction, and body diode reverse recovery charge, etc.

Ultra high voltage (UHV, >15 kV) 4H-silicon carbide (SiC) power devices have the potential to significantly improve the system performance, reliability, and cost of energy conversion systems by providing reduced part count, simplified circuit topology, and reduced switching losses. In this paper, we compare the two MOS based UHV 4H-SiC power switching devices; 15 kV 4H-SiC MOSFETs and 15 kV 4H-SiC n-IGBTs. The 15 kV 4H-SiC MOSFET shows a specific on-resistance of 204 m Omega cm(2) at 25 degrees C, which increased to 570 m Omega cm(2) at 150 degrees C. The 15 kV 4H-SiC MOSFET provides low, temperature-independent, switching losses which makes the device more attractive for applications that require higher switching frequencies. The 15 kV 4H-SiC n-IGBT shows a significantly lower forward voltage drop (V-F), along with reasonable switching performance, which make it a very attractive device for high voltage applications with lower switching frequency requirements. An electrothermal analysis showed that the 15 kV 4H-SiC n-IGBT outperforms the 15 kV 4H-SiC MOSFET for applications with switching frequencies of less than 5 kHz. It was also shown that the use of a carrier storage layer (CSL) can significantly improve the conduction performance of the 15 kV 4H-SiC n-IGBTs.

Improvements in 900V SiC MOSFET technology have resulted in switches that have extremely low ON resistance in high-speed packages. 900V SiC MOSFETs are promising candidates for hard switched and soft-switched power supply applications due to low ON resistance at higher temperature, a robust low-recovery body diode, avalanche capability and low output stored charge. System designers will be able to use these features to enable novel topologies and achieve large improvements in power density and efficiency. As an example, a 220 W single-stage flyback LED driver is presented, which achieves 40% size reduction over a 650V silicon MOSFET based solution, obtains similar efficiencies and a lower BOM cost.

A 1 cm x 1 cm 4H-SiC N-IGBT exhibited a blocking voltage of 20.7 kV with a leakage current of 140 μA, which represents the highest blocking voltage reported from a semiconductor power switching device to this date. The device used a 160 μm thick drift layer and a 1 μm thick Field-Stop buffer layer, and showed a VF of 6.4 V at an IC of 20 A, and a differential Ron,sp of 28 mΩ-cm2. Switching measurements with a supply voltage of 8 kV were performed, and a turn-off time of 1.1 μs and turn-off losses of 10.9 mJ were measured at 25°C, for a 8.4 mm x 8.4 mm device with 140 μm drift layer and 2 μm F-S buffer layer. The turn-off losses were reduced by approximately 50% by using a 5 μm F-S buffer layer. A 55 kW, 1.7 kV to 7 kV boost converter operating at 5 kHz was demonstrated using the 4H-SiC N-IGBT, and an efficiency value of 97.8% was reported.

In this paper, we report our recently developed large area 4H-SiC n-IGBTs that have a chip size of 1 cm 2 and an active conducting area of 0.37 cm 2 . A blocking voltage of 22.6 kV has been demonstrated with a leakage current of 9 μA at a gate bias of 0 V at room-temperature. This is the highest breakdown voltage of a single MOS-controlled semiconductor switch reported to date. To improve the conductivity modulation and lower the conduction losses during the on-state, a thermal oxidation process was applied to enhance the carrier lifetime prior to the device fabrication. Compared to the devices that did not receive this lifetime enhancement process, the lifetime enhanced devices displayed nearly 1 V lower forward voltage drop with little increase in switching energy and no degradation of static blocking characteristics. A specific differential on-resistance of 55 mΩ-cm 2 at 20 A and 125 °C was achieved, suggesting that bipolar power devices with thick drift regions can benefit from further enhancement of the ambipolar carrier lifetime.

For the first time, a 1200 V 4H-SiC power MOSFET with a monolithically integrated gate buffer circuit has been demonstrated successfully. The device used a 6x10 15 cm -3 doped, 10 μm thick n-type drift layer to support 1200 V. The gate buffer circuit was built in a p-well, formed by boron ion implantation. The integrated device provided sufficient voltage isolation for the control circuit from the drain of the power MOSFET, and supported internal supply voltages up to 20 V. The operation of the integrated devices was demonstrated. A specific on-resistance ( R on,sp ) of 20 mΩ-cm 2 was observed. The high R on,sp was due to the limitations in NMOS pull-up circuit topology and the body effect in the 4H-SiC NMOSFET. Development of PMOS pull-up devices is recommended for future integration efforts.

The latest developments in ultra high voltage 4H-SiC IGBTs are presented. A 4H-SiC P-IGBT, with a chip size of 8.4 mm x 8.4 mm and an active area of 0.32 cm2, which is double the active area of the previously reported devices [1], exhibited a blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 41 mΩ-cm2 with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 17 kV, and demonstrated a room temperature differential specific on-resistance of 25.6 mΩ-cm2 with a gate bias of 20 V. Field-Stop buffer layer design was used to control the charge injection from the backside. A comparison between N- and P- IGBTs, and the effects of different buffer designs, are presented.

A 1 cm × 1 cm 4H-SiC N-IGBT exhibited a blocking voltage of 20.7 kV with a leakage current of 140 μA, which represents the highest blocking voltage reported from an MOS semiconductor power switching device to date. The device showed a VF of 6.4 V at an IC of 20 A, and a differential Ron,sp of 28 mΩ-cm2. Temperature insensitive on-state characteristics were demonstrated. Switching measurements with a supply voltage of 8 kV were performed, and a turn-off time of 720 ns and a turn-off loss of 5.4 mJ were measured at 25°C, for a 8.4 mm × 8.4 mm device with 140 μm drift layer and 5 μm Field Stop buffer layer. It was demonstrated that the charge injection from the backside can be controlled by varying the thickness of the Field-Stop buffer layer. A 55 kW, 1.7 kV to 7 kV boost converter operating at 5 kHz was demonstrated using the 4H-SiC N-IGBT, and an efficiency value of 97.8% was reported.

In this work, we report our recently developed 16 kV, 1 cm 2 , 4H-SiC PiN diode results. The SiC PiN diode was built on a 120 µm, 2×10 14 /cm 3 doped n-type SiC drift layer with a device active area of 0.5175 cm 2 . Forward conduction of the PiN diode was characterized at temperatures from 20°C to 200°C. At high injection-current density (J F ) of 350 ~ 400 A/cm 2 , the differential on-resistance (R ON,diff ) of the SiC PiN diode decreased from 6.08 mΩ·cm 2 at 20°C to 5.12 mΩ·cm 2 at 200°C, resulting in a very small average temperature coefficient of –5.33 µΩ·cm 2 /°C, while the forward voltage drop (V F ) at 100 A/cm 2 reduced from 4.77 V at 20°C to 4.17 V at 200°C. This is due to an increasing high-level carrier lifetime with an increase in temperature, resulting in reduced forward voltage drop. We also observed lower R ON,diff at higher injection-current densities, suggesting that a higher carrier lifetime is needed in this lightly doped n-type SiC thick epi-layer in order to achieve full conductivity modulation. The anode to cathode reverse blocking leakage current was measured as 0.9 µA at 16 kV at room temperature.

We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 4H-SiC P-IGBT, with a chip size of 6.7 mm × 6.7 mm and an active area of 0.16 cm 2 exhibited a record high blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 24 mΩ-cm 2 with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 mΩ-cm 2 with a gate bias of 20 V. Buffer layer design, which includes controlling the doping concentration and the thickness of the field-stop buffer layers, was used to control the charge injection from the backside. Effects on buffer layer design on static characteristics and switching behavior are reported.

We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 4H-SiC P-IGBT, with a chip size of 6.7 mm x 6.7 mm and an active area of 0.16 cm(2) exhibited a record high blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 24 m Omega-cm(2) with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 m Omega-cm(2) with a gate bias of 20 V. Buffer layer design, which includes controlling the doping concentration and the thickness of the field-stop buffer layers, was used to control the charge injection from the backside. Effects on buffer layer design on static characteristics and switching behavior are reported.

We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 6.7 mm x 6.7 mm 4H-SiC N-IGBT with an active area of 0.16 cm2 showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 mΩ-cm2 with a gate bias of 20 V. A 4H-SiC P-IGBT exhibited a record high blocking voltage of 15 kV, while showing a differential specific on-resistance of 24 mΩ-cm2. A comparison between P- and N- IGBTs in 4H-SiC is provided in this paper.

We present our recent developments in 4H-SiC power DMOSFETs. 4H-SiC DMOSFETs with a room temperature specific on-resistance of 3.7 mΩ-cm2 with a gate bias of 20 V, and an avalanche voltage of 1550 V with gate shorted to source, was demonstrated. A threshold voltage of 3.5 V was extracted from the power DMOSFET, and a subthreshold swing of 200 mV/dec was measured. The device was successfully scaled to an active area of 0.4 cm2, and the resulting device showed a drain current of 377 A at a forward voltage drop of 3.8 V at 25oC.

Junction barrier Schottky (JBS) diodes and MOSFETs fabricated in 4H-SiC are described. These power devices are capable of blocking in excess of 1700 V with leakage currents of less than tens of microamps at temperatures exceeding 175°C and of conducting tens of amps in the on-state. The static on-state and blocking I-V characteristics of each component are presented, along with a comparison to comparably rated Si bipolar PiN diodes and IGBTs. The dynamic performance of the 4H-SiC diodes and MOSFETs is also presented, and a fully functional 10 kW transformer isolated DC-DC power converter operating at 1000V at a switching frequency of 20 kHz is demonstrated.