We generalize and refine an analytical model to describe unclamped inductive switching (UIS) events in power MOSFETs and derive a novel, fast method to extract thermal impedance and series resistance from the UIS waveform. We show excellent agreement between model and measurement for SiC MOSFETs. The method allows for the comparison of thermal impedance measurements of packaged parts to that of formerly not easily accessible waferlevel die. The model allows to evaluate UIS ruggedness and provides insight into the nature of ruggedness limitations. A figure of merit for UIS ruggedness is provided and different MOSFET architectures are compared with respect to UIS ruggedness.

Ultra High Voltage (UHV) 4H-SiC N-IGBTs, with drift layer thicknesses ranging from 140 μm to 240 μm, were fabricated and characterized. A blocking voltage of 25 kV, and a forward voltage drop (VF) of 12.8 V were measured from a 9 mm x 9 mm device with a 240 μm drift layer. A positive temperature coefficient of VF was observed, which is desirable for paralleling, but unusual for a bipolar device. The cause of this behavior was investigated using a test structure that allowed separate observations of electron and hole currents in the 4H-SiC IGBT structure. It was revealed that the hole current increases with temperature, due to increases in charge injection and carrier lifetimes at elevated temperatures, while the electron current decreases with temperature due to a unipolar resistance component in its path, most likely due to JFET resistance, formed by depletion regions extending into the lightly doped drift region. The concept of Carrier Storage Layer (CSL) was implemented in UHV 4H-SiC N-IGBTs to suppress this effect, resulting in a negative temperature coefficient of VF. A 15 kV 4H-SiC N-IGBT with a 1x1016cm-3 doped CSL showed a VF reduction of 3 V at a collector current of 20 A, at a junction temperature of 150°C, compared to a 15 kV SiC N-IGBT without a CSL at the same collector current value.

Ultra high voltage (UHV, >15 kV) 4H-silicon carbide (SiC) power devices have the potential to significantly improve the system performance, reliability, and cost of energy conversion systems by providing reduced part count, simplified circuit topology, and reduced switching losses. In this paper, we compare the two MOS based UHV 4H-SiC power switching devices; 15 kV 4H-SiC MOSFETs and 15 kV 4H-SiC n-IGBTs. The 15 kV 4H-SiC MOSFET shows a specific on-resistance of 204 m Omega cm(2) at 25 degrees C, which increased to 570 m Omega cm(2) at 150 degrees C. The 15 kV 4H-SiC MOSFET provides low, temperature-independent, switching losses which makes the device more attractive for applications that require higher switching frequencies. The 15 kV 4H-SiC n-IGBT shows a significantly lower forward voltage drop (V-F), along with reasonable switching performance, which make it a very attractive device for high voltage applications with lower switching frequency requirements. An electrothermal analysis showed that the 15 kV 4H-SiC n-IGBT outperforms the 15 kV 4H-SiC MOSFET for applications with switching frequencies of less than 5 kHz. It was also shown that the use of a carrier storage layer (CSL) can significantly improve the conduction performance of the 15 kV 4H-SiC n-IGBTs.

A 1 cm x 1 cm 4H-SiC N-IGBT exhibited a blocking voltage of 20.7 kV with a leakage current of 140 μA, which represents the highest blocking voltage reported from a semiconductor power switching device to this date. The device used a 160 μm thick drift layer and a 1 μm thick Field-Stop buffer layer, and showed a VF of 6.4 V at an IC of 20 A, and a differential Ron,sp of 28 mΩ-cm2. Switching measurements with a supply voltage of 8 kV were performed, and a turn-off time of 1.1 μs and turn-off losses of 10.9 mJ were measured at 25°C, for a 8.4 mm x 8.4 mm device with 140 μm drift layer and 2 μm F-S buffer layer. The turn-off losses were reduced by approximately 50% by using a 5 μm F-S buffer layer. A 55 kW, 1.7 kV to 7 kV boost converter operating at 5 kHz was demonstrated using the 4H-SiC N-IGBT, and an efficiency value of 97.8% was reported.

In this paper, we report our recently developed large area 4H-SiC n-IGBTs that have a chip size of 1 cm 2 and an active conducting area of 0.37 cm 2 . A blocking voltage of 22.6 kV has been demonstrated with a leakage current of 9 μA at a gate bias of 0 V at room-temperature. This is the highest breakdown voltage of a single MOS-controlled semiconductor switch reported to date. To improve the conductivity modulation and lower the conduction losses during the on-state, a thermal oxidation process was applied to enhance the carrier lifetime prior to the device fabrication. Compared to the devices that did not receive this lifetime enhancement process, the lifetime enhanced devices displayed nearly 1 V lower forward voltage drop with little increase in switching energy and no degradation of static blocking characteristics. A specific differential on-resistance of 55 mΩ-cm 2 at 20 A and 125 °C was achieved, suggesting that bipolar power devices with thick drift regions can benefit from further enhancement of the ambipolar carrier lifetime.

The latest developments in ultra high voltage 4H-SiC IGBTs are presented. A 4H-SiC P-IGBT, with a chip size of 8.4 mm x 8.4 mm and an active area of 0.32 cm2, which is double the active area of the previously reported devices [1], exhibited a blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 41 mΩ-cm2 with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 17 kV, and demonstrated a room temperature differential specific on-resistance of 25.6 mΩ-cm2 with a gate bias of 20 V. Field-Stop buffer layer design was used to control the charge injection from the backside. A comparison between N- and P- IGBTs, and the effects of different buffer designs, are presented.

In this paper, we report our recently developed 1 cm 2 , 15 kV SiC p-GTO with an extremely low differential on-resistance ( RON,diff ) of 4.08 mΩ•cm 2 at a high injection-current density (J AK ) of 600 ~ 710 A/cm 2 . The 15 kV SiC p-GTO was built on a 120 μm, 2×10 14 /cm 3 doped p-type SiC drift layer with a device active area of 0.521 cm 2 . Forward conduction of the 15 kV SiC p-GTO was characterized at 20°C and 200°C. Over this temperature range, the R ON,diff at J AK of 600 ~ 710 A/cm 2 decreased from 4.08 mΩ•cm 2 at 20°C to 3.45 mΩ•cm 2 at J AK of 600 ~ 680 A/cm 2 at 200°C. The gate to cathode blocking voltage (V GK ) was measured using a customized high-voltage test set-up. The leakage current at a V GK of 15 kV were measured 0.25 µA and 0.41 µA at 20°C and 200°C respectively.

A 1 cm × 1 cm 4H-SiC N-IGBT exhibited a blocking voltage of 20.7 kV with a leakage current of 140 μA, which represents the highest blocking voltage reported from an MOS semiconductor power switching device to date. The device showed a VF of 6.4 V at an IC of 20 A, and a differential Ron,sp of 28 mΩ-cm2. Temperature insensitive on-state characteristics were demonstrated. Switching measurements with a supply voltage of 8 kV were performed, and a turn-off time of 720 ns and a turn-off loss of 5.4 mJ were measured at 25°C, for a 8.4 mm × 8.4 mm device with 140 μm drift layer and 5 μm Field Stop buffer layer. It was demonstrated that the charge injection from the backside can be controlled by varying the thickness of the Field-Stop buffer layer. A 55 kW, 1.7 kV to 7 kV boost converter operating at 5 kHz was demonstrated using the 4H-SiC N-IGBT, and an efficiency value of 97.8% was reported.

In this work, we report our recently developed 16 kV, 1 cm 2 , 4H-SiC PiN diode results. The SiC PiN diode was built on a 120 µm, 2×10 14 /cm 3 doped n-type SiC drift layer with a device active area of 0.5175 cm 2 . Forward conduction of the PiN diode was characterized at temperatures from 20°C to 200°C. At high injection-current density (J F ) of 350 ~ 400 A/cm 2 , the differential on-resistance (R ON,diff ) of the SiC PiN diode decreased from 6.08 mΩ·cm 2 at 20°C to 5.12 mΩ·cm 2 at 200°C, resulting in a very small average temperature coefficient of –5.33 µΩ·cm 2 /°C, while the forward voltage drop (V F ) at 100 A/cm 2 reduced from 4.77 V at 20°C to 4.17 V at 200°C. This is due to an increasing high-level carrier lifetime with an increase in temperature, resulting in reduced forward voltage drop. We also observed lower R ON,diff at higher injection-current densities, suggesting that a higher carrier lifetime is needed in this lightly doped n-type SiC thick epi-layer in order to achieve full conductivity modulation. The anode to cathode reverse blocking leakage current was measured as 0.9 µA at 16 kV at room temperature.

In this paper, we report our recently developed 1 × 1 cm2, 12 kV SiC GTOs with a very low differential on-resistance (RON,Diff) of 4 mΩ·cm2 with respect to the device active area at high injection level current of 100 A/cm2 or higher, which is more than a 40% reduction from our previously reported work. This significant reduction in the on-resistance was attributed to an improvement of carrier lifetime in the SiC bulk region. The SiC GTO was wire-bonded and attached to a high-voltage package before the high-temperature measurement. Forward characteristics of the device were then measured using a Tektronics 371 curve tracer from room temperature up to 400°C. Over the temperature range, the RON,Diff of the 4H-SiC GTO increased modestly from 4 mΩ·cm2 at 20°C to 4.7 mΩ·cm2 at 400°C, while the forward voltage drop at 100 A decreased slightly from 3.97 V at 20°C to 3.6 V at 400°C. The gate to cathode blocking voltage (VGK) was measured using a customized high-voltage test set-up. The leakage current was measured 0.66 μA at a VGK of 12 kV at 20°C.