Cantilevers with resonance frequency ranging from 1 MHz to 100 MHz have been developed for dynamic atomic force microscopy. These sensors are fabricated from 3C-SiC epilayers grown on Si(100) substrates by low pressure chemical vapor deposition. They use an on-chip method both for driving and sensing the displacement of the cantilever. A first gold metallic loop deposited on top of the cantilever is used to drive its oscillation by electrothermal actuation. The sensing of this oscillation is performed by monitoring the resistance of a second Au loop. This metallic piezoresistive detection method has distinct advantages relative to more common semiconductor-based schemes. The optimization, design, fabrication, and characteristics of these cantilevers are discussed.

Thick AlN layers were grown by high temperature chemical vapor deposition (HTCVD) on 8° off-axis (0001) 4H-SiC, on-axis (0001) 6H-SiC and on-axis (0001) AlN templates between 900°C and 1600°C. The experimental set-up consists of a vertical cold-wall reactor working at low pressure in which the reactions take place on a graphite susceptor heated by induction. The reactants used are ammonia (NH3) and aluminum chlorides (AlClx) species in situ formed via Cl2 reaction with high purity aluminum wire. As-grown AlN layers have been characterized by Scanning Electron Microscopy (SEM), X-ray diffraction (XRD), Transmission Electron Microscopy (TEM), Optical Profilometry, Atomic Force Microscopy (AFM) and Raman spectroscopy. In this study, the influence of the deposition temperature and the N/Al ratio in the gas phase is studied in order to stabilize epitaxial growth. The epitaxy on AlN template is favored using a low N/Al ratio in the gas phase and a high temperature above 1400°C. The crystalline quality of epitaxial AlN layers is found to increase with increasing deposition temperature from 1400 to 1500°C. Growth rates up to 14μmh−1 have been reached for epitaxial AlN layers. An important etching phenomenon is also observed at high temperature: apparition of pin holes certainly around threading dislocations at 1400–1500°C and substrate etching at 1600°C.

In this contribution we recapitulate the state of the art of silicon carbide and related materials polishing. Since the demonstration (by Vicente et al) of an ultimate preparation of Si-face -SiC wafers some important progresses were made in the field of surface preparation of silicon carbide and related materials. This concerns the industrial, high output treatments of substrates of increasing size, as well as the research studies of the feasibility of new preparation approaches for wide band gap materials. We also discuss the problems related to the polishing of the polycrystalline material and to the planarization of epilayers.

We investigate by means of Atomic Force Microscopy and Scanning Electron Microscopy the surface modifications of 3C-SiC(111)/Si epilayers induced by thermal annealing performed under hydrogen or argon atmosphere. We explore the effects of these treatments both on as grown and polished epilayers. Owing to an important initial surface roughness, the annealing has few impact on as grown films. On polished epilayers, a surface reorganization via the formation of a regular array of steps is evidenced. The proper effect of each gas on the surface reorganization is discussed.

Various aspects of the elaboration of (111) oriented 3C–SiC films on silicon are discussed within a comparative study of different layer characteristics for (111) and (100) orientations. The dissimilarities between both orientations are pointed out. This includes the growth mode during the nucleation, the efficacy of defect healing during the growth, the dopant incorporation and the warping of the epiwafer. The results of 3C–SiC surface preparation by chemical mechanical polishing are also demonstrated. All the characteristics of (111) oriented layers are discussed from the point of view of the application of 3C–SiC/Si epiwafers as templates for nitride growth. The characteristics of AlGaN/GaN based high electron mobility transistor elaborated on 3C–SiC/Si template are presented to validate the template's concept.

2 cm diameter hydrothermal ZnO crystals were grown and then made into substrates using both mechanical and chemical-mechanical polishing (CMP). CMP polishing showed superior results with an (0002) Ω scan full width half maximum (FWHM) of 67 arcsec and an root mean square (RMS) roughness of 2 Å. In comparison, commercial melt-grown substrates exhibited broader X-ray diffraction (XRD) linewidths with evidence of sub-surface crystal damage due to polishing, including a downward shift of c-lattice parameter. Secondary ion mass spectroscopy revealed strong Li, Fe, Co, Al and Si contamination in the hydrothermal crystals as opposed to the melt-grown substrates, for which glow discharge mass spectroscopy studies had reported high levels of Pb, Fe, Cd and Si. Low temperature photoluminescence (PL) studies indicated that the hydrothermal crystal had high defect and/or impurity concentrations compared with the melt-grown substrate. The dominant bound exciton for the melt-grown substrate was indexed to Al. ZnO films were grown using pulsed laser deposition. The melt-grown substrates gave superior results with XRD (0002) Ω and 2θ/Ω WHM of 124 and 34 arcsec, respectively. Atomic force microscope measurements indicated a low RMS roughness (1.9 nm) as confirmed by fringes in the XRD 2θ/Ω scan. It was suggested that the improvement in XRD response relative to the substrate might be due to “healing” of sub-surface polishing damage due to the elevated Ts used for the growth. Indeed the c-lattice parameter for the homoepitaxial layer on the melt-grown substrate had become that which would be expected for strain-free ZnO. Furthermore, the stability of the PL peak positions relative to bulk ZnO, confirmed that the films appear practically strain free.

Crystal growth of 6H-SiC in two non-basal directions is reported. The two explored surfaces are the {1-103} plane, named qC-face, and the {1-10-3} plane, named qSi-face. The asgrown bulk surfaces exhibit a smooth structure with a small ridging effect originating from the miscut of the seed crystals. Layers, epitaxially grown on the chemically-mechanically polished qC-face, nicely replicate the original crystal structure and show no sign of polytype mixing. Low-temperature photoluminescence measurements collected on the epilayers exhibit near bandedge spectral characteristics indicative of good quality 6H-SiC.

The interaction of Co thin films on atomically flat ZnO(000–1) has been investigated by low energy electron diffraction (LEED), scanning tunneling microscopy (STM) and Auger electron spectroscopy (AES). A high density of islands nucleates at the earliest stages of the growth and a subsequent Wolmer–Weber growth of these islands is observed. Upon annealing at 600 °C, an atomically flat surface (Zn,Co)O(000–1) is restored due to the diffusion of the Co into the semiconductor.

The effect of annealing of Co∕ZnO(0001) was studied by scanning tunneling microscopy, low energy electron diffraction, and Auger electron spectroscopy. At room temperature, Co forms islands on ZnO. Annealing up to 940K leads to coalescence of the islands. At 970K, Co diffuses into ZnO where it partially replaces Zn. A model of the Auger intensities, based on exponential attenuation with thickness and including correction for matrix effects, confirms this interpretation and suggests that the fraction of Zn replaced by Co is near 50% or higher.

High-quality ZnO single crystals of dimensions 10 x 10 x 0.3 mm(3) grown either using a pressurized melt or a hydrothermal growth approach, have been investigated in their as-received state and are compared regarding their properties revealed by positron annihilation and Hall effect measurements. By positron annihilation performed at room temperature it is found that the pressurized melt grown crystals contain a certain amount of Zn + O divacancies, but no Zn vacancies are detected, whereas the hydrothermally grown crystals contain a dominating defect yet unknown in its structure but possibly connected to the Zn vacancy. Furthermore, the influence of an additional refined chemical-mechanical polishing of the crystal surface by a special procedure on the depth distribution of vacancy-type defects is demonstrated. Hall measurements, performed in the temperature range 20-325 K, showed that the crystal growth method has a strong influence on the carrier mobility, and the estimated acceptor densities also differ significantly in both types of crystal. (c) 2007 Elsevier Ltd. All rights reserved.

The transfer by wafer-bonding of single-crystalline SiC thin films to a polycrystalline SiC support to obtain a “quasi-wafer” is an attractive way for lowering the cost of silicon carbide wafers. Such a process needs high quality polycrystalline substrates, with controlled and high-level bulk properties (thermal conductivity, electrical resistivity) and with very low surface roughness and surface bowing. Currently, polycrystalline SiC wafers which are available are siliconized SiC or CVD processed SiC wafers. Siliconized ceramic wafers are very heterogeneous (mixture of 3C, 6H, 15R and silicon), while CVD ones are of better quality (homogeneous and textured 3C). However neither the siliconized SiC nor the CVD SiC can be CMP polished with low roughness over large dimension. In this paper, wafers with large and textured grains (> 1cm) are processed and characterized. The polishing of such structures is studied and optimized to obtain low surface roughness. To meet these requirements high temperature processes used for single crystal growth were selected. Structural investigations performed on the grown ingots showed an important influence of the used seed since no preferential crystallographic orientation was observed during the growth. The final polishing quality was of high level but step heights were observed between grains.

The transfer by wafer-bonding of single-crystalline SiC thin films to a polycrystalline SiC substrate to obtain a "quasi-wafer" requires high quality polycrystalline substrates with controlled bulk properties (thermal conductivity, electrical resistivity) as well as with very low surface roughness (RMS < 5 nm) and bowing(< 10 mu m). Currently, available polycrystalline SiC wafers are processed by sintering or by Chemical Vapor Deposition (CVD). Sintered ceramic wafers are very heterogeneous (mixture of 3C, 6H, 4H and silicon), while CVD ones are of better quality (homogeneous and textured 3C). The aim of this paper is to investigate the fabrication and the properties (bulk and surface) of SiC substrates with large (0.1 to a few mm) grains. To meet these requirements, two high temperature processes (around 2000 degrees C) for single crystal growth were used: Physical Vapor Transport (PVT) and the recently developed CVD Feed Physical Vapor Transport (CF-PVT). Structural investigations performed on large grain wafers sliced and polished from the grown ingots showed an important influence of the initial seed on the grain size, polytype and crystallographic texture. Chemical and Mechanical Polishing (CMP) of such structures was studied and optimized to obtain low surface roughness. The intra-grain roughness is very low (RMS < 0.5 nm) but a few nanometer of height steps were observed between grains. The relations between bulk properties, surface functionalization and process conditions are discussed. This first seeding step with commercial substrates is necessary for the creation of original substrates which can be used for the fabrication of new substrates. (c) 2006 Elsevier B.V. All rights reserved.

We report on A ‐plane GaN quantum dots in AlN, grown on A ‐plane 6H SiC substrates by plasma‐assisted molecular‐beam epitaxy. AFM imaging revealed a strong alignment of the dots along the [1$ \bar 1 $00] direction that we correlated with the anisotropic morphology of the AlN buffer layer. A vertical correlation of these dots was evidenced by high resolution transmission electron microscopy on superlattice samples with an AlN spacer thickness of 5 nm. Time‐resolved spectroscopy performed on both C ‐plane and A ‐plane samples revealed much shorter radiative lifetimes for the A ‐plane dots, indicating a strong reduction of the internal electric field with respect to the one present in their C ‐plane counterparts. (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

We established a cleaning procedure to obtain atomically flat $000 \bar {1}$ surfaces from pressurized melt grown ZnO using ex‐situ and in‐situ processing. The ex‐situ chemical cleaning consisted in removing the surface fluid layer and contaminants from the surface. The physical in‐situ procedure used sputtering‐annealing cycles to clean and reconstruct the surface. 3 key parameters were in‐situ investigated: the annealing time, the annealing temperature and the sputtering energy. Investigations were carried out by means of Low Energy Electron Diffraction (LEED), Auger Electron Spectroscopy (AES), X‐ray Photoemission Spectroscopy (XPS), Time of Flight of Secondary Ion Mass Spectrometry (ToF‐SIMS), Atomic Force Microscopy and Spectroscopy (AFM and AFS) and Scanning Tunnelling Microscopy (STM). (© 2006 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

We established a cleaning procedure to obtain atomically flat (000 (1) over bar) surfaces from pressurized melt grown ZnO using ex-situ and in-situ processing. The ex-situ chemical cleaning consisted in removing the surface fluid layer and contaminants from the surface. The physical in-situ procedure used sputtering-annealing cycles to clean and reconstruct the surface. 3 key parameters were in-situ investigated: the annealing time, the annealing temperature and the sputtering energy. Investigations were carried out by means of Low Energy Electron Diffraction (LEED), Auger Electron Spectroscopy (AES), X-ray Photo-emission Spectroscopy (XPS), Time of Flight of Secondary Ion Mass Spectrometry (ToF-SIMS), Atomic Force Microscopy and Spectroscopy (AFM and AFS) and Scanning Tunnelling Microscopy (STM).

In this study, we established a cleaning procedure to obtain atomically flat (000-1) surfaces from pressurized melt grown ZnO. Ex situ chemical cleaning removes fluid layer and trapped contaminants from the surface. This was followed by cycles of sputtering and annealing in ultrahigh vacuum. It is critical that the ion energy be high enough to produce small and highly mobile molecular fragments. On the other hand, annealing must be done at moderate temperatures to avoid segregation of potassium to the surface. Secondly, the interaction of Co thin films on atomically flat ZnO(000-1) has been investigated by low energy electron diffraction, scanning tunneling microscopy, and Auger electron spectroscopy. A high density of islands nucleates at the earliest stages of the growth and a subsequent Volmer-Weber growth of these islands is observed. Upon annealing at 550°C, an atomically flat surface (Zn,Co)O(000-1) is restored due to the diffusion of the Co into the semiconductor.

High-quality single crystals of ZnO in the as-grown and N+ ion-implanted states have been investigated using a combination of three experimental techniques-namely, positron lifetime/slow positron implantation spectroscopy accompanied by theoretical calculations of the positron lifetime for selected defects, temperature-dependent Hall (TDH) measurements, and deep level transient spectroscopy (DLTS). The positron lifetime in bulk ZnO is measured to be (151 +/- 2) ps and that for positrons trapped in defects (257 +/- 2) ps. On the basis of theoretical calculations the latter is attributed to Zn+O divacancies, existing in the sample in neutral charge state, and not to the Zn vacancy proposed in previous experimental work. Their concentration is estimated to be 3.7x10(17) cm(-3). From TDH measurements the existence of negatively charged intrinsic defects acting as compensating acceptors is concluded which are invisible to positrons-maybe interstitial oxygen. This view is supported from TDH results in combination with DLTS which revealed the creation of the defect E1, and an increase in concentration of the defect E3 after N+ ion implantation, and peculiarities in the observation of the defect E4.

We report on nonpolar GaN quantum dots embedded in AlN, grown on (11-20) 6H–SiC by plasma-assisted molecular-beam epitaxy. These dots are aligned in the growth plane and present a constant aspect ratio of 10. Their optical properties were studied as a function of GaN coverage. Especially, the variation of their emission energy as compared to that of (0001) GaN quantum dots is a clear fingerprint of the reduced internal electric field present in these nonpolar nanostructures. Time-resolved spectroscopy confirmed this result by revealing lifetimes in the few 100 ps range in contrast to the much longer ones obtained for the (0001) GaN quantum dots.

In this work, we have investigated the 3C-SiC re-growth on planarized 3C-SiC epitaxial layers, grown on (001)Si, after the application of a chemical mechanical polishing (CMP) process. A specific polishing process was developed for 3C-SiC to achieve a flat, high-quality surface. The interface between the deposited 3C-SiC and the polished 3C-SiC on Si film was studied by TEM characterization to determine if defects appear at this interface. It was observed that no additional defects were nucleated at the interface. The resulting re-grown film roughness, as a function of film thickness, was studied and is reported along with recommendations for future work.

We report on the growth of GaN quantum dots on AlN grown on (11-20) 6H-SiC. It is shown that the Stranski-Krastanow growth mode of GaN on this surface results in the formation of GaN quantum dots aligned along [1-100]. Their morphology and optical properties were studied as a function of GaN coverage. lie cathodoluminescence of the dots was observed above the GaN gap energy, as an indication that the electric field is greatly reduced in these non-polar heterostructures. The persistence of photoluminescence intensity as a function of temperature was observed, as a signature of carrier localization inside the quantum dots. (c) 2005 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.